TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 600-mA, HIGH-EFFICIENCY MicroSiP™ STEP-DOWN CONVERTER (PROFILE <1.0mm) Check for Samples: TPS82670, TPS82671, TPS82672, TPS82673, TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 FEATURES 1 • • • 90% Efficiency at 5.5MHz Operation 17μA Quiescent Current Wide VIN Range From 2.3V to 4.8V 5.5MHz Regulated Frequency Operation Spread Spectrum, PWM Frequency Dithering Best in Class Load and Line Transient ±2% Total DC Voltage Accuracy Automatic PFM/PWM Mode Switching Low Ripple Light-Load PFM Mode ≥35dB VIN PSRR (1kHz to 10kHz) Internal Soft Start, 120-µs Start-Up Time Integrated Active Power-Down Sequencing (Optional) Current Overload and Thermal Shutdown Protection Sub 1-mm Profile Solution Total Solution Size <6.7 mm2 APPLICATIONS • • • Cell Phones, Smart-Phones Digital TV, WLAN, GPS and Bluetooth™ Applications POL Applications DESCRIPTION The TPS8267x device is a complete 600mA, DC/DC step-down power supply intended for low-power applications. Included in the package are the switching regulator, inductor and input/output capacitors. No additional components are required to finish the design. The TPS8267x is based on a high-frequency synchronous step-down dc-dc converter optimized for battery-powered portable applications. The MicroSiPTM DC/DC converter operates at a regulated 5.5-MHz switching frequency and enters the powersave mode operation at light load currents to maintain high efficiency over the entire load current range. The PFM mode extends the battery life by reducing the quiescent current to 17μA (typ) during light load operation. For noise-sensitive applications, the device has PWM spread spectrum capability providing a lower noise regulated output, as well as low noise at the input. These features, combined with high PSRR and AC load regulation performance, make this device suitable to replace a linear regulator to obtain better power conversion efficiency. The TPS8267x is packaged in a compact (2.3mm x 2.9mm) and low profile (1.0mm) BGA package suitable for automated assembly by standard surface mount equipment. 250 100 90 VI = 3.6 V, VO = 1.8 V 225 80 DC/DC Converter VIN 2.3 V .. 4.8 V VIN SW GND FB VOUT 1.8 V @ 600mA CO CI ENABLE L EN MODE Efficiency - % TPS82671SIP 175 60 150 50 125 40 100 75 30 MODE SELECTION 200 Efficiency PFM/PWM Operation 70 Power Loss PFM/PWM Operation 20 Power Loss - mW • • • • • • • • • • • • 23 50 25 10 GND Figure 1. Typical Application 0 0.1 1 10 100 IO - Load Current - mA 0 1000 Figure 2. Efficiency vs. Load Current 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. MicroSiP is a trademark of Texas Instruments. Bluetooth is a trademark of Bluetooth SIG, Inc. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010–2012, Texas Instruments Incorporated TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TA -40°C to 85°C PART NUMBER OUTPUT VOLTAGE (2) DEVICE SPECIFIC FEATURE ORDERING (3) PACKAGE MARKING TPS82670 1.86V PWM Spread Spectrum Modulation Low PFM Output Ripple Voltage Output Capacitor Discharge TPS82670SIP YK TPS82671 1.8V PWM Spread Spectrum Modulation Low PFM Output Ripple Voltage TPS82671SIP RA TPS826711 1.8V PWM Spread Spectrum Modulation Low PFM Output Ripple Voltage Output Capacitor Discharge TPS826711SIP YW TPS82672 1.5V PWM Spread Spectrum Modulation Low PFM Output Ripple Voltage TPS82672SIP WD TPS82673 1.26V PWM Spread Spectrum Modulation Low PFM Output Ripple Voltage Output Capacitor Discharge TPS82673SIP YL TPS82674 1.2V PWM Spread Spectrum Modulation Low PFM Output Ripple Voltage Output Capacitor Discharge TPS82674SIP SW TPS82675 1.2V PWM Spread Spectrum Modulation Low PFM Output Ripple Voltage TPS82675SIP RB TPS82676 1.1V PWM Spread Spectrum Modulation Low PFM Output Ripple Voltage Output Capacitor Discharge TPS82676SIP TU TPS82677 1.2V Output Capacitor Discharge TPS82677SIP SK 1.35V PWM Spread Spectrum Modulation Output Capacitor Discharge TPS82678SIP TN TPS82678 (1) (2) (3) (4) 2 (1) (4) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Internal tap points are available to facilitate output voltages in 25mV increments. The SIP package is available in tape and reel. Add a R suffix (e.g. TPS82671SIPR) to order quantities of 3000 parts. Add a T suffix (e.g. TPS82671SIPT) to order quantities of 250 parts. Product Preview Copyright © 2010–2012, Texas Instruments Incorporated TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE MIN VI Voltage at VIN (2) (3) –0.3 6 V Voltage at VOUT (3) –0.3 3.6 V –0.3 VIN + 0.3 V Voltage at EN, MODE (3) Power dissipation Internally limited TA Operating temperature range (4) TINT (max) Maximum internal operating temperature Tstg Storage temperature range ESD rating (5) –40 –55 (2) (3) (4) (5) 85 °C 125 °C 125 °C Human body model 2 kV Charge device model 1 kV 200 V Machine model (1) UNIT MAX Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Operation above 4.8V input voltage for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA(max)) is dependent on the maximum operating temperature (TINT(max)), the maximum power dissipation of the device in the application (PD(max)), and the junction-to-ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA(max)= TJ(max)–(θJA X PD(max)). To achieve optimum performance, it is recommended to operate the device with a maximum internal temperature of 105°C. The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. The machine model is a 200-pF capacitor discharged directly into each pin. THERMAL INFORMATION TPS8267xSIP THERMAL METRIC (1) (2) SIP UNITS 8 PINS θJA Junction-to-ambient (top) thermal resistance 125 Junction-to-ambient (bottom) thermal resistance 70 θJCtop Junction-to-case (top) thermal resistance θJB Junction-to-board thermal resistance ψJT Junction-to-top characterization parameter ψJB Junction-to-board characterization parameter θJCbot Junction-to-case (bottom) thermal resistance (1) (2) °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Thermal data have been measured using TI's 4-layer evaluation board. RECOMMENDED OPERATING CONDITIONS VIN Input voltage range IO Output current range TPS82671 to TPS826711 Additional output capacitance (PFM/PWM operation) (2) TPS82670 to TPS82676 TPS826711 TPS82677, TPS82678 MIN NOM MAX 2.3 4.8 (1) 0 600 mA 0 2.5 µF 0 4 µF 0 7 µF Additional output capacitance (PWM operation) (2) UNIT V TA Ambient temperature –40 +85 °C TJ Operating junction temperature –40 +125 °C (1) (2) Operation above 4.8V input voltage for extended periods may affect device reliability. In certain applications larger capacitor values can be tolerable, see output capacitor selection section for more details. Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 3 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 www.ti.com ELECTRICAL CHARACTERISTICS Minimum and maximum values are at VIN = 2.3V to 5.5V, VOUT = 1.8V, EN = 1.8V, AUTO mode and TA = –40°C to 85°C; Circuit of Parameter Measurement Information section (unless otherwise noted). Typical values are at VIN = 3.6V, VOUT = 1.8V, EN = 1.8V, AUTO mode and TA = 25°C (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX IO = 0mA. Device not switching 17 40 IO = 0mA. PWM operation 5.8 UNIT SUPPLY CURRENT IQ Operating quiescent current ISD Shutdown current UVLO Undervoltage lockout threshold EN = GND μA mA 0.5 5 μA 2.05 2.1 V PROTECTION Thermal shutdown Thermal shutdown hysteresis ILIM Peak Input Current Limit ISC Input current limit under short-circuit conditions VO shorted to ground 140 ° 10 ° C C 1100 mA 13.5 mA ENABLE, MODE VIH High-level input voltage VIL Low-level input voltage Ilkg Input leakage current 1.0 V 0.4 V 0.01 1.5 μA 4.9 5.45 6.0 MHz 2.5V ≤ VI ≤ 4.8V, 0mA ≤ IO ≤ 600 mA PFM/PWM operation 0.98×VNOM VNOM 1.03×VNOM V 2.5V ≤ VI ≤ 5.5V, 0mA ≤ IO ≤ 600 mA PFM/PWM operation 0.98×VNOM VNOM 1.04×VNOM V 2.5V ≤ VI ≤ 5.5V, 0mA ≤ IO ≤ 600 mA PWM operation 0.98×VNOM VNOM 1.02×VNOM V 2.5V ≤ VI ≤ 4.8V, 0mA ≤ IO ≤ 600 mA PFM/PWM operation 0.98×VNOM VNOM 1.04×VNOM V 2.5V ≤ VI ≤ 5.5V, 0mA ≤ IO ≤ 600 mA PWM operation 0.98×VNOM VNOM 1.02×VNOM V Input connected to GND or VIN OSCILLATOR fSW Oscillator frequency IO = 0mA. PWM operation OUTPUT VOUT Regulated DC output voltage TPS82670 TPS82671 TPS826711 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82678 TPS82677 TPS82678 Line regulation VI = VO + 0.5V (min 2.5V) to 5.5V, IO = 200 mA Load regulation IO = 0mA to 600 mA. PWM operation Feedback input resistance ΔVO rDIS 4 0.23 %/V –0.00085 %/mA 480 kΩ TPS82671 IO = 1mA, VO = 1.8V 19 mVPP TPS82674 TPS82675 IO = 1mA, VO = 1.2V 16 mVPP TPS82676 IO = 1mA, VO = 1.1V 16 mVPP TPS82677 IO = 1mA, VO = 1.2V 25 mVPP TPS82678 IO = 1mA, VO = 1.35V TBD mVPP Start-up time TPS82671 TPS826711 IO = 0mA, Time from active EN to VO 120 μs Discharge resistor for power-down sequence TPS82670 TPS826711 TPS82673 TPS82674 TPS82676 TPS82677 TPS82678 Device featuring active discharge Power-save mode ripple voltage Submit Documentation Feedback 70 150 Ω Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 PIN ASSIGNMENTS SIP-8 (TOP VIEW) VOUT A1 A2 MODE B1 B2 GND C1 C2 A3 C3 SIP-8 (BOTTOM VIEW) VIN VIN EN EN GND GND A3 C3 VOUT A2 A1 B2 B1 MODE C2 C1 GND PIN DESCRIPTIONS PIN NAME VOUT NO. I/O DESCRIPTION A1 O Power output pin. Apply output load between this pin and GND. VIN A2, A3 I The VIN pins supply current to the TPS8267x internal regulator. EN B2 I This is the enable pin of the device. Connect this pin to ground to force the converter into shutdown mode. Pull this pin to VI to enable the device. This pin must not be left floating and must be terminated. This is the mode selection pin of the device. This pin must not be left floating and must be terminated. MODE B1 I C1, C2, C3 – MODE = LOW: The device is operating in regulated frequency pulse width modulation mode (PWM) at high-load currents and in pulse frequency modulation mode (PFM) at light load currents. MODE = HIGH: Low-noise mode is enabled and regulated frequency PWM operation is forced. GND Ground pin. Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 5 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 www.ti.com FUNCTIONAL BLOCK DIAGRAM MODE EN VIN CI 2.2µF DC/DC CONVERTER VIN Undervoltage Lockout Bias Supply Bandgap Soft-Start Negative Inductor Current Detect V REF = 0.8 V Power Save Mode Switching Thermal Shutdown Current Limit Detect Frequency Control R1 - L Gate Driver R2 Anti Shoot-Through VREF VOUT 1µH CO 4.7µF + Feedback Divider GND PARAMETER MEASUREMENT INFORMATION TPS8267XSIP DC/DC Converter VIN VIN SW GND FB CI ENABLE L VOUT CO EN MODE MODE SELECTION GND 6 Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 TYPICAL CHARACTERISTICS Table of Graphs FIGURE η vs Load current Efficiency VO 3, 4 vs Input voltage 5 Peak-to-peak output ripple voltage vs Load current 6, 7, 8 DC output voltage vs Load current 9, 10, 11 Combined line/load transient response 12, 13 14, 15, 16, 17 18, 19, 20 Load transient response AC load transient response 21 22, 23, 24, 25 26, 27, 28 Load transient response AC load transient response 29 PFM/PWM boundaries vs Input voltage 30, 31 IQ Quiescent current vs Input voltage 32 fs PWM switching frequency vs Input voltage 33 Start-up PSRR 34, 35 Power supply rejection ratio vs. Frequency 36 Spurious output noise (PFM mode) vs. Frequency 37 Spurious output noise (PWM mode) vs. Frequency 38 Output spectral noise density vs. Frequency 39 EFFICIENCY vs LOAD CURRENT EFFICIENCY vs LOAD CURRENT 100 100 VO = 1.8 V VO = 1.2 V 90 80 80 VI = 2.7 V PFM/PWM Operation 60 70 Efficiency - % 70 Efficiency - % VI = 2.7 V PFM/PWM Operation 90 VI = 3.6 V PFM/PWM Operation 50 VI = 4.2 V PFM/PWM Operation 40 VI = 3.6 V Forced PWM Operation 60 50 30 20 20 10 10 1 10 100 1000 VI = 4.2 V PFM/PWM Operation VI = 3.6 V Forced PWM Operation 40 30 0 0.1 VI = 3.6 V PFM/PWM Operation 0 0.1 1 10 IO - Load Current - mA IO - Load Current - mA Figure 3. Figure 4. Copyright © 2010–2012, Texas Instruments Incorporated 100 1000 Submit Documentation Feedback Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 7 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) EFFICIENCY vs INPUT VOLTAGE PEAK-TO-PEAK OUTPUT RIPPLE VOLTAGE vs LOAD CURRENT 30 VO = 1.8 V PFM/PWM Operation 92 IO = 100 mA IO = 300 mA 90 Efficiency - % 88 86 84 82 IO = 10 mA 80 IO = 1 mA 78 76 VO - Peak-to-Peak Output Ripple Voltage - mV 94 VI = 3.6 V 24 22 20 18 16 VI = 4.5 V 14 12 VI = 2.7 V 10 8 6 4 PFM/PWM Operation 2 0 20 40 60 Figure 5. Figure 6. PEAK-TO-PEAK OUTPUT RIPPLE VOLTAGE vs LOAD CURRENT PEAK-TO-PEAK OUTPUT RIPPLE VOLTAGE vs LOAD CURRENT 22 VI = 2.7 V 20 18 VI = 3.6 V 16 VI = 4.5 V 14 12 10 8 6 4 2 PFM/PWM Operation 0 0 20 40 60 80 100 120 140 160 180 200 IO - Load Current - mA Figure 7. Submit Documentation Feedback VO - Peak-to-Peak Output Ripple Voltage - mV 45 VO = 1.2 V (TPS82675) 24 80 100 120 140 160 180 200 IO - Load Current - mA 26 VO - Peak-to-Peak Output Ripple Voltage - mV VO = 1.8 V (TPS82671) 26 0 74 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 VI - Input Voltage - V 8 28 VO = 1.2 V (TPS82677) 40 VI = 4.5 V 35 VI = 3.6 V 30 VI = 2.7 V 25 20 15 10 5 0 0 25 50 75 100 125 150 175 200 225 250 275 300 IO - Load Current - mA Figure 8. Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 TYPICAL CHARACTERISTICS (continued) DC OUTPUT VOLTAGE vs LOAD CURRENT DC OUTPUT VOLTAGE vs LOAD CURRENT 1.836 1.224 VO = 1.8 V (TPS82671) PFM/PWM Operation VO = 1.2 V (TPS82675) PFM/PWM Operation 1.818 VI = 3.6 V 1.800 VI = 2.7 V 1.782 VO - Output Voltage - V VO - Output Voltage - V 1.212 VI = 4.5 V VI = 4.5 V 1.2 VI = 3.6 V VI = 2.7 V 1.188 1.764 0.1 1 10 100 1000 1.176 0.1 1 10 100 1000 IO - Load Current - mA IO - Load Current - mA Figure 9. Figure 10. DC OUTPUT VOLTAGE vs LOAD CURRENT COMBINED LINE/LOAD TRANSIENT RESPONSE 1.224 VO = 1.2 V (TPS82677) PFM/PWM Operation VO = 1.8 V (TPS82671) 30 to 300 mA Load Step VO - Output Voltage - V 1.212 VI = 4.5 V 3.3V to 3.9V Line Step 1.2 VI = 3.6 V VI = 2.7 V 1.188 MODE = Low 1.176 0.1 1 10 100 IO - Load Current - mA Figure 11. Copyright © 2010–2012, Texas Instruments Incorporated 1000 Figure 12. Submit Documentation Feedback Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 9 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) COMBINED LINE/LOAD TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION VO = 1.8 V (TPS82671) VI = 3.6 V, VO = 1.8 V (TPS82671) 30 to 150 mA Load Step 5 to 150 mA Load Step 2.7V to 3.3V Line Step MODE = Low MODE = Low Figure 13. Figure 14. LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION VI = 3.6 V, VO = 1.8 V (TPS82671) 50 to 350 mA Load Step VI = 2.7 V, VO = 1.8 V (TPS82671) 50 to 350 mA Load Step MODE = Low Figure 15. 10 Submit Documentation Feedback MODE = Low Figure 16. Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 TYPICAL CHARACTERISTICS (continued) LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION VI = 4.5 V, VO = 1.8 V (TPS82671) 50 to 350 mA Load Step LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION VI = 3.6 V, VO = 1.8 V (TPS82671) 150 to 500 mA Load Step MODE = Low MODE = Low Figure 17. Figure 18. LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION VI = 2.7 V, VO = 1.8 V (TPS82671) 150 to 500 mA Load Step VI = 4.5 V, VO = 1.8 V (TPS82671) 150 to 500 mA Load Step MODE = Low Figure 19. Copyright © 2010–2012, Texas Instruments Incorporated MODE = Low Figure 20. Submit Documentation Feedback Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 11 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION AC LOAD TRANSIENT RESPONSE VI = 3.6 V, VO = 1.8 V (TPS82671) VI = 3.6 V, VO = 1.2 V 5 to 300 mA Load Sweep 5 to 150 mA Load Step MODE = Low VI = 3.6 V, VO = 1.2 V MODE = Low Figure 21. Figure 22. LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION 50 to 350 mA Load Step VI = 2.7 V, VO = 1.2 V 50 to 350 mA Load Step MODE = Low Figure 23. 12 Submit Documentation Feedback MODE = Low Figure 24. Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 TYPICAL CHARACTERISTICS (continued) LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION 50 to 350 mA Load Step LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION VI = 3.6 V, VO = 1.2 V 150 to 500 mA Load Step MODE = Low VI = 2.7 V, VO = 1.2 V MODE = Low Figure 25. Figure 26. LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION 150 to 500 mA Load Step VI = 4.5 V, VO = 1.2 V 150 to 500 mA Load Step MODE = Low Figure 27. Copyright © 2010–2012, Texas Instruments Incorporated MODE = Low Figure 28. Submit Documentation Feedback Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 13 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) AC LOAD TRANSIENT RESPONSE PFM/PWM BOUNDARIES 140 PFM to PWM Mode Change Always PWM VI = 3.6 V, VO = 1.2 V 5 to 300 mA Load Sweep 120 The switching mode changes at these borders IO - Load Current - mA 100 MODE = Low 80 60 PWM to PFM Mode Change Always PFM 40 20 VO = 1.8 V (TPS82671) 0 2.7 Figure 30. PFM/PWM BOUNDARIES QUIESCENT CURRENT vs INPUT VOLTAGE 4.5 4.8 28 PFM to PWM Mode Change 120 26 Always PWM 24 IQ - Quiescent Current - mA 80 PWM to PFM Mode Change 60 Always PFM 40 TA = 85°C TA = 25°C 22 The switching mode changes at these borders 100 IO - Load Current - mA 3.3 3.6 3.9 4.2 VI - Input Voltage - V Figure 29. 140 20 20 18 16 14 12 TA = -40°C 10 8 6 4 VO = 1.2 V (TPS82674) 0 2.7 3 3.3 3.6 3.9 4.2 VI - Input Voltage - V Figure 31. 14 3 Submit Documentation Feedback 2 4.5 4.8 0 2.7 3 3.3 3.6 3.9 4.2 VI - Input Voltage - V 4.5 4.8 Figure 32. Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 TYPICAL CHARACTERISTICS (continued) PWM SWITCHING FREQUENCY vs INPUT VOLTAGE START-UP 6 IO = 150 mA fS - Switching Frequency - MHz 5.5 IO = 300 mA 5 VI = 3.6 V, VO = 1.8 V (TPS82671), IO = 0 mA IO = 400 mA 4.5 IO = 500 mA 4 3.5 MODE = Low 3 VO = 1.8 V 2.9 3.1 3.3 3.5 3.7 3.9 VI - Input Voltage - V 4.1 4.3 4.5 Figure 33. Figure 34. START-UP POWER SUPPLY REJECTION RATIO vs FREQUENCY VI = 3.6 V, VO = 1.8 V (TPS82671), RL = 100 Ω MODE = Low Figure 35. Copyright © 2010–2012, Texas Instruments Incorporated PSRR - Power Supply Rejection Ratio - dB 2.5 2.5 2.7 85 VI = 3.6 V, 80 IO = 10 mA VO = 1.8 V (TPS82671) 75 PFM Operation 70 IO = 150 mA 65 60 PWM Operation 55 50 45 40 35 IO = 400 mA 30 PWM Operation 25 20 15 10 5 0 0.01 0.1 1 10 100 1000 f - Frequency - kHz Figure 36. Submit Documentation Feedback Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 15 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) SPURIOUS OUTPUT NOISE (PFM MODE) vs FREQUENCY SPURIOUS OUTPUT NOISE (PWM MODE) vs FREQUENCY 5m 500 m Spurious Output Noise (PWM Mode) - V Spurious Output Noise (PFM Mode) - V 4.5 m 5m 3.5 m 3m 2.5 m VI = 2.7 V 2m VI = 4.2 V 1.5 m VI = 3.6 V 1m VO = 1.8 V (TPS82671), RL = 150 Ω 500 m 50 n 0 Span = 1 MHz f - Frequency - MHz 10 VO = 1.8 V (TPS82671), 450 m R = 12 Ω L 400 m VI = 4.2 V 350 m 300 m 250 m 200 m VI = 2.7 V 150 m 100 m VI = 3.6 V 50 m 5n 0 Span = 4 MHz f - Frequency - MHz Figure 37. 40 Figure 38. OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY 10 Output Spectral Noise Density - µV/VHz VIN = 3.6 V VOUT = 1.8 V (TPS82671) 1 IOUT = 150 mA (PWM Mode) 0.01 0.001 0.1 16 IOUT = 10 mA (PFM Mode) 0.1 Submit Documentation Feedback 1 10 100 f - Frequency - kHz Figure 39. 1000 Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 DETAILED DESCRIPTION OPERATION The TPS8267x is a stand-alone, synchronous, step-down converter. The converter operates at a regulated 5.5MHz frequency pulse width modulation (PWM) at moderate to heavy load currents. At light load currents, the TPS8267x converter operates in power-save mode with pulse frequency modulation (PFM). The converter uses a unique frequency-locked ring-oscillating modulator to achieve best-in-class load and line response. One key advantage of the non-linear architecture is that there is no traditional feed-back loop. The loop response to change in VO is essentially instantaneous, which explains the transient response. Although this type of operation normally results in a switching frequency that varies with input voltage and load current, an internal frequency lock loop (FLL) holds the switching frequency constant over a large range of operating conditions. Combined with best-in-class load and line-transient response characteristics, the low quiescent current of the device (approximately 17μA) helps to maintain high efficiency at light load while that current preserves a fast transient response for applications that require tight output regulation. The TPS8267x integrates an input current limit to protect the device against heavy load or short circuits and features an undervoltage lockout circuit to prevent the device from misoperation at low input voltages. Fully functional operation is permitted down to 2.1V input voltage. POWER-SAVE MODE If the load current decreases, the converter enters power-save mode automatically. During power-save mode, the converter operates in discontinuous current, (DCM) single-pulse PFM mode, which produces a low output ripple compared with other PFM architectures. When in power-save mode, the converter resumes its operation when the output voltage falls below the nominal voltage. The converter ramps up the output voltage with a minimum of one pulse and goes into power-save mode when the output voltage is within its regulation limits. The IC exits PFM mode and enters PWM mode when the output current can no longer be supported in PFM mode. As a consequence, the DC output voltage is typically positioned approximately 0.5% above the nominal output voltage. The transition between PFM and PWM is seamless. PFM Mode at Light Load PFM Ripple Nominal DC Output Voltage PWM Mode at Heavy Load Figure 40. Operation in PFM Mode and Transfer to PWM Mode MODE SELECTION The MODE pin selects the operating mode of the device. Connecting the MODE pin to GND enables the automatic PWM and power-save mode operation. The converter operates in regulated frequency PWM mode at moderate to heavy loads, and operates in PFM mode during light loads. This type of operation maintains high efficiency over a wide load current range. Pulling the MODE pin high forces the converter to operate in PWM mode even at light-load currents. The advantage is that the converter modulates its switching frequency according to a spread spectrum PWM modulation technique that allows simple filtering of the switching harmonics in noise-sensitive applications. In this mode, the efficiency is lower when compared to the power-save mode during light loads. Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 17 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 www.ti.com For additional flexibility, it is possible to switch from power-save mode to PWM mode during operation. This type of operation allows efficient power management by adjusting the operation of the converter to the specific system requirements. SPREAD SPECTRUM, PWM FREQUENCY DITHERING The goal of spread spectrum architecture is to spread out the emitted RF energy over a larger frequency range so that any resulting electromagnetic interference (EMI) is similar to white noise. The end result is a spectrum that is continuous and lower in peak amplitude. Spread spectrum makes it easier to comply with EMI standards. It also makes it easier to comply with the power supply ripple requirements in cellular and non-cellular wireless applications. Radio receivers are typically susceptible to narrowband noise that is focused on specific frequencies. Switching regulators can be particularly troublesome in applications where electromagnetic interference (EMI) is a concern. Switching regulators operate on a cycle-by-cycle basis to transfer power to an output. In most cases, the frequency of operation is either fixed or regulated, based on the output load. This method of conversion creates large components of noise at the frequency of operation (fundamental) and multiples of the operating frequency (harmonics). The spread spectrum architecture varies the switching frequency by approximately ±10% of the nominal switching frequency, thereby significantly reduces the peak radiated and conducting noise on both the input and output supplies. The frequency dithering scheme is modulated with a triangle profile and a modulation frequency fm. 0 dBV FENV,PEAK Dfc Dfc Non-modulated harmonic F1 Side-band harmonics window after modulation 0 dBVref B = 2 × fm × (1 + mf ) = 2 × ( Dfc + fm ) B = 2 × fm × (1 + mf ) = 2 × ( Dfc + fm ) Figure 41. Spectrum of a Frequency Modulated Sin. Wave with Sinusoidal Variation in Time Bh = 2 × fm × (1 + mf × h ) Figure 42. Spread Bands of Harmonics in Modulated Square Signals (1) Figure 41 and Figure 42 show that after modulation the sideband harmonic is attenuated when compared to the non-modulated harmonic, and when the harmonic energy is spread into a certain frequency band. The higher the modulation index (mf) the larger the attenuation. mƒ = δ ´ ƒc ƒm (1) With: fc is the carrier frequency (i.e. nominal switching frequency) fm is the modulating frequency (approx. 0.016*fc) δ is the modulation ratio (approx 0.1) d= (1) 18 D ƒc ƒc (2) Spectrum illustrations and formulae (Figure 41 and Figure 42) copyright IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, VOL. 47, NO.3, AUGUST 2005. See REFERENCES Section for full citation. Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 The maximum switching frequency is limited by the process and by the parameter modulation ratio (δ), together with fm, which is the bandwidth of the side-band harmonics around the carrier frequency fc. The bandwidth of a frequency modulated waveform is approximately given by the Carson’s rule and can be summarized as: B = 2 ´ ¦m ´ 1 + m ¦ ( )=2 ´ (D ¦c + ¦m ) (3) fm < RBW: The receiver is not able to distinguish individual side-band harmonics; so, several harmonics are added in the input filter and the measured value is higher than expected in theoretical calculations. fm > RBW: The receiver is able to properly measure each individual side-band harmonic separately, so that the measurements match the theoretical calculations. SOFT START The TPS8267x has an internal soft-start circuit that limits the in-rush current during start-up. This circuit limits input voltage drop when a battery or a high-impedance power source is connected to the input of the MicroSiP™ DC/DC converter. The soft-start system progressively increases the switching on-time from a minimum pulse-width of 35ns as a function of the output voltage. This mode of operation continues for approximately 100μs after the enable. If the output voltage does not reach its target value within the soft-start time, the soft-start transitions to a second mode of operation. If the output voltage rises above approximately 0.5V, the converter increases the input current limit and thus enables the power supply to come up properly. The start-up time mainly depends on the capacitance present at the output node and the load current. ENABLE The TPS8267x device starts operation when EN is set high and starts up with the soft start as previously described. For proper operation, the EN pin must be terminated and must not be left floating. Pulling the EN pin low forces the device into shutdown. In this mode, all internal circuits are turned off and the VIN current reduces to the device leakage current, which is typically a few hundred nanoamps. The TPS8267x device can actively discharge the output capacitor when it turns off. The integrated discharge resistor has a typical resistance of 100 Ω. The required time to ramp down the output voltage depends on the load current and the capacitance present at the output node. Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 19 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 www.ti.com APPLICATION INFORMATION INPUT CAPACITOR SELECTION Because of the pulsating input current nature of the buck converter, a low ESR input capacitor is required to prevent large voltage transients that can cause misbehavior of the device or interference in other circuits in the system. For most applications, the input capacitor that is integrated into the TPS8267x should be sufficient. If the application exhibits a noisy or erratic switching frequency, experiment with additional input ceramic capacitance to find a remedy. The TPS8267x uses a tiny ceramic input capacitor. When a ceramic capacitor is combined with trace or cable inductance, such as from a wall adapter, a load step at the output can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or can even damage the part. In this circumstance, additional "bulk" capacitance, such as electrolytic or tantalum, should be placed between the input of the converter and the power source lead to reduce ringing that can occur between the inductance of the power source leads and CI. OUTPUT CAPACITOR SELECTION The advanced, fast-response, voltage mode, control scheme of the TPS8267x allows the use of a tiny ceramic output capacitor (CO). For most applications, the output capacitor integrated in the TPS8267x is sufficient. At nominal load current, the device operates in PWM mode; the overall output voltage ripple is the sum of the voltage step that is caused by the output capacitor ESL and the ripple current that flows through the output capacitor impedance. At light loads, the output capacitor limits the output ripple voltage and provides holdup during large load transitions. The TPS8267x is designed as a Point-Of-Load (POL) regulator, to operate stand-alone without requiring any additional capacitance. Adding a 2.2μF ceramic output capacitor (X7R or X5R dielectric) generally works from a converter stability point of view, but does not necessarily help to minimize the output ripple voltage. For best operation (i.e. optimum efficiency over the entire load current range, proper PFM/PWM auto transition), the TPS8267xSIP requires a minimum output ripple voltage in PFM mode. The typical output voltage ripple is ca. 1% of the nominal output voltage VO. The PFM pulses are time controlled resulting in a PFM output voltage ripple and PFM frequency that depends (first order) on the capacitance seen at the MicroSiPTM DC/DC converter's output. In applications requiring additional output bypass capacitors located close to the load, care should be taken to ensure proper operation. If the converter exhibits marginal stability or erratic switching frequency, experiment with additional low value series resistance (e.g. 50 to 100mΩ) in the output path to find a remedy. Because the damping factor in the output path is directly related to several resistive parameters (e.g. inductor DCR, power-stage rDS(on), PWB DC resistance, load switches rDS(on) …) that are temperature dependant, the converter small and large signal behavior must be checked over the input voltage range, load current range and temperature range. The easiest sanity test is to evaluate, directly at the converter’s output, the following aspects: • • PFM/PWM efficiency PFM/PWM and forced PWM load transient response During the recovery time from a load transient, the output voltage can be monitored for settling time, overshoot or ringing that helps judge the converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin. 20 Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 LAYOUT CONSIDERATION In making the pad size for the SiP LGA balls, it is recommended that the layout use non-solder-mask defined (NSMD) land. With this method, the solder mask opening is made larger than the desired land area, and the opening size is defined by the copper pad width. Figure 43 shows the appropriate diameters for a MicroSiPTM layout. Copper Trace Width Solder Pad Width Solder Mask Opening Copper Trace Thickness Solder Mask Thickness M0200-01 Figure 43. Recommended Land Pattern Image and Dimensions SOLDER PAD DEFINITIONS (1) (2) (3) (4) COPPER PAD Non-solder-mask defined (NSMD) 0.30mm (1) (2) (3) (4) (5) (6) SOLDER MASK OPENING 0.360mm (5) COPPER THICKNESS STENCIL (6) OPENING STENCIL THICKNESS 1oz max (0.032mm) 0.34mm diameter 0.1mm thick Circuit traces from non-solder-mask defined PWB lands should be 75μm to 100μm wide in the exposed area inside the solder mask opening. Wider trace widths reduce device stand off and affect reliability. Best reliability results are achieved when the PWB laminate glass transition temperature is above the operating the range of the intended application. Recommend solder paste is Type 3 or Type 4. For a PWB using a Ni/Au surface finish, the gold thickness should be less than 0.5mm to avoid a reduction in thermal fatigue performance. Solder mask thickness should be less than 20 μm on top of the copper circuit pattern. For best solder stencil performance use laser cut stencils with electro polishing. Chemically etched stencils give inferior solder paste volume control. SURFACE MOUNT INFORMATION The TPS8267x MicroSiP™ DC/DC converter uses an open frame construction that is designed for a fully automated assembly process and that features a large surface area for pick and place operations. See the "Pick Area" in the package drawings. Package height and weight have been kept to a minimum thereby to allow the MicroSiP™ device to be handled similarly to a 0805 component. See JEDEC/IPC standard J-STD-20b for reflow recommendations. Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 21 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 www.ti.com THERMAL INFORMATION The die temperature of the TPS8267x must be lower than the maximum rating of 125°C, so care should be taken in the layout of the circuit to ensure good heat sinking of the TPS8267x. To estimate the junction temperature, approximate the power dissipation within the TPS8267x by applying the typical efficiency stated in this datasheet to the desired output power; or, by taking a power measurement if you have an actual TPS8267x device and TPS82671EVM evaluation module. Then calculate the internal temperature rise of the TPS8267x above the surface of the printed circuit board by multiplying the TPS8267x power dissipation by the thermal resistance. The actual thermal resistance of the TPS8267x to the printed circuit board depends on the layout of the circuit board, but the thermal resistance given in the Thermal Information Table can be used as a guide. Three basic approaches for enhancing thermal performance are listed below: • Improve the power dissipation capability of the PCB design. • Improve the thermal coupling of the component to the PCB. • Introduce airflow into the system. PACKAGE SUMMARY SIP PACKAGE TOP VIEW A1 BOTTOM VIEW YML D CC LSB C1 C2 B1 B2 A1 A2 C3 A3 E Code: • CC — Customer Code (device/voltage specific) • YML — Y: Year, M: Month, L: Lot trace code • LSB — L: Lot trace code, S: Site code, B: Board locator MicroSiPTM DC/DC MODULE PACKAGE DIMENSIONS The TPS8267x device is available in an 8-bump ball grid array (BGA) package. The package dimensions are: • D = 2.30 ±0.05 mm • E = 2.90 ±0.05 mm REFERENCES "EMI Reduction in Switched Power Converters Using Frequency Modulation Techniques", in IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, VOL. 4, NO. 3, AUGUST 2005, pp 569-576 by Josep Balcells, Alfonso Santolaria, Antonio Orlandi, David González, Javier Gago. 22 Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 TPS82670, TPS82671, TPS82672, TPS82673 TPS82674, TPS82675, TPS82676, TPS82677, TPS826711 www.ti.com SLVSAI0D – OCTOBER 2010 – REVISED APRIL 2012 REVISION HISTORY Note: Page numbers of current version may differ form previous versions. Changes from Original (October 2010) to Revision A Page • Added devices TPS82677 and TPS82678 to Header info ................................................................................................... 1 • Added TPS82678 to Ordering Info table and removed "Product Preview" attribute from TPS82677 .................................. 2 • Changed graph for Figure 8 .................................................................................................................................................. 8 • Changed graph for Figure 11 ................................................................................................................................................ 9 • Added copyright attribution for spectrum illustrations ......................................................................................................... 18 Changes from Revision A (April 2011) to Revision B Page • Added TPS82676 part number to the data sheet header ..................................................................................................... 1 • Deleted product preview attribute fromTPS82676 device in the Ordering Information table. .............................................. 2 Changes from Revision B (August 2011) to Revision C Page • Added device TPS82672 to Header info .............................................................................................................................. 1 • Deleted Product Preview annotation from device TPS82672 in Ordering Info table ............................................................ 2 Changes from Revision C (November 2011) to Revision D Page • Added devices TPS82670, TPS82673, and TPS82674 to Header ...................................................................................... 1 • Changed the TPS82678SIP Package Marking From: TT To: TN in the Ordering Information table ................................... 2 Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS82670 TPS82671 TPS82672 TPS82673 TPS82674 TPS82675 TPS82676 TPS82677 TPS826711 23 PACKAGE OPTION ADDENDUM www.ti.com 26-Jun-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TPS82670SIPR ACTIVE uSiP SIP 8 3000 TBD Call TI Call TI TPS82670SIPT ACTIVE uSiP SIP 8 250 TBD Call TI Call TI TPS826711SIPR PREVIEW uSiP SIP 8 3000 TBD Call TI Call TI TPS826711SIPT PREVIEW uSiP SIP 8 250 TBD Call TI Call TI TPS82671SIPR ACTIVE uSiP SIP 8 3000 TBD Call TI Call TI TPS82671SIPT ACTIVE uSiP SIP 8 250 TBD Call TI Call TI TPS82672SIPR ACTIVE uSiP SIP 8 3000 TBD Call TI Call TI TPS82672SIPT ACTIVE uSiP SIP 8 250 TBD Call TI Call TI TPS82673SIPR ACTIVE uSiP SIP 8 3000 TBD Call TI Call TI TPS82673SIPT ACTIVE uSiP SIP 8 250 TBD Call TI Call TI TPS82675SIPR ACTIVE uSiP SIP 8 3000 TBD Call TI Call TI TPS82675SIPT ACTIVE uSiP SIP 8 250 TBD Call TI Call TI TPS82676SIPR ACTIVE uSiP SIP 8 3000 TBD Call TI Call TI TPS82676SIPT ACTIVE uSiP SIP 8 250 TBD Call TI Call TI TPS82677SIPR ACTIVE uSiP SIP 8 3000 TBD Call TI Call TI TPS82677SIPT ACTIVE uSiP SIP 8 250 TBD Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com (3) 26-Jun-2012 MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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