NX2155H SINGLE POWER SUPPLY SYNCHRONOUS PWM CONTROLLER ADVANCED DATA SHEET Pb Free Product FEATURES DESCRIPTION The NX2155H controller IC is a single input supply synchronous Buck controller IC designed for step down DC to DC converter applications. NX2155H is optimized to convert bus voltages from 8V to 22V to output as low as 0.8V voltage. An internal regulator converts bus voltage to 5V, which provides voltage supply to internal logic and driver circuit. The NX2155H can operates at programmable frequency of 2MHz and employs loss-less current limiting by sensing the Rdson of synchronous MOSFET followed by hiccup feature.Feedback under voltage triggers Hiccup. Other features of the device are: Internal schottky diode, thermal shutdown, 5V gate drive, adaptive deadband control, internal digital soft start, 5VREG undervoltage lock out and Shutdown capability via the comp pin. n Single supply voltage from 8V to 22V n Internal 5V regulator n Programmable operational frequency of 2MHz n Internal Digital Soft Start Function n Less than 50 nS adaptive deadband n Current limit triggers hiccup by sensing Rdson of Synchronous MOSFET n Pb-free and RoHS compliant APPLICATIONS n n n n LCD TV Graphic Card on board converters Memory Vddq Supply in mother board applications On board DC to DC such as 12V to 3.3V, 2.5V or 1.8V n Hard Disk Drive n Set Top Box TYPICAL APPLICATION VIN +12V 10u 6 VIN BST 3 0.1u 5VREG 4.7u 4.22k 7 RT NX2155H 5 HDRV 2 0.1u M1 AO6800 1u VOUT +5V@2A SW 1 6k OCP 10 300 LDRV 4 180p 8 COMP FB 2 x (10uF,10V,X5R) 49.9k 9 9.53k GND(PAD) 15k 1n 10p Figure1 - Typical application of 2155H ORDERING INFORMATION Device Temperature Package Package Marking Pb-Free NX2155HCUPTR 0 to 70o C MSOP-EP-10L NX155HXXX Yes Note: XXX is date code. For example, 841 means that this NX2155H is packaged in the 41th week of 2008 Rev.1.1 04/16/09 1 NX2155H ABSOLUTE MAXIMUM RATINGS(NOTE1) VCC to GND & BST to SW voltage ................... 6.5V BST to GND Voltage ...................................... 30V VIN to GND Voltage ........................................ 25V SW to GND .................................................... -2V to 35V All other pins .................................................. -0.3V to 6.5V Storage Temperature Range ............................. -65oC to 150oC Operating Junction Temperature Range ............. -40oC to 125oC NOTE1: Stresses above those listed in "ABSOLUTE MAXIMUM RATINGS", may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. PACKAGE INFORMATION 10-LEAD PLASTIC MSOP-EP θ JA ≈ 46o C/W SW 1 10 OCP HDRV 2 BST 3 9 FB GND (PAD) LDRV 4 5VREG 5 8 COMP 7 RT 6 VIN ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over Vin = 12V, and T A = 0 to 70oC. Followings are bypass capacitors:CVIN=1uF, C5VREG=4.7uF, all X5R ceramic capacitors. Typical values refer to T A = 25oC. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. PARAMETER Reference Voltage Ref Voltage SYM VREF Ref Voltage line regulation 5VREG Input Voltage Current(Static) Input Voltage Current (Dynamic) Rev.1.1 04/16/09 Min TYP MAX 0.784 0.8 0.816 Vin=8V to 22V 5VREG Voltage range 5VREG UVLO 5VREG UVLO Hysteresis 5VREG Line Regulation 5VREG Max Current Supply Voltage(Vin) Vin Voltage Range Test Condition 0.4 4.75 5V REG rising VIN =9V to 22V 20 Vin No switching Switching with HDRV and LDRV open @2.2MHz Units V % 5 3.9 0.2 5.25 4.4 V V V 10 50 20 mV mA V mA mA 8 3.7 4.8 22 6.5 5.4 8 11 2 NX2155H PARAMET ER Vin UVLO V in-Threshold SYM Test Condition V in_UVLO Vin Rising V in-Hysteresis SS V in_Hyst Vin Falling Soft Start time Oscillator (Rt) Frequency Tss Ramp-Amplitude Voltage Max Duty Cycle Min Controlable On Time Error Amplifiers T ransconductance Input Bias Current Comp SD Threshold FBUVL O Feedback UVLO threshold High Side Driver(C L=2200pF) Output Impedance , Sourcing Output Impedance , Sinking Rise Time Fall Tim e Deadband Time Low Side Driver (C L=2200pF) Output Impedance, Sourcing Current Output Impedance, Sinking Rise Time Fall Tim e Deadband Time OCP OCP current Over temperature T hreshold Hysteresis Internal Schottky Diode Forward voltage drop Rev.1.1 04/16/09 FS Min TYP MAX Units 6 6.5 7.5 V FS=2.2MHz Rt=4.22k V RAMP FS=2.2MHz 1.4 62 0.6 V 400 uS 2250 kHz 1.5 71 1.9 80 150 V % nS 1500 2000 10 2500 umho nA 0.24 0.3 0.36 V 0.54 0.6 0.66 V Ib Rsource(Hdrv) I=200mA 1.9 ohm R sink(Hdrv) I=200mA 1.7 ohm 14 17 30 ns ns ns THdrv(Rise) THdrv(Fall) Tdead(L to H) Ldrv going Low to Hdrv going High, 10%-10% Rsource (Ldrv) I=200mA R sink (Ldrv) I=200mA TLdrv(Rise) TLdrv(Fall) Tdead(H to SW going Low to Ldrv L) going High, 10% to 10% 21 39 1.9 ohm 7 1 13 12 10 13 ohm ns ns ns 30 37 45 uA o 150 20 forward current=20mA 350 o 500 C C mV 3 NX2155H PIN DESCRIPTIONS PIN # 5 5VREG PIN DESCRIPTION An internal 5V regulator provides supply voltage for the low side fet driver, BST and internal logic circuit. A high frequency 4.7uF X5R ceramic capacitor must be connected from this pin to the GND pin as close as possible. 6 VIN Voltage supply for the internal 5V regulator. A high freuqncy 0.1uF ceramic capacitor must be connected from this pin to GND. 9 FB This pin is the error amplifier inverting input. This pin is also connected to the output UVLO comparator. When this pin falls below threshold, both HDRV and LDRV outputs are in hiccup. 8 COMP This pin is the output of the error amplifier and together with FB pin is used to compensate the voltage control feedback loop. This pin is also used as a shut down pin. When this pin is pulled below 0.3V, both drivers are turned off and internal soft start is reset. 3 BST This pin supplies voltage to the high side driver. A high frequency ceramic capacitor of 0.1 to 1 uF must be connected from this pin to SW pin. 10 OCP This pin is connected to the drain of the external low side MOSFET and is the input of the over current protection(OCP) comparator. An internal current source is flown to the external resistor which sets the OCP voltage across the Rdson of the low side MOSFET. Current limit point is this voltage divided by the Rdson. 1 SW This pin is connected to the source of the high side MOSFET and provides return path for the high side driver. 2 HDRV High side MOSFET gate driver. PAD GND Ground pin. 4 LDRV Low side MOSFET gate driver. 7 RT Oscillator's frequency can be set by using an external resistor from this pin to GND. Rev.1.1 04/16/09 PIN SYMBOL 4 NX2155H BLOCK DIAGRAM VIN 5V Regulator 5VREG UVLO 1.25V Bias Generator 0.8V UVLO BST POR START HDRV COMP 0.3V SW RT OC OVP START 0.8V Latch VCC PWM OSC Digital start Up Control Logic ramp S R Q Thermal Shutdown LDRV Hiccup Logic FB 0.6V CLAMP COMP SS_done 0.6V 1.3V CLAMP FB START OCP GND START VCC Figure 2 - Simplified block diagram of the NX2155H Rev.1.1 04/16/09 5 NX2155H Demoboard Design(VIN=12V, VOUT= 5V/2A, FREUQNCY=2.2MHz) sdfd BUS C1 CIN2 CIN1 5 10uF,16V BST VCC C2 4.7u HDRV 0.1uF 3 2 C3 0.1u R8 4 VIN 6 0.1u M1B AO6800 HDRV 3 0 2 U1 L1 SW SW 1 OUT VOUT BRL3225T1R0M OCP 10 R2 6 6k LDRV M1A AO6800 COUT1 10uF,16V R7 10 COUT2 10uF,16V R4 49.9k GND C7 470p GND FB R3 300 LDRV 1 4 5 R1 4.22k RT NX2155H/MSOP-EP10 7 C4 180p 9 R6 15k 8 C6 10p R5 9.53k 11 GNDPAD COMP C5 1n * R7 and C7 are optional. Figure 3 - Simplified demoboard schematic of NX2155H Rev.1.1 04/16/09 6 NX2155H Bill of Materials Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Rev.1.1 04/16/09 Quantity 3 1 1 1 1 1 1 2 1 1 1 1 1 1 1 1 1 1 1 Reference C1,C3,CIN1 C2 C4 C5 C6 C7 CIN2 COUT1,COUT2 L1 M1 R1 R2 R3 R4 R5 R6 R7 R8 U1 Part 0.1u 4.7uF,6.3V,X5R 180p 1n 10p 470p 10uF,16V,X5R 10uF,10V,X5R BRL3225T1R0M AO6800 4.22k 6k 300 49.9k 9.53k 15k 10 0 NX2155H/MSOP-EP10 Manufacturer TAIYO YUDEN AOS NEXSEM INC. 7 NX2155H Demoboard Waveforms Fig.4 Output ripple(CH1 VOUT AC 50mV/DIV, CH2 SW 10V/DIV, CH4 OUTPUT CURRENT 2A/DIV) Fig.6 OCP protection during output short(CH1 VOUT 2V/DIV, CH4 OUTPUT CURRENT 5A/DIV) Fig.5 Startup( CH1 VOUT 2V/DIV) Fig.7 Output dynamic response(CH1 VOUT AC 200mV/DIV, CH4 OUTPUT CURRENT 500mA/DIV) 100.00% 90.00% 80.00% Efficiency (%) 70.00% 60.00% 50.00% 40.00% 30.00% 20.00% 10.00% 0.00% 0 500 1000 1500 2000 2500 Iout (mA) Fig.8 Output efficiency Rev.1.1 04/16/09 8 NX2155H Demoboard Layout Figure 9 Top layer Figure 10 Ground layer Rev.1.1 04/16/09 9 NX2155H Figure 11 Power layer Figure 12 Bottom layer Rev.1.1 04/16/09 10 NX2155H Demoboard Design( (VIN=12V, VOUT= 5V/10A, FREUQNCY=400kHz) BUS BUS 1 C18 100u/16v VIN 6 C3 BST 3 C9 VCC M1 HDRV HDRV 2 4 BSC119N03S 8 7 6 5 9 22u/25V SW 1 2 3 U1 RT SW SW 1 1 L1 VOUT VOUT 2 DO5010H-222MLD C14 C15 47uF/6.3V/X5R 47uF/6.3V/X5R OCP 10 C19 47uF/6.3V/X5R GND R1 M2 LDRV 4 LDRV 4 BSC029N025S 3k 1 2 3 R3 30k N X 2 1 5 5 /M S O P -EP10 7 22u/25V C4 0.1u C5 4.7u C10 8 7 6 5 9 5 0.1u R17 2.15 C13 1000p R9 100k FB 9 R7 30k 8 C22 33p R8 C23 750 220p 11 GNDPAD COMP C21 1n R10 19.1k Figure 13 - Simplified demoboard schematic of NX2155H Rev.1.1 04/16/09 11 NX2155H Bill of Materials Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Rev.1.1 04/16/09 Quantity 2 1 2 1 3 1 1 1 1 1 1 1 1 2 1 1 1 1 1 Reference C3,C4 C5 C9,C10 C13 C14,C15,C19 C18 C21 C22 C23 L1 M1 M2 R1 R3,R7 R8 R9 R10 R17 U1 Part 0.1u 4.7u 22u/25V/X5R 1000p 47uF/6.3V/X5R 100u/16v 1n 33p 220p DO5010H-222MLD BSC119N03S BSC029N025S 3k 30k 750 100k 19.1k 2.15 NX2155/MSOP-EP10 Manufacturer COILCRAFT INFINEON INFINEON NEXSEM INC. 12 NX2155H Demoboard Waveforms Fig.14 Output ripple(CH1 SW 10V/DIV, CH2 VOUT AC 50mV/DIV, CH4 INDUCTOR CURRENT 5A/DIV) Fig.16 OCP protection during output short(CH2 VOUT 2V/DIV, CH4 OUTPUT CURRENT 5A/DIV) Fig.15 Startup( CH1 VOUT 2V/DIV, CH4 INDUCTOR CURRENT 5A/DIV) Fig.17 Output dynamic response(CH2 VOUT AC 200mV/DIV, CH4 OUTPUT CURRENT 5A/DIV) Fig.18 Output efficiency Rev.1.1 04/16/09 13 NX2155H APPLICATION INFORMATION Symbol Used In Application Information: Compensator Design Due to the double pole generated by LC filter of the VIN - Input voltage power stage, the power system has 180o phase shift , VOUT - Output voltage and therefore, is unstable by itself. In order to achieve IOUT - Output current accurate output voltage and fast transient response, DVRIPPLE - Output voltage ripple compensator is employed to provide highest possible FS bandwidth and enough phase margin.Ideally,the Bode - Working frequency plot of the closed loop system has crossover frequency DIRIPPLE - Inductor current ripple between1/10 and 1/5 of the switching frequency, phase margin greater than 50o and the gain crossing 0dB with - Output Inductor Selection The selection of inductor value is based on inductor ripple current, power rating, working frequency and efficiency. Larger inductor value normally means smaller ripple current. However if the inductance is chosen too large, it brings slow response and lower efficiency. Usually the ripple current ranges from 20% to 40% of the output current. This is a design freedom which can be decided by design engineer according to various application requirements. The inductor value can be calculated by using the following equations: V -V V 1 L OUT = IN OUT × OUT × VIN FS ∆IRIPPLE IRIPPLE =k × IOUTPUT 20dB/decade. Power stage output capacitors usually decide the compensator type. If electrolytic capacitors are chosen as output capacitors, type II compensator can be used to compensate the system, because the zero caused by output capacitor ESR is lower than crossover frequency. Otherwise type III compensator should be chosen. A. Type III compensator design For low ESR output capacitors, typically such as Sanyo oscap and poscap, the frequency of ESR zero caused by output capacitors is higher than the cross- ...(1) over frequency. In this case, it is necessary to compensate the system with type III compensator. The follow- where k is between 0.2 to 0.4. ing figures and equations show how to realize the type III compensator by transconductance amplifier. Output Capacitor Selection Output capacitor is basically decided by the amount of the output voltage ripple allowed during steady state(DC) load condition as well as specification for the load transient. The optimum design may require a couple of iterations to satisfy both condition. FZ1 = 1 2 × π × R 4 × C2 ...(3) FZ2 = 1 2 × π × (R 2 + R 3 ) × C 3 ...(4) FP1 = 1 2 × π × R 3 × C3 ...(5) The amount of voltage ripple during the DC load condition is determined by equation(2). ∆VRIPPLE = ESR × ∆IRIPPLE ∆IRIPPLE + 8 × FS × COUT ...(2) FP2 = 1 2 × π × R4 × C1 × C 2 C1 + C 2 ...(6) Where ESR is the output capacitors' equivalent where FZ1,FZ2,FP1 and FP2 are poles and zeros in series resistance,COUT is the value of output capacitors. the compensator. Their locations are shown in figure 20. Typically when ceramic capacitors are selected as The transfer function of type III compensator for output capacitors, DC ripple spec is easy to be met, but transconductance amplifier is given by: mutiple ceramic capacitors are required at the output to Ve 1 − gm × Z f = VOUT 1 + gm × Zin + Z in / R1 meet transient requirement. Rev.1.1 04/16/09 14 NX2155H For the voltage amplifier, the transfer function of B. Type II compensator design Type II compensator can be realized by simple RC compensator is circuit without feedback as shown in figure 22. R3 and C1 Ve −Z f = VOUT Zin introduce a zero to cancel the double pole effect. C2 introduces a pole to suppress the switching noise. The To achieve the same effect as voltage amplifier, the compensator of transconductance amplifier must following equations show the compensator pole zero location and constant gain. satisfythiscondition:R4>>2/gm. And it would be desirable if R 1||R2||R3>>1/gm can be met at the same time. Zin Zf C1 Vout R3 R2 C3 C2 Gain=gm × Fz = R1 × R3 R1 +R 2 1 2 × π × R 3 × C1 Fp ≈ ... (7) ... (8) 1 2 × π × R3 × C2 ... (9) R4 For this type of compensator, FO has to satisfy FLC<FESR<<FO<=1/10~1/5Fs. Fb gm Ve R1 power stage Figure 19 - Type III compensator using transconductance amplifier Gain(db) Vref 40dB/decade loop gain Gain(db) power stage 20dB/decade FLC 40dB/decade compensator Gain loop gain 20dB/decade FZ FLC FESR FO FP FESR FO Figure 21 - Bode plot of Type II compensator compensator FZ1 FZ2 FP2 FP1 F S Figure 20 - Bode plot of Type III compensator Rev.1.1 04/16/09 15 NX2155H Over Current Protection Over current protection is achieved by sensing cur- Vout rent through the low side MOSFET. A typical internal R2 current source of 37uA flowing through an external resis- Fb tor connected from OCP pin to SW node sets the over Ve gm current protection threshold. When synchronous FET is R1 R3 Vref on, the voltage at node SW is given as C2 VSW =-IL × RDSON C1 The voltage at pin OCP is given as IOCP × ROCP +VSW When the voltage is below zero, the over current Figure 22 - Type II compensator with occurs. transconductance amplifier vbus I OCP Output Voltage Calculation OCP Output voltage is set by reference voltage and ex- SW R OCP ternal voltage divider. The reference voltage is fixed at OCP comparator 0.8V. The divider consists of two ratioed resistors so that the output voltage applied at the Fb pin is 0.8V when the output voltage is at the desired value. The following Figure 24 - Over current protection equation and picture show the relationship between The over current limit can be set by the following VOUT , VREF and voltage divider.. R 1= R 2 × VR E F V O U T -V R E F equation ISET = ...(10) IOCP × ROCP K × RDSON where R2 is part of the compensator, and the value of R1 value can be set by voltage divider. Frequency Selection The frequency can be set by external Rt resistor. See compensator design for R1 and R2 selection. The relationship between frequency and RT pin is shown as follows. Vout NX2155H Frequency vs Rt R2 Fb 2500 Vref Voltage divider Frequency(kHz) 2000 R1 1500 1000 500 Figure 23 - Voltage divider 0 3 8 13 18 23 28 33 38 Rt(kohm) Figure 25 - Frequency versus Rt resistor Rev.1.1 04/16/09 16 NX2155H MSOP 10 PIN WITH EXPOSED PAD OUTLINE DIMENSIONS NOTE: ALL DIMENSIONS ARE DISPLAYED IN INCHES. Rev.1.1 04/16/09 17