AMMP-6233 18 to 32 GHz GaAs Low Noise Amplifier Data Sheet Description Features Avago Technologies’ AMMP-6233 is a high gain, lownoise amplifier that operates from 18 GHz to 32 GHz. It has a 3 dB noise figure, over 20 dB of gain and designed to be an easy-to-use drop-in with any surface mount PCB application. Popular applications include microwave radios, 802.16 and satellite VSAT or DBS receivers. The fully integrated microwave circuit eliminated the complex tuning and assembly processes typically required by hybrid (discrete-FET) amplifiers. The surface mount package allows elimination of “chip & wire” assembly for lower cost. The device has 50 Ω input and output match and is unconditionally stable. The MMIC has fully integrated input and output DC blocking capacitors and bias choke. The backside of the package is both RF and DC ground that simplifies the assembly process. It is fabricated in a PHEMT process to provide exceptional low noise and gain performance. • Surface Mount Package, 5.0 x 5.0 x 1.25 mm Pin Connections (Top View) 3 4 2 8 1 7 6 5 • Integrated DC block and choke • 50 Ω Input and Output Match • Single Positive Supply Pin • No Negative Gate Bias Specifications (Vd=3.0V, Idd=65mA) • Broadband RF from 18 to 32 GHz • High Gain of 23dB • Low Gain Flatness: ± 1dB • Typical Noise Figure of 2.6 dB • Typical OIP3 of 19dBm Applications • Microwave Radio systems Pin 1 2 3 4 5 6 7 8 Function Vdd RFout • Satellite VSAT, DBS Up/Down Link • LMDS & Pt-Pt mmW Long Haul • Broadband Wireless Access (including 802.16 and 802.20 WiMax) • WLL and MMDS loops • Commercial grade military RFin Note: These devices are ESD sensitive. The following precautions are strongly recommended. Ensure that an ESD approved carrier is used when units are transported from one destination to another. Personal grounding is to be worn at all times when handling these devices. The manufacturer assumes no responsibilities for ESD damage due to improper storage and handling of these devices. Absolute Maximum Ratings (1) DC Specifications/ Physical Properties (2) Sym Parameters/Condition Unit Max Vd Drain to Ground Voltage V 5.5 Id Drain Current mA 100 Pin RF CW Input Power Max dBm 10 Tch Max channel temperature C +150 Tstg Storage temperature C -65 +150 C 260 for 20s Tmax Maximum Assembly Temp Notes: 1. Operation in excess of any of these conditions may result in permanent damage to this device. The absolute maximum ratings for Vd, Id and Pin were determined at an ambient temperature of 25°C unless noted otherwise. Sym Parameter and Test Condition Unit Min Typ Max Idd Drain Supply Current under any RF power drive and temp. (Vdd=3.0 V) mA 40 65 90 Vd Drain Supply Voltage V 3 5 qjc Thermal Resistance(3) C/W 27 Notes: 2. Ambient operational temperature TA=25°C unless noted 3. Channel-to-backside Thermal Resistance (Tchannel = 34°C) as measured using infrared microscopy. Thermal Resistance at backside temp. (Tb) = 25°C calculated from measured data. AMMP-6233 RF Specifications (4,5,6) TA= 25°C, Vdd=3.0 V, Idd= 65 mA, Zin=Zo=50 Ω Symbol Parameters and Test Conditions Freq Operational Frequency Gain RF Small Signal Gain NF Noise Figure into 50W Freq Units Min. GHz 18 18GHz dB 19 23.2 26GHz dB 20.8 24.4 29GHz dB 20 23.6 18GHz dB 2.6 3.6 26GHz dB 2.2 3.2 29GHz dB 2.6 3.5 Rlin Input Return Loss dB -10 Rlout Output Return Loss dB -13 Iso Isolation dB -45 P1dB Output Power at 1dB gain compression dBm 8 OIP3 Output Third Order Intercept Point dBm 18 Typ. Max. 32 Notes: 4. Small/Large -signal data measured in a fully de-embedded test fixture form TA = 25°C. 5. Specifications are derived from measurements in a 50 Ω test environment. Aspects of the amplifier performance may be improved over a narrower bandwidth by application of additional conjugate, linearity, or low noise (Gopt) matching. 6. All tested parameters guaranteed with measurement accuracy +/-0.5dB for NF and +/-1dB for gain at 18GHz, 26GHz and +/-1.5dB for gain at 29GHz. AMMP-6233 Typical Performance [1], [2] 25 6.0 20 5.0 NoiseFigure(dB) S21(dB) (TA = 25°C, Vdd=3V, Idd=65mA, Zin = Zout = 50 Ω unless noted) 15 10 5 4.0 3.0 2.0 1.0 0.0 0 15 20 25 30 18 35 20 22 Frequency(GHz) Figure 1. Gain -5 20 OP1dB&OIP3(dBm) 25 S11(dB) -10 -15 -20 -25 -30 20 25 30 30 32 10 OP-1dB OIP3 5 18 20 22 24 26 28 30 32 Frequency(GHz) Figure 3. Input Return Loss Figure 4. Output P-1dB and Output IP3 0 0 -5 -10 -10 -20 S12(dB) S22(dB) 28 15 0 35 Frequency(GHz) -15 -20 -25 -30 -40 -50 -30 15 20 25 Frequency(GHz) Figure 5. Output Return Loss 26 Figure 2. Noise Figure 0 15 24 Frequency(GHz) 30 35 -60 15 Figure 6. Isolation 20 25 Frequency(GHz) 30 35 AMMP-6233 Typical Performance (cont) [1], [2] 25 6.0 20 5.0 NoiseFigure(dB) S21(dB) (TA = 25°C, Vdd=3V, Idd=65mA, Zin = Zout = 50 Ω unless noted) 15 10 3V 4V 5V 5 0 16 18 20 22 24 26 28 30 4.0 3.0 2.0 0.0 32 3V 4V 5V 1.0 18 20 22 Frequency(GHz) 20 5.0 NoiseFigure(dB) S21(dB) 6.0 15 25°C -40°C 85°C 10 5 30 32 20 22 24 26 28 30 -40°C +25°C +85°C 4.0 3.0 2.0 1.0 0 0.0 32 18 Frequency(GHz) Figure 9. Gain over Temperature 20 22 24 26 28 Frequency(GHz) 30 32 Figure 10. Noise Figure over Temperature 80 25 20 OIP3(dBm) 75 Idd(mA) 28 Figure 8. Noise Figure over Vdd 25 18 26 Frequency(GHz) Figure 7. Gain over Vdd 16 24 70 65 15 10 3V 4V 5V 5 60 3 3.5 4 Vdd(V) 4.5 5 0 18 20 22 24 26 28 30 32 Frequency(GHz) Figure 11. Idd over Vdd Figure 12. Output IP3 over Vdd Note: 1. S-parameters are taken with the Evaluation Board as shown in Figure 14. Effects of board and connector are included in the graphs. Loss of board and connector are de-embeded from Gain data. 2. Noise Figure is measured with a 3-dB pad at the input of the device. Losses are de-embeded from the data shown in Figure 2, 8 and 10. AMMP-6233 Application and Usage Vdd 3 4 RFin 2 0.1uF 8 1 7 6 Biasing and Operation RFout 5 The AMMP-6233 is normally biased with a positive drain supply connected to the VDD pin through a 0.1uF bypass capacitor as shown in Figure 13. The recommended drain supply voltage is 3V. It is important to have 0.1uF bypass capacitor, and the capacitor should be placed as close to the component as possible. Input and output ports are DC-blocked. Impedance matching at input and output ports are achieved on-chip, therefore, no extra external component is needed. Aspects of the amplifier performance may be improved over a narrower bandwidth by application of additional conjugate, linearity, or low noise (Γopt) matching No ground wires are needed because all ground connections are made with plated through-holes to the backside of the package. Refer the Absolute Maximum Ratings table for allowed DC and thermal condition AMMP-6233 Figure 13. Application of AMMP-6233 Figure 14. Evaluation / Test Board (Available to qualified customer requests) Vcc Out In Figure 15. Simplified LNA Schematic Recommended SMT Attachment for 5x5 Package Figure 16a. PCB Land Pattern Figure 16b. PCB Stencil Layouts NOTES: DIMENSIONS ARE IN INCHES [MILIMETERS] ALL GROUNDS MUST BE SOLDERED TO PCB RF Material is Rogers RO4350, 0.010” thick The AMMP Packaged Devices are compatible with high volume surface mount PCB assembly processes. The PCB material and mounting pattern, as defined in the data sheet, optimizes RF performance and is strongly recommended. An electronic drawing of the land pattern is available upon request from Avago Sales & Application Engineering. Figure 16c. PCB Land Pattern with Stencil Layouts Manual Assembly • Follow ESD precautions while handling packages. • Handling should be along the edges with tweezers. • Recommended attachment is conductive solder paste. Please see recommended solder reflow profile. Neither Conductive epoxy or hand soldering is recommended. • Apply solder paste using a stencil printer or dot placement. The volume of solder paste will be dependent on PCB and component layout and should be controlled to ensure consistent mechanical and electrical performance. • Follow solder paste and vendor’s recommendations when developing a solder reflow profile. A standard profile will have a steady ramp up from room temperature to the pre-heat temp. to avoid damage due to thermal shock. • Packages have been qualified to withstand a peak temperature of 260°C for 20 seconds. Verify that the profile will not expose device beyond these limits. 300 The most commonly used solder reflow method is accomplished in a belt furnace using convection heat transfer. The suggested reflow profile for automated reflow processes is shown in Figure 17. This profile is designed to ensure reliable finished joints. However, the profile indicated in Figure 1 will vary among different solder pastes from different manufacturers and is shown here for reference only. Peak=250±5˚C 250 Temp(C) A properly designed solder screen or stencil is required to ensure optimum amount of solder paste is deposited onto the PCB pads. The recommended stencil layout is shown in Figure 16. The stencil has a solder paste deposition opening approximately 70% to 90% of the PCB pad. Reducing stencil opening can potentially generate more voids underneath. On the other hand, stencil openings larger than 100% will lead to excessive solder paste smear or bridging across the I/O pads. Considering the fact that solder paste thickness will directly affect the quality of the solder joint, a good choice is to use a laser cut stencil composed of 0.127mm (5 mils) thick stainless steel which is capable of producing the required fine stencil outline. Meltingpoint=218˚C 200 150 100 50 0 Ramp1 0 50 Preheat Ramp2 100 Reflow 150 Seconds 200 Cooling 250 300 Figure 17. Suggested Lead-Free Reflow Profile for SnAgCu Solder Paste Package, Tape & Reel, and Ordering Information .011 Back View Carrier Tape and Pocket Dimensions AMMP-6233 Part Number Ordering Information Part Number Devices Per Container Container AMMP-6233-BLKG 10 Antistatic bag AMMP-6233-TR1G 100 7” Reel AMMP-6233-TR2G 500 7” Reel Note: No RF performance degradation is seen due to ESD upto 50V HBM and 200V MM. The DC characteristics in general show increased leakage at lower ESD discharge voltages. The user is reminded that this device is ESD sensitive and needs to be handled with all necessary ESD protocols. For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0666EN AV02-0489EN - June 12, 2007