TH8082 Enhanced SoloLIN Transceiver Features Compatible to LIN Physical Layer Specification Rev.1.3 and 2.0 Compatible to ISO9141 functions Operating voltage VS = 7 to 18 V Very low standby current consumption of 6.5µA in sleep mode Remote wake up via bus traffic Baud rate up to 20 kBaud Control output for voltage regulator with low on – resistance for switchable master termination Low EME due to slew rate control High EMI immunity Fully integrated receiver filter Bus terminals proof against short-circuits and transients in the automotive environment High impedance Bus pin in case of loss of ground and undervoltage condition Bus short to ground protection Thermal overload protection Integrated termination resistor for LIN slave nodes High signal symmetry for using in RC – based slave nodes up to 2% clock tolerance ±4kV ESD protection Ordering Information Part No. Temperature Range Package TH8082 KDC K (-40 to 125 °C) DC (SOIC8) General Description The TH8082 is a physical layer device for a single wire data link capable of operating in applications where high data rate is not required and a lower data rate can achieve cost reductions in both the physical media components and in the microprocessor which use the network. The TH8082 is designed in accordance to the physical layer definition of the LIN Protocol Specification, Rev. 1.3 and 2.0.The IC furthermore can be used in ISO9141 systems. Because of the very low current consumption of the TH8082 in the sleep mode it’s suitable for ECU applications with hard standby current requirements. This mode allows a shutdown of the whole application. The included wake-up function detects incoming dominant bus messages and enables the voltage regulator. TH8082 – Datasheet 3901008082 Page 1 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver Contents 1. Functional Diagram ....................................................................................................4 2. Electrical Specification ..............................................................................................5 2.1 2.2 2.3 2.4 2.5 2.6 3. Functional Description.............................................................................................12 3.1 3.2 3.3 3.4 4. Initialization..........................................................................................................12 Operating Modes .................................................................................................12 Mode control.......................................................................................................12 LIN BUS Transceiver...........................................................................................13 Operating under Disturbance ..................................................................................15 4.1 4.2 4.3 4.4 4.5 4.6 5. Operating Conditions.............................................................................................5 Absolute Maximum Ratings ...................................................................................5 Static Characteristics.............................................................................................6 Dynamic Characteristics........................................................................................8 Timing Diagrams ...................................................................................................9 Test Circuits for Dynamic and Static Characteristics ...........................................11 Loss of battery .....................................................................................................15 Loss of Ground ....................................................................................................15 Short circuit to battery..........................................................................................15 Short circuit to ground .........................................................................................15 Thermal overload.................................................................................................15 Undervoltage Vcc ................................................................................................15 Application Hints ......................................................................................................16 5.1 LIN System Parameter ........................................................................................16 5.1.1. Bus loading requirements.............................................................................16 5.2 Min/max slope time calculation............................................................................17 5.3 Duty Cycle Calculation ........................................................................................18 5.4 Application Circuitry.............................................................................................19 6. Pin Description .........................................................................................................20 7. Mechanical Specification SOIC8 .............................................................................21 8. Tape and Reel Specification ....................................................................................22 8.1 8.2 Tape Specification ...............................................................................................22 Reel Specification................................................................................................23 TH8082 – Datasheet 3901008082 Page 2 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 9. ESD/EMC Remarks ...................................................................................................24 9.1 9.2 9.3 General Remarks ................................................................................................24 ESD-Test .............................................................................................................24 EMC ....................................................................................................................24 10. Assembly Information ..........................................................................................25 11. Disclaimer..............................................................................................................25 List of Figures Figure 1 - Block Diagram ......................................................................................................................... 4 Figure 2 - Input / Output timing................................................................................................................ 9 Figure 3 – Receiver debouncing and propagation delay......................................................................... 9 Figure 4 – Sleep mode and wake up procedure ................................................................................... 10 Figure 5 - Test circuit for dynamic characteristics ................................................................................. 11 Figure 6 - Test circuit for automotive transients .................................................................................... 11 Figure 7 - Receive impulse diagram...................................................................................................... 13 Figure 8 - Slope time and slew rate calculation in accordance to LIN 1.3 ............................................ 17 Figure 8 - Duty cycle calculation in accordance to LIN 2.0 ................................................................... 18 Figure 9 - Application Circuitry .............................................................................................................. 19 Figure 10 - Pin description SOIC8 package .......................................................................................... 20 TH8082 – Datasheet 3901008082 Page 3 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 1. Functional Diagram TH8082 INH Biasing Bandgap internal Supply VCC VS Thermal Protection POR 30K SLEW RATE BUS Driver TxD BUS GND EN MODE CONTROL Wake-up Filter RxD Receive Comparator Input Filter Figure 1 - Block Diagram TH8082 – Datasheet 3901008082 Page 4 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 2. Electrical Specification All voltages are referenced to ground (GND). Positive currents flow into the IC. The absolute maximum ratings (in accordance with IEC 60 134) given in the table below are limiting values that do not lead to a permanent damage of the device but exceeding any of these limits may do so. Long term exposure to limiting values may effect the reliability of the device. 2.1 Operating Conditions Parameter Symbol Min Max Unit Battery supply voltage [1] VS 7 18 V Supply voltage VCC 4.5 5.5 V Operating ambient temperature Tamb -40 +125 °C [1] Vs is the IC supply voltage including voltage drop of reverse battery protection diode, VDROP = 0.4 to 1V, VBAT_ECU voltage range is 8 to 18V 2.2 Absolute Maximum Ratings Parameter Symbol Battery Supply Voltage VS Supply Voltage VCC Transient supply voltage VS.tr1 Condition Min t < 1 min -0.3 Load dump, t < 500ms -0.3 ISO 7637/1 pulse 1[1] VS..tr2 ISO 7637/1 pulses Transient supply voltage VS..tr3 ISO 7637/1 pulses 3A, 3B -150 BUS voltage VBUS t < 500ms , Vs = 18V -27 t < 500ms ,Vs = 0V -40 ISO 7637/1 pulse 1 [2] -150 Transient bus voltage Transient bus voltage DC voltage on pins TxD, RxD VBUS..tr1 VBUS.tr2 VBUS.tr3 ISO 7637/1 pulses 2[1] 2 [2] ISO 7637/1 pulses 3A, 30 40 +7 -150 Transient supply voltage Transient bus voltage Max 3B [2] VDC Unit V V V 100 V 150 V 40 V V 100 V -150 150 V -0.3 7 V ESD capability of pin LIN, VS, INH ESDHB Human body model, equivalent to discharge 100pF with 1.5kΩ, -4 4 kV ESD capability of pin RxD, TxD, VCC ESDHB Human body model, equivalent to discharge 100pF with 1.5kΩ, -2 2 kV Maximum latch - up free current at any Pin ILATCH -500 500 mA 152 K/W Thermal impedance ΘJA Storage temperature Tstg -55 +150 °C Junction temperature Tvj -40 +150 °C [1] [2] in free air ISO 7637 test pulses are applied to VS via a reverse polarity diode and >2uF blocking capacitor. ISO 7637 test pulses are applied to BUS via a coupling capacitance of 1 nF. TH8082 – Datasheet 3901008082 Page 5 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 2.3 Static Characteristics Unless otherwise specified all values in the following tables are valid for VS = 7 to 18V, VCC = 4.5 to 5.5V and TAMB= -40 to 125°C. All voltages are referenced to ground (GND), positive currents are flow into the IC. Parameter Symbol Condition Min Typ Max Unit 4.3 V PIN VS, VCC VCC undervoltage lockout VCC_UV EN=H, TxD=L 2.75 Supply current, dominant ISd VS = 18V,VCC = 5.5V TxD = L 0.9 2 mA Supply current, dominant ICCd VS = 18V,VCC = 5.5V TxD = L 0.6 2 mA Supply current, recessive ISr VS = 18V,VCC = 5.5V TxD = H 25 50 µA Supply current, recessive ICCr VS = 18V,VCC = 5.5V TxD = H 50 75 µA Supply current, sleep mode ISsl VS = 12V,VCC and TxD = 0V, Tamb= 25° 6.5 Supply current, sleep mode ISsl VS = 12V, VCC and TxD = 0V 6.5 14 µA 120 200 mA -200 µA µA PIN BUS – Transmitter Short circuit bus current [2] [3] IBUS_LIM VBUS = VS, driver on Pull up current bus [2] [3] IBUS_PU VBUS = 0, VS = 12V, driver off Pull up current bus Bus reverse current, recessive [2] [3] IBUS_PU_SLEEP VBUS = 0, VS = 12V, sleep mode IBUS_PAS_rec -600 -100 µA -75 VBUS > VS , 8V < VBUS < 18V 7V < VS < 18V, driver off 5 µA 5 µA 1 mA Bus reverse current loss of battery [2] [3] IBUS VS = 0V, 0V < VBUS < 18V Bus current during loss of ground [2] [3] IBUS_NO_GND VS = 12V, 0 < VBUS < 18V -1 Transmitter dominant voltage [2] VolBUS_2 VS = 7V, load = 500Ω 1.2 V Transmitter dominant voltage [2] VolBUS_3 VS = 18V, load = 500Ω 2 V 35 pF BUS input capacitance [1] Pulse response via 10kΩ, VPULSE = 12V, Vs open CBUS 25 PIN BUS – Receiver Receiver dominant voltage [2] [3] VilBUS 0.4 *VS Receiver recessive voltage [2] [3] VihBUS Center point of receiver threshold [1] [2] [3] ViBUS_cnt VBUS_cnt = (VilBUS + VihBUS )/2 Receiver hysteresis [1] [2] [3] ViBUS_hys VBUS_cnt = ( VihBUS -VilBUS ) V 0.6 *VS V 0.487 *VS 0.5 *VS 0.512 *VS V 0.175 *VS 0.187 *VS V 0.7*VCC V PIN TXD, EN High level input voltage Vih Rising edge Low level input voltage Vil Falling edge 0.3*VCC V TxD pull up resistor RIH_TXD VTXD = 0V 10 25 kΩ EN pull down resistor RIL_EH VEN = 5V 20 50 kΩ TH8082 – Datasheet 3901008082 Page 6 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver Parameter Symbol Condition Min Typ Max Unit 0.9 V 10 µA 50 Ω -5 5 µA PIN RXD Low level output voltage Vol_rxd IRxD = 2mA Leakage Current Vleak_rxd VRxD = 5.5V, recessive -10 PIN INH On resistance INH Ron_INH Normal or standby mode, VINH = VS-1V , VS = 12V Leakage current INH IINH_lk EN = L ,VINH = 0V 20 Thermal Protection Thermal shutdown Tsd [1] 155 180 °C Thermal recovery Thys [1] 126 150 °C [1] [2] [3] No production test, guaranteed by design and qualification In accordance to LIN Physical Layer Specification 1.3 In accordance to LIN Physical Layer Specification 2.0 TH8082 – Datasheet 3901008082 Page 7 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 2.4 Dynamic Characteristics Unless otherwise specified all values in the following table are valid for VS = 7 to 18V and TAMB= -40 to 125oC. Parameter Symbol Propagation delay transmitter [1] [3] [6] Propagation delay transmitter symmetry Propagation delay receiver [3] [6] [1] [3] [6] [7] [9] Propagation delay receiver symmetry [3] [6] [7] Slew rate rising and falling edge, high batttery [5] [6] Slew rate rising and falling edge, low batttery [5] [6] Slope Symmetry, high battery [5] [6] Condition ttrans_pd Bus loads: 1KΩ/1nF, 660Ω/6.8nF, 500Ω/10nF ttrans_sym Calculate ttrans_pdf - ttrans_pdr Min Typ -2 Max Unit 5 µs 2 µs 6 µs 2 µs trec_pdf CRxD = 25pF trec_sym Calculate ttrans_pdf - ttrans_pdr -2 |tSR_HB| Bus load, VS = 18V 1KΩ/1nF 660Ω/6.8nF 500Ω/10nF 1 2 3 V/µs |tSR_LB| Bus load, VS = 7V 1KΩ/1nF 660Ω/6.8nF 500Ω/10nF 0.5 2 3 V/µs +5 µs tssym_HB Bus load, VS = 18V 1KΩ/1nF 660Ω/6.8nF 500Ω/10nF Calculate tsdom - tsrec -5 Bus duty cycle 1 [7] D1 Calculate tBUS_rec(min)/100µs Bus duty cycle 2 [7] D2 Calculate tBUS_rec(max)/100µs trec_deb BUS rising and falling edge 1.5 4 µs Wake-up filter time twu Sleep mode, BUS rising and falling edge 30 150 µs EN - debounce time ten_deb Normal to sleep mode transition 10 40 µs Receiver debounce time [2] [5] [9] [1] [2] [3] [4] [5] [6] [7] [8] [9] 0.396 0.581 20 Propagation delays are not relevant for LIN protocol transmission, value only information parameter No production test, guaranteed by design and qualification See Figure 2 - Input / Output timing See Figure 8 - Slope time and slew rate calculation See Figure 3 – Receiver debouncing a and propagation delay In accordance to LIN Physical Layer Specification 1.3 In accordance to LIN Physical Layer Specification 2.0 See Figure 9 - Duty cycle calculation in accordance to LIN 2.0 This parameter is tested by applying a wave signal to the bus. The minimum slew rate for the bus rising and falling edge is 50V/µs TH8082 – Datasheet 3901008082 Page 8 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 2.5 Timing Diagrams 50% TxD ttrans_f ttrans_r VBUS 100% 95% BUS 5% 0% RxD Figure 2 - Input / Output timing t < trec_deb t < trec_deb VBUS t tREC_PDF tREC_PDR VRxD 50% t Figure 3 – Receiver debouncing and propagation delay TH8082 – Datasheet 3901008082 Page 9 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver VBUS t t > twu VINH twu t VCC t VEN t VRx D wake-up interrupt t Figure 4 – Sleep mode and wake up procedure TH8082 – Datasheet 3901008082 Page 10 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 2.6 Test Circuits for Dynamic and Static Characteristics 100n VS VCC RL 100n TH8080 BUS CL TxD 2.7K RxD GND 20p Figure 5 - Test circuit for dynamic characteristics 100n VS VCC BUS TxD GND RxD 2uF 500 1nF Oszi TH8080 Schaffnergenerator Puls3a,3b 12V Puls1,2,4 Figure 6 - Test circuit for automotive transients TH8082 – Datasheet 3901008082 Page 11 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 3. Functional Description 3.1 Initialization After power on, the chip enters automatically the VBAT-standby mode. In this intermediate mode the INH output will become HIGH (VS) and therefore the ECU - voltage regulator will provide the VCC - supply. The transceiver will remain the VBAT-standby mode until the controller sets it to normal operation (EN = High). Only in this mode bus communication is possible. The TH8082 switches itself in the VBAT-standby mode if VCC is missing or below the threshold. 3.2 Operating Modes Via the EN pin it is possible to switch the TH8082 into different operating modes: Normal Mode The whole TH8082 is active. Switching to normal mode can only be done via the EN pin with EN=high. Sleep Mode The sleep mode (EN = LOW) can only be reached from normal mode and permits a very low power consumption because the transceiver and even the external voltage regulator will be disabled. If the VCC has been switched off a wake-up request from the bus line (remote wake up) will cause the TH8082 to enter the VBAT-standby mode (VCC is present again) and sets the RxD output to low until the device enters the normal operation mode (active LOW interrupt at RxD). If the INH pin is not connected to the regulator or the inhibitable external regulator is not the one that provides the VCC - supply, the normal mode is directly accessible by logic high on the EN pin. (wake up via mode change/local wake up) In order to prevent an unintended wake-up caused by disturbances of the automotive environment incoming dominant signals from the bus have to exceed the wake-up delay time. Thermal Shutdown Mode If the junction temperature TJ is higher than 155°C, the TH8082 will be switched into the thermal shutdown mode. Within this mode the transmitter will be switched off. If TJ falls below the thermal shutdown temperature (typ. 140°C) the TH8082 will be switched to the previous state. 3.3 Mode control EN VCC 0 0 0 Comment INH RxD VBAT-standby , power on Vs 0 1 VBAT-standby , VCC on Vs X 1 1 Normal mode Vs Vcc = recessive 0 = dominant 0 0 Sleep mode floating 0 0 1 Sleep mode regulator not disabled directly switch to normal mode with EN = 1 floating Vcc 0 0/1 Vs 0 - Active low wake up interrupt Remote wake up request Table 1 - Mode control TH8082 – Datasheet 3901008082 Page 12 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 3.4 LIN BUS Transceiver The transceiver consists a bus-driver (1.2V@40mA) with slew rate control, current limitation and as well in the receiver a high voltage comparator followed by a debouncing unit. BUS Input/Output The recessive BUS level is generated from the integrated 30k pull up resistor in serial with a diode This diode prevent the reverse current of VBUS during differential voltage between VS and BUS (VBUS>VS). No additional termination resistor is necessary to use the TH8082 in LIN slave nodes. If this IC is used for LIN master nodes it is necessary that the BUS pin is terminated via a external 1kΩ resistor in serial with a diode to VBAT or INH (See chapter 4.4 Short circuit to ground). TxD Input During transmission the data at the pin TxD will be transferred to the BUS driver for generating a BUS signal. To minimize the electromagnetic emission of the bus line, the BUS driver is equipped with an integrated slew rate control and wave shaping unit. Transmitting will be interrupted in the following cases: - Sleep mode - Thermal Shutdown active - VBAT standby The CMOS compatible input TxD controls directly the BUS level: TxD = low TxD = high -> -> BUS = low (dominant level) BUS = high (recessive level) The TxD pin has an internal pull up resistor connected to VCC. This secures that an open TxD pin generates a recessive BUS level. RxD Output The data signals from the BUS pin will be transferred continuously to the pin RxD. Short spikes on the bus signal are suppressed by the implemented debouncing circuit. VS VBUS_CNT_max BUS 60% 50% 40% VhHYS VBUS_CNT_min t < trec_deb t < trec_deb RxD Figure 7 - Receive impulse diagram TH8082 – Datasheet 3901008082 Page 13 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver The receive threshold values VBUS_CNT_max and VBUS_CNT_min are symmetrical to the centre voltage of 0.5*VS with a hysteresis of typ. 0.175*VS. Including all tolerances the LIN specific receive threshold values of 0.4*VS and 0.6*VS will be secure observed. The received BUS signal will be output to the RxD pin: BUS < VBUS_CNT – 0.5 * VHYS BUS > VBUS_CNT + 0.5 * VHYS -> -> RxD = low (BUS dominant) RxD = high, floating (BUS recessive) This pin is a buffered open drain output with a typical load of: Resistance: 2.7 kOhm Capacitance: < 25 pF EN-Pin The TH8082 is switched into the sleep mode with a falling edge and into normal mode with a rising edge at the EN pin. The normal mode will be kept as long as EN = high (See Figure 4 – Sleep mode and wake up procedure for more details). If the TH8082 is switched to sleep mode also a connected voltage regulator via the INH pin is switched off. The deactivation of TH8082 with EN = low can be done independent from the state of the bus-transceiver. The EN input is internal pulled down so that it is secured if this pin is not connected a low level will be applied. Datarate The TH8082 is a constant slew rate transceiver that means the bus driver operates with a fixed slew rate range of 1.0 V/µs ≤ ∆V/∆T ≤ 3V/µs. This principle secures a very good symmetry of the slope times between recessive to dominant and dominant to recessive slopes within the LIN bus load range (CBUS, Rterm). The TH8082 guarantees data rates up to 20kbit within the complete bus load range under worst case conditions. The constant slew rate principle is very robust against voltage drops and can operate with RCoscillator systems with a clock tolerance up to ±2% between 2 nodes. TH8082 – Datasheet 3901008082 Page 14 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 4. Operating under Disturbance 4.1 Loss of battery If the ECU is disconnected from the battery, the bus pin is in high impedance state. There is no impact to the bus traffic and to the ECU itself. 4.2 Loss of Ground In case of an interrupted ECU ground connection there is no influence to the bus line. 4.3 Short circuit to battery The transmitter output current is limited to the specified value in case of short circuit to battery in order to protect the TH8082 itself against high current densities . 4.4 Short circuit to ground If the bus line is shorted to negative shifted ground levels, there is no current flow from the ECU ground to the bus and no distortion of the bus traffic occurs. The permanent failure current from battery to ground can be reduced dramatically by using the INH pin as termination pin for the master pull up (See Figure 10 - Application Circuitry). If the controller detects a short circuit of the bus to ground (RxD timeout) the transceiver can be set into sleep mode. The INH pin is floating and in this case the master pull up resistor is disconnected from the bus line. Additionally the internal slave termination resistor is switched off and only a high impedance termination is applied to the bus (typ. 75µA). The failure current of the hole system can be reduced by at least ten times to prevent a fast discharge of the car battery. If the failure disappears, the bus level will become recessive again and will wake up the system even if no local wake up is present or possible. 4.5 Thermal overload The TH8082 is protected against thermal overloads. If the chip temperature exceeds the specified value, the transmitter is switched off until thermal recovery. The receiver is still working while thermal shutdown. 4.6 Undervoltage Vcc If the ECU regulated supply voltage is missing or decreases under the specified value, the transmitter is switched off to prevent undefined bus traffic. TH8082 – Datasheet 3901008082 Page 15 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 5. Application Hints 5.1 LIN System Parameter 5.1.1. Bus loading requirements Parameter Symbol Min Max Unit VBAT 8 18 V Voltage drop of reverse protection diode VDrop_rev 0.4 0.7 1 V Voltage drop at the serial diode in pull up path VSerDiode 0.4 0.7 1 V Battery shift voltage VShift_BAT 0 0.1 VBAT Ground shift voltage VShift_GND 0 0.1 VBAT Master termination resistor Rmaster 900 1000 1100 Ω Slave termination resistor Rslave 20 30 60 kΩ Number of system nodes N 2 Operating voltage range Total length of bus line Typ 16 LENBUS 40 m 150 pF/m Line capacitance CLINE 100 Capacitance of master node CMaster 220 Capacitance of slave node CSlave 220 250 pF Total capacitance of the bus including slave and master capacitance CBUS 0.47 4 10 nF RNetwork 500 862 Ω τ 1 5 µs Network Total Resistance Time constant of overall system pF Table 2 - Bus loading requirements TH8082 – Datasheet 3901008082 Page 16 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 5.2 Min/max slope time calculation VBUS 100% 60% 60% 40% 40% 0% Vdom tsdom tsrec Figure 8 - Slope time and slew rate calculation in accordance to LIN 1.3 The slew rate of the bus voltage is measured between 40% and 60% of the output voltage swing (linear region). The output voltage swing is the difference between dominant and recessive bus voltage. dV/dt = 0.2*Vswing / (t40% - t60% ) The slope time is the extension of the slew rate tangent until the upper and lower voltage swing limits: tslope = 5 * (t40% - t60% ) The slope time of the recessive to dominant edge is directly determined by the slew rate control of the transmitter: tslope = Vswing / dV/dt The dominant to recessive edge is influenced from the network time constant and the slew rate control, because it’s a passive edge. In case of low battery voltages and high bus loads the rising edge is only determined by the network. If the rising edge slew rate exceeds the value of the dominant one, the slew rate control determines the rising edge. TH8082 – Datasheet 3901008082 Page 17 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 5.3 Duty Cycle Calculation tBit tBit TxD tdom(max) VSUP trec(min) 100% 74.4% tdom(min) 58.1% BUS 58.1% 42.2% 28.4% VSS trec(max) 28.4% 0% RxD Figure 9 - Duty cycle calculation in accordance to LIN 2.0 With the timing parameters shown in Figure 9 two duty cycles , based on trec(min) and trec(max) can be calculated as follows : D1 = trec(min) / (2 * tBit) D2 = trec(max) / (2 * tBit) For proper operation at 20KBit/s ( tBit = 50µs) the LIN driver has to fulfil the duty cycles specified in chapter 2.4 Dynamic Characteristics for supply voltages of 7 to 18V and the defined standard loads . Due to this simplified definition there is no need to measure slew rates, slope times, transmitter delays and dominant voltage levels as specified in the LIN physical layer specification 1.3. The device within the D1/D2 duty cycle range operates also in applications with reduced bus speed of 10.4KBit/s or below. In order to minimize EME, the slew rates of the transmitter can be reduced (approximately by 2 times). Such devices have to fulfil the duty cycle definition D3/D4 in the LIN physical layer specification 2.0. Devices within this duty cycle range cannot operate in 20KBit/s applications. TH8082 – Datasheet 3901008082 Page 18 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 5.4 Application Circuitry 1N4001 VBAT 100nF 10µ VIN Voltage Regulator SLAVE ECU (e.g.NCV8502) VOUT 10µ RESET 10k 100nF 47nF 2.7K VCC VS 220pF BUS RxD LIN TH8080 MCU TxD GND 1N4001 100nF 10µ MASTER ECU VIN Voltage Regulator ENABLE 10K (e.g.NCV8501) RESET VOUT 10µ 10K 47nF 47nF 100nF 2.7K VCC INH VS TH8082 RxD MCU 1K BUS TxD 220pF EN GND Figure 10 - Application Circuitry TH8082 – Datasheet 3901008082 Page 19 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 6. Pin Description RxD 1 8 INH EN 2 7 VS VCC 3 6 BUS TxD 4 5 GND TH8082 Figure 11 - Pin description SOIC8 package Pin Name IO-Typ 1 RXD O Receive data from BUS to core, LOW in dominant state 2 EN I Enables the normal operation mode when HIGH 3 VCC P 5V supply input 4 TXD I Transmit data from core to BUS, LOW in dominant state 5 GND G Ground 6 BUS I/O LIN bus pin, LOW in dominant state 7 VS P Battery input voltage 8 INH O Control output for voltage regulator, termination pin for master pull up TH8082 – Datasheet 3901008082 Description Page 20 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 7. Mechanical Specification SOIC8 Small Outline Integrated Circiut (SOIC), SOIC 8, 150 mil A1 B D E e H h L A α ZD A2 4.80 4.98 3.81 3.99 1.27 5.80 6.20 0.25 0.50 0.41 1.27 1.52 1.72 0° 8° 0.53 1.37 1.57 0.189 0.196 0.150 0.157 0.050 0.016 0.050 0.060 0.068 0° 8° 0.021 0.054 0.062 C All Dimension in mm, coplanarity < 0.1 mm min max 0.10 0.25 0.36 0.46 0.19 0.25 All Dimension in inch, coplanarity < 0.004” min max 0.004 0.0098 0.014 0.0075 0.018 0.0098 TH8082 – Datasheet 3901008082 0.2284 0.0099 0.244 0.0198 Page 21 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 8. Tape and Reel Specification 8.1 Tape Specification max. 10° max. 10° IC pocket R Top View n. mi Sectional View T2 P0 D0 P2 T E G1 < A0 > F K0 W B0 B1 S1 G2 P1 D1 T1 Cover Tape Abwickelrichtung Standard Reel with diameter of 13“ Package Parts per Reel Width Pitch SOIC8 2500 12 mm 8 mm D0 E P0 P2 Tmax T1 max G1 min G2 min B1 max D1 min F P1 Rmin T2 max W 1.5 +0.1 1.75 ±0.1 4.0 ±0.1 2.0 ±0.05 0.6 0.1 0.75 0.75 8.2 1.5 5.5 ±0.05 4.0 ±0.1 30 6.5 12.0 ±0.3 A0, B0, K0 can be calculated with package specification. Cover Tape width 9.2 mm. TH8082 – Datasheet 3901008082 Page 22 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 8.2 Reel Specification W2 W1 B* D* C A N Amax B* C D*min 330 2.0 ±0.5 13.0 +0,5/-0,2 20.2 Width of half reel Nmin W1 W2 max 4 mm 100,0 4,4 7,1 8 mm 100,0 8,4 11,1 TH8082 – Datasheet 3901008082 Page 23 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 9. ESD/EMC Remarks 9.1 General Remarks Electronic semiconductor products are sensitive to Electro Static Discharge (ESD). Always observe Electro Static Discharge control procedures whenever handling semiconductor products. 9.2 ESD-Test The TH8082 is tested according MIL883D (human body model). 9.3 EMC The test on EMC impacts is done according to ISO 7637-1 for power supply pins and ISO 7637-3 for dataand signal pins. Power Supply pin VS: Testpulse Condition Duration 1 t1 = 5 s / US = -100 V / tD = 2 ms 5000 pulses 2 t1 = 0.5 s / US = 100 V / tD = 0.05 ms 5000 pulses US = -150 V/ US = 100 V burst 100ns / 10 ms / 90 ms break 1h 3a/b 5 Ri = 0.5 Ω, tD = 400 ms 10 pulses every 1min tr = 0.1 ms / UP+US = 40 V Data- and signal pins EN, BUS: Testpulse Condition Duration 1 t1 = 5 s / US = -100 V / tD = 2 ms 1000 pulses 2 t1 = 0.5 s / US = 100 V / tD = 0.05 ms 1000 pulses US = -150 V/ US = 100 V burst 100ns / 10 ms / 90 ms break 1000 burst 3a/b TH8082 – Datasheet 3901008082 Page 24 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver 10. Assembly Information This Melexis device is classified and qualified regarding soldering technology, solderability and moisture sensitivity level, as defined in this specification, according to following test methods: IPC/JEDEC J-STD-020 Moisture/Reflow Sensitivity Classification For Nonhermetic Solid State Surface Mount Devices (classification reflow profiles according to table 5-2) EIA/JEDEC JESD22-A113 Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Testing (reflow profiles according to table 2) CECC00802 Standard Method For The Specification of Surface Mounting Components (SMDs) of Assessed Quality EIA/JEDEC JESD22-B106 Resistance to soldering temperature for through-hole mounted devices EN60749-15 Resistance to soldering temperature for through-hole mounted devices MIL 883 Method 2003 / EIA/JEDEC JESD22-B102 Solderability For all soldering technologies deviating from above mentioned standard conditions (regarding peak temperature, temperature gradient, temperature profile etc) additional classification and qualification tests have to be agreed upon with Melexis. The application of Wave Soldering for SMD’s is allowed only after consulting Melexis regarding assurance of adhesive strength between device and board. Based on Melexis commitment to environmental responsibility, European legislation (Directive on the Restriction of the Use of Certain Hazardous substances, RoHS) and customer requests, Melexis has installed a roadmap to qualify their package families for lead free processes also. Various lead free generic qualifications are running, current results on request. For more information on Melexis lead free statement http://www.melexis.com/html/pdf/MLXleadfree-statement.pdf see quality page at our website: 11. Disclaimer Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Melexis reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with Melexis for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by Melexis for each application. The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of Melexis’ rendering of technical or other services. © 2002 Melexis NV. All rights reserved. TH8082 – Datasheet 3901008082 Page 25 of 26 Feb 2007 Rev 007 TH8082 Enhanced SoloLIN Transceiver Your notes For the latest version of this document Go to our website at www.melexis.com Or for additional information contact Melexis Direct: Europe and Japan: Phone: +32 1367 0495 E-mail: [email protected] All other locations: Phone: +1 603 223 2362 E-mail: [email protected] ISO/TS16949 and ISO14001 Certified TH8082 – Datasheet 3901008082 Page 26 of 26 Feb 2007 Rev 007