AOD609 Complementary Enhancement Mode Field Effect Transistor General Description The AOD609 uses advanced trench technology MOSFETs to provide excellent RDS(ON) and low gate charge. The complementary MOSFETs may be used in H-bridge, Inverters and other applications. Features n-channel VDS (V) = 40V, ID = 12A (VGS=10V) RDS(ON)< 30mΩ (VGS=10V) RDS(ON)< 40mΩ (VGS=4.5V) p-channel VDS (V) = -40V, ID = -12A (VGS=-10V) RDS(ON)< 45mΩ (VGS= -10V) RDS(ON)< 66mΩ (VGS= -4.5V) Top View Drain Connected to Tab D1/D2 G1 S2 n-channel p-channel Absolute Maximum Ratings T A=25°C unless otherwise noted Parameter Max n-channel Symbol VDS Drain-Source Voltage 40 V Gate-Source Voltage ±20 GS Continuous Drain Current B,H TC=25°C Max p-channel -40 ±20 12 -12 12 -12 30 -30 ID IDM Avalanche Current C IAR 14 -20 Repetitive avalanche energy L=0.1mHC EAR 9.8 20 27 30 14 15 2 2 1.3 1.3 -55 to 175 -55 to 175 Power Dissipation TC=25°C TC=100°C TA=25°C TA=70°C Junction and Storage Temperature Range PD PDSM TJ, TSTG Thermal Characteristics: n-channel and p-channel Parameter t ≤ 10s Maximum Junction-to-Ambient A,D Steady-State Maximum Junction-to-Ambient A,D Steady-State Maximum Junction-to-Lead C t ≤ 10s Maximum Junction-to-Ambient A,D Steady-State Maximum Junction-to-Ambient A,D Steady-State Maximum Junction-to-Lead C 1/9 Symbol RθJA RθJC RθJA RθJC Units V V Pulsed Drain Current B Power Dissipation TC=100°C G2 S1 A mJ W W °C Device n-ch n-ch n-ch Typ 17.4 50 4 Max 25 60 5.5 Units °C/W °C/W °C/W p-ch p-ch p-ch 16.7 50 3.5 25 60 5 °C/W °C/W °C/W www.freescale.net.cn AOD609 Complementary Enhancement Mode Field Effect Transistor N Channel Electrical Characteristics (T J=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Min Conditions ID=250µA, VGS=0V 1 IGSS Gate-Body leakage current VDS=0V, VGS= ±20V VGS(th) Gate Threshold Voltage VDS=VGS ID=250µA 1.7 ID(ON) On state drain current VGS=10V, VDS=5V 30 TJ=55°C TJ=125°C VDS=5V, ID=12A 25 Rg Gate resistance SWITCHING PARAMETERS Qg (10V) Total Gate Charge Qgs Gate Source Charge 0.76 516 VGS=0V, VDS=20V, f=1MHz nA V mΩ S 1 V 2 A 650 pF 82 pF 43 pF Ω VGS=0V, VDS=0V, f=1MHz 4.6 6.9 VGS=10V, VDS=20V, ID=12A 8.3 10.8 2.3 nC 1.6 nC 6.4 ns 3.6 ns 16.2 ns 6.6 ns Qgd Gate Drain Charge tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf Turn-Off Fall Time trr Body Diode Reverse Recovery Time IF=12A, dI/dt=100A/µs 18 Body Diode Reverse Recovery Charge IF=12A, dI/dt=100A/µs 10 Qrr µA A 40 DYNAMIC PARAMETERS Ciss Input Capacitance Reverse Transfer Capacitance 30 46 Diode Forward Voltage IS=1A,VGS=0V Maximum Body-Diode Continuous Current Output Capacitance 24 31 Forward Transconductance Coss 3 37 VSD Crss 2.5 VGS=4.5V, I D=8A gFS IS 5 ±100 VGS=10V, I D=12A Units V VDS=40V, VGS=0V Zero Gate Voltage Drain Current Static Drain-Source On-Resistance Max 40 IDSS RDS(ON) Typ VGS=10V, VDS=20V, RL=1.4Ω, RGEN=3Ω 24 nC ns nC A: The value of RθJA is measured with the device in a still air environment with T A =25°C. The power dissipation PDSM and current rating IDSM are based on TJ(MAX)=150°C, using the steady state junction-to-ambient thermal resistance. B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation lim for cases where additional heatsinking is used. C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating. G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. H. The maximum current rating is limited by bond-wires. *This device is guaranteed green after data code 8X11 (Sep ST 1 2008). Rev4: Aug 2009 2/9 www.freescale.net.cn AOD609 Complementary Enhancement Mode Field Effect Transistor TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS: N-CHANNEL 30 30 10V 5V 25 VDS=5V 25 4.5V 20 4V ID(A) ID (A) 20 15 10 15 125°C 10 VGS=3.5V 25°C 5 5 0 0 1 2 3 4 0 5 2 VDS (Volts) Fig 1: On-Region Characteristics 3 3.5 4 4.5 VGS(Volts) Figure 2: Transfer Characteristics 36 1.8 34 Normalized On-Resistance VGS=4.5V 32 RDS(ON) (mΩ) 2.5 30 28 VGS=10V 26 24 22 20 1.6 VGS=10V ID=12A 1.4 1.2 VGS=4.5V ID=8A 1 0.8 0.6 0 5 10 15 20 -50 ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage -25 0 25 50 75 100 125 150 Temperature (°C) Figure 4: On-Resistance vs. Junction Temperature 90 100 ID=12A 10 1 125°C 50 25°C 30 IS (A) RDS(ON) (mΩ) 70 0.1 125°C 25°C 0.01 0.001 0.0001 0.0 10 3 3/9 4 5 6 7 8 9 10 VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage 0.2 0.4 0.6 0.8 1.0 1.2 VSD (Volts) Figure 6: Body-Diode Characteristics www.freescale.net.cn AOD609 Complementary Enhancement Mode Field Effect Transistor TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS: N-CHANNEL 800 10 VDS=20V ID= 12A Capacitance (pF) VGS (Volts) 8 6 4 2 Ciss 600 400 Crss 200 Coss 0 0 0 2 4 6 8 0 10 10 20 30 40 VDS (Volts) Figure 8: Capacitance Characteristics Qg (nC) Figure 7: Gate-Charge Characteristics 1000 100 TJ(Max)=150°C TA=25°C 10µs 100µs 1 RDS(ON) limited 0.1 TJ(Max)=150°C TA=25°C 1ms 10ms 0.1s 1s 10s DC 100 Power (W) ID (Amps) 10 0.01 0.1 1 10 10 1 0.00001 100 VDS (Volts) 0.001 0.1 10 1000 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note E) Figure 9: Maximum Forward Biased Safe Operating Area (Note E) ZθJA Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA RθJA=50°C/W In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 1 PD 0.1 Ton Single Pulse 0.01 0.00001 0.0001 0.001 0.01 0.1 1 T 10 100 1000 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance 4/9 www.freescale.net.cn AOD609 Complementary Enhancement Mode Field Effect Transistor G ate C harge Test C ircuit & W ave form Vgs Qg 10V + + V ds VDC - Qgd Qgs V DC - DU T Vgs Ig C harge Resistive Switching Test Circuit & Waveforms RL Vds Vds DUT Vgs 90% + Vdd VDC - Rg 10% Vgs Vgs td(on) tr td(off) ton tf toff Unclamped Inductive Switching (U IS) Test Circuit & W aveform s L 2 E AR = 1/2 LIAR Vds BVD SS Vds Id + Vdd Vgs Vgs I AR VD C - Rg Id DU T Vgs Vgs D iode R ecovery Test C ircuit & W aveform s Q rr = - Idt Vds + DUT Vgs Vds - Isd Vgs Ig 5/9 L Isd + Vdd t rr dI/dt I RM Vdd VD C - IF Vds www.freescale.net.cn AOD609 Complementary Enhancement Mode Field Effect Transistor P-Channel Electrical Characteristics (T J=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID= -250µA, VGS=0V -40 -1 Zero Gate Voltage Drain Current IGSS Gate-Body leakage current VDS=0V, VGS= ±20V VGS(th) Gate Threshold Voltage VDS=VGS ID= -250µA -1.7 ID(ON) On state drain current VGS= -10V, VDS= -5V -30 RDS(ON) Static Drain-Source On-Resistance gFS Forward Transconductance VSD Diode Forward Voltage IS= -1A,VGS=0V Maximum Body-Diode Continuous Current TJ=55°C Output Capacitance Reverse Transfer Capacitance Rg Gate resistance SWITCHING PARAMETERS Qg (-10V) Total Gate Charge Qg (-4.5V) Total Gate Charge Qgs Gate Source Charge Qgd tD(on) tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf Turn-Off Fall Time trr Qrr -2 -3 45 52 65 VGS= -4.5V, I D= -8A 51 66 VDS= -5V, I D= -12A 22 -0.76 900 VGS=0V, VDS= -20V, f=1MHz VGS=0V, VDS=0V, f=1MHz VGS= -10V, VDS= -20V, ID= -12A Units µA nA V A 36 TJ=125°C DYNAMIC PARAMETERS Ciss Input Capacitance Crss -5 ±100 VGS= -10V, I D= -12A Coss Max V VDS= -40V, VGS=0V IDSS IS Typ mΩ S -1 V -2 A 1125 pF 97 pF 68 pF 14 Ω 16.2 21 nC 7.2 9.4 nC 3.8 nC Gate Drain Charge 3.5 nC Turn-On DelayTime 6.2 ns VGS= -10V, VDS= -20V, RL=1.4Ω, RGEN=3Ω 8.4 ns 44.8 ns 41.2 IF= -12A, dI/dt=100A/µs Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge IF= -12A, dI/dt=100A/µs 21 ns 27 14 ns nC A: The value of RθJA is measured with the device in a still air environment with T A =25°C. The power dissipation PDSM and current rating IDSM are based on TJ(MAX)=150°C, using t ≤ 10s junction-to-ambient thermal resistance. B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating. G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. H. The maximum current rating is limited by bond-wires. *This device is guaranteed green after data code 8X11 (Sep ST 1 2008). Rev4: Aug 2009 6/9 www.freescale.net.cn AOD609 Complementary Enhancement Mode Field Effect Transistor TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS: P-CHANNEL 30 30 VDS=-5V -10V 25 -4V -4.5V 20 -ID(A) 20 -ID (A) 25 -5V 15 VGS=-3.5V 10 15 125°C 10 5 25°C 5 0 0 0 1 2 3 4 5 1.5 -VDS (Volts) Fig 12: On-Region Characteristics 2.5 3 3.5 4 4.5 -VGS(Volts) Figure 13: Transfer Characteristics 1.7 65 Normalized On-Resistance 60 VGS=-4.5V 55 RDS(ON) (mΩ) 2 50 45 VGS=-10V 40 35 VGS=-10V ID=-12A 1.5 1.3 1.1 VGS=-4.5V ID=-8A 0.9 0.7 30 0 -50 5 10 15 20 -ID (A) Figure 14: On-Resistance vs. Drain Current and Gate Voltage -25 0 25 50 75 100 125 150 Temperature (°C) Figure 15: On-Resistance vs. Junction Temperature 100 130 ID=-12A 10 110 -IS (A) RDS(ON) (mΩ) 1 90 125°C 70 25°C 0.01 0.001 25°C 50 125°C 0.1 0.0001 30 0.0 3 4 5 6 7 8 9 10 -VGS (Volts) Figure 16: On-Resistance vs. Gate-Source Voltage 7/9 0.2 0.4 0.6 0.8 1.0 1.2 -VSD (Volts) Figure 17: Body-Diode Characteristics www.freescale.net.cn AOD609 Complementary Enhancement Mode Field Effect Transistor TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS: P-CHANNEL 10 1200 Capacitance (pF) 8 -VGS (Volts) 1400 VDS=-20V ID= -12A 6 4 Ciss 1000 800 600 Crss 400 2 Coss 200 0 0 0 3 6 9 12 15 Qg (nC) Figure 18: Gate-Charge Characteristics 0 18 10 20 30 -VDS (Volts) Figure 19: Capacitance Characteristics 1000 100 TJ(Max)=150°C TA=25°C 10µs 100µs 1 RDS(ON) limited 0.1 TJ(Max)=150°C TA=25°C 1ms 10ms 0.1s 1s 10s DC Power (W) 10 -ID (Amps) 40 0.01 0.1 1 10 100 10 1 0.00001 100 0.001 0.1 10 1000 -VDS (Volts) Pulse Width (s) Figure 21: Single Pulse Power Rating Junction-toAmbient (Note E) Figure 20: Maximum Forward Biased Safe Operating Area (Note E) ZθJA Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA RθJA=50°C/W In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 1 PD 0.1 Ton 0.01 0.00001 Single Pulse 0.0001 0.001 0.01 0.1 1 T 10 100 1000 Pulse Width (s) Figure 22: Normalized Maximum Transient Thermal Impedance 8/9 www.freescale.net.cn AOD609 Complementary Enhancement Mode Field Effect Transistor Gate Charge Test Circuit & Waveform Vgs Qg -10V - - VDC + VDC Qgs Vds Qgd + DUT Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds t off t on td(on) Vgs - DUT Vgs t d(off) tr tf 90% Vdd VDC + Rg Vgs 10% Vds Unclamped Inductive Switching (UIS) Test Circuit & Waveforms 2 L E AR= 1/2 LIAR Vds Vds Id - Vgs Vgs VDC + Rg BVDSS Vdd Id I AR DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vgs Vds - Isd Vgs Ig 9/9 L -Isd + Vdd t rr dI/dt -I RM Vdd VDC - -I F -Vds www.freescale.net.cn