STP4803 Dual P Channel Enhancement Mode MOSFET -5.2A DESCRIPTION STP4803 is the dual P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as LCD backlight, notebook computer power management, and other battery powered circuits. FEATURE PIN CONFIGURATION SOP-8 � � � � � -30V/-5.2A, RDS(ON) = 38mΩ (Typ.) @VGS =-10V -30V/-4.0A, RDS(ON) = 52mΩ @VGS = -4.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOP-8 package design PART MARKING SOP-8 ORDERING INFORMATION Part Number Package Part Marking STP4803 SOP-8 STP4803 ※ Process Code : A ~ Z ; a ~ z STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com Copyright © 2007, Stanson Corp. STP4803 2008. V1 STP4803 Dual P Channel Enhancement Mode MOSFET -5.2A ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted ) Parameter Symbol Typical Unit Drain-Source Voltage VDSS -30 V Gate-Source Voltage VGSS ±20 V ID -5.2 -4.2 A IDM -30 A IS -2.3 A PD 2.7 1.8 W TJ -55/150 ℃ Storgae Temperature Range TSTG -55/150 ℃ Thermal Resistance-Junction to Ambient RθJA 70 Continuous Drain Current (TJ=150℃) TA=25℃ TA=70℃ Pulsed Drain Current Continuous Source Current (Diode Conduction) Power Dissipation TA=25℃ TA=70℃ Operation Junction Temperature ℃/W STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com Copyright © 2007, Stanson Corp. STP4803 2008. V1 STP4803 Dual P Channel Enhancement Mode MOSFET -5.2A ELECTRICAL CHARACTERISTICS ( Ta = 25℃ Unless otherwise noted ) Parameter Symbol Condition Min Typ Max Unit V(BR)DSS VGS=0V,ID=-250uA -30 VGS(th) VDS=VGS,ID=-250 uA -1.0 IGSS Zero Gate Voltage Drain Current On-State Drain Current Static Drain-Source Breakdown Voltage Gate Threshold Voltage V -3.0 V VDS=0V,VGS=±20V ±100 nA IDSS TJ=55℃ VDS=-30V,VGS=0V -1 VDS=-30V,VGS=0V -5 ID(on) VDS=-5V,VGS=10V Drain-source On-Resistance RDS(on) VGS=-10V, ID=-5.2A VGS=-4.5V,ID=-4.0A 0.038 0.052 Ω Forward Tran Conductance gfs VDS=-10V,ID=-5.0A 9.0 S Diode Forward Voltage VSD IS=-2.0A,VGS=0V -0.8 -1.2 V Gate Leakage Current -25 uA 0 A Dynamic Total Gate Charge Qg 15 VDS=-15V,VGS=-10V ID≡-5.0A Gate-Source Charge Qgs Gate-Drain Charge Qgd 2.0 Input Capacitance Ciss 680 Output Capacitance Coss Reverse TransferCapacitance Crss Turn-On Time td(on) Turn-Off Time tr td(off) VDS =-15V,VGS=0V f=1MHz 25 4.0 nC 120 pF 75 VDD=15V,RL=15Ω ID=-1.0A,VGEN=-10V RG=6Ω tf 7.0 15 10 20 40 80 20 40 nS STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com Copyright © 2007, Stanson Corp. STP4803 2008. V1 STP4803 Dual P Channel Enhancement Mode MOSFET -5.2A TYPICAL CHARACTERICTICS (25℃ Unless Note) STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com Copyright © 2007, Stanson Corp. STP4803 2008. V1 STP4803 Dual P Channel Enhancement Mode MOSFET -5.2A TYPICAL CHARACTERICTICS (25℃ Unless Note) STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com Copyright © 2007, Stanson Corp. STP4803 2008. V1 STP4803 Dual P Channel Enhancement Mode MOSFET -5.2A TYPICAL CHARACTERICTICS (25℃ Unless Note) STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com Copyright © 2007, Stanson Corp. STP4803 2008. V1 STP4803 Dual P Channel Enhancement Mode MOSFET -5.2A SOP-8 PACKAGE OUTLINE STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com Copyright © 2007, Stanson Corp. STP4803 2008. V1