APA2172 Stereo, Differential Input Cap-Free Line Driver Features • • • General Description The APA2172 is a stereo, differential input, single supply, and cap-free line driver, which is available in SOP-14 and Operating Voltage: 2.3V~5.5V Differential Input TSSOP-14 packages. The APA2172 is ground-reference output, and doesn’t Ground Reference Output - No Output Capacitor Required (for DC Blocking) - Save the PCB Space need the output capacitors for DC blocking. The advantages of eliminating the output capacitor are saving the - Reduce the BOM Costs • cost, eliminating component height, and improving the low frequency response. - Improve the Low Frequency Response Low Noise and THD+N The external gain setting is recommended using from ±1V/V to ±10V/V. High PSRR provides increased immu- - SNR > 108dB - Noise < 8µVrms • • • • • • nity to noise and RF rectification. APA2172 has shutdown and under-voltage detector function for Depop solution. - THD+N < 0.02% at 20Hz~20kHz Output Voltage Swing Can Reach 2.1Vrms/Ch into 2.5kΩ at VDD=3.3V The APA2172 is capable of driving 2.1Vrms at 3.3V into 2.5kΩ load, and provides short-circuit and thermal pro- High PSRR: 80dB at 217Hz tection. Fast Start-up Time: 500µs Integrate the De-Pop Circuitry Simplified Application Circuit Thermal and Short-Circuit Protection Surface-Mount Packaging - SOP-14 • - TSSOP-14 Lead Free and Green Devices Available (RoHS Compliant) Stereo Input Signal Applications • • • • APA2172 Stereo Line-Out Signal Set-Top Boxes CD/DVD Players LCD TVs HTIBs (Home Theater in Box) ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 1 www.anpec.com.tw APA2172 Pin Configuration RINP 1 14 LINP RINP 1 14 LINP RINN 2 13 LINN RINN 2 13 LINN ROUT 3 12 LOUT ROUT 3 12 LOUT 11 UVP GND 4 GND 4 APA2172 11 UVP APA2172 SDN 5 10 PGND SDN 5 10 PGND VSS 6 CPN 7 9 VDD VSS 6 CPN 7 9 VDD 8 CPP 8 CPP TSSOP-14 (Top View) SOP-14 (Top View) Ordering and Marking Information Package Code O : TSSOP-14 K : SOP-14 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device APA2172 Assembly Material Handling Code Temperature Range Package Code APA2172 O : APA2172 K : APA2172 XXXXX XXXXX - Date Code APA2172 XXXXX XXXXX - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings Symbol VPGND_GND (Note 1) Parameter Rating Unit PGND to GND Voltage -0.3 to 0.3 VDD Supply Voltage (VDD to GND and PGND) -0.3 to 6.0 VSDN Input Voltage (SDN to GND) VSS VSS to GND and PGND Voltage -6.0 to 0.3 VOUT ROUT and LOUT to GND Voltage VSS-0.3 to VDD+0.3 VGND-0.3 to VDD+0.3 V VCPP CPP to PGND Voltage VPGND-0.3 to VDD+0.3 VCPN CPN to PGND Voltage VSS-0.3 to VPGND+0.3 TJ Maximum Junction Temperature 150 TSTG Storage Temperature Range TSDR Maximum Soldering Temperature Range, 10 Seconds PD o C -65 to +150 Power Dissipation 260 Internally Limited W Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 2 www.anpec.com.tw APA2172 Thermal Characteristics Symbol θJA Parameter Thermal Resistance - Junction to Ambient Typical Value Unit (Note 2) TSSOP-14 SOP-14 O 120 120 C/W Note 2: Please refer to “Thermal Pad Consideration”. 2 layered 5 in2 printed circuit boards with 2oz trace and copper through several thermal vias. The thermal pad is soldered on the PCB. Recommended Operating Conditions Symbol Range Parameter Unit Min. Max. 2.3 5.5 VDD Supply Voltage VIH High Level Threshold Voltage SDN 1.0 - VIL Low Level Threshold Voltage SDN - 0.35 TA Operating Ambient Temperature Range -40 85 o o V C TJ Operating Junction Temperature Range -40 125 RL Load Resistance 16 100k C Ω Electrical Characteristics o VDD=3.3V, VGND=VPGND=0V, VSDN=VDD, CCPF=CCPO=1µF, Ci=1µF, RL=2.5kΩ, TA=25 C, Ri=10kΩ, Rf=20kΩ (unless otherwise noted) Symbol Parameter APA2172 Test Conditions Unit Min. Typ. Max. - 10 15 mA IDD VDD Supply Current ISD VDD Shutdown Current VSDN=0V - 1 5 µA Input Current SDN - 0.1 - µA 400 500 600 kHz - 21 25 Ω 100 - dB Il CHARGE PUMP fOSC Switching Frequency Req Equivalent Resistance DRIVERS AVO Open Loop Voltage Gain 80 GW Unity Gain Bandwidth 8 10 - MHz VSR Slew Rate - 4.5 - V/µs VOS Output Offset Voltage VDD=2.3V to 5.5V, RL = 2.5kΩ -5 - 5 mV Ri=10kΩ, Rf=10kΩ - 8 15 µVrms - 500 - µs -80 -80 -50 -60 -60 -45 - 220 - pF - 8 - kV VN Output Noise Tstart-up Start-up Time PSRR Power Supply Rejection Ratio CL VESD VDD=2.3V to 5.5V, Vrr=200mVrms fin= 217Hz fin= 1kHz fin= 20kHz Maximum Capacitive Load ESD Protection Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 OUTR, OUTL 3 - dB www.anpec.com.tw APA2172 Electrical Characteristics (Cont.) o VDD=3.3V, VGND=VPGND=0V, VSDN=VDD, CCPF=CCPO=1µF, Ci=1µF, RL=2.5kΩ, TA=25 C, Ri=10kΩ, Rf=20kΩ (unless otherwise noted) Symbol VO Parameter Output Voltage (Stereo, In Phase) THD+N=1%, fin=1kHz RL=2.5kΩ RL=100kΩ THD+N=1%, fin=1kHz RL=32Ω PO THD+N APA2172 Test Conditions Unit Min. Typ. Max. 2.0 - 2.1 2.3 - - 15 - Output Power (Stereo, In Phase) Total Harmonic Distortion Plus Noise V mW VDD=5V THD+N=1%, fin=1kHz RL=32Ω - VO=2Vrms, RL=2.5kΩ fin=20Hz fin=1kHz fin=20kHz - Po=10mW, RL=32Ω,fin=1kHz 40 - 0.02 0.001 0.02 0.002 - - 0.03 - VDD=5V, Po=30mW, RL=32Ω, fin=1kHz - 0.03 - - Crosstalk Channel Separation VO=2Vrms, RL=2.5kΩ fin=20Hz fin=1kHz fin=20kHz S/N Signal to Noise Ratio VO=2Vrms, RL=2.5kΩ, Ri=10kΩ, Rf=10kΩ, With A-weighting Filter TSD Thermal Shutdown Protection Temperature 100 100 90 % - dB 102 108 - dB - 150 - o C UVP FUNCTION VUVP External Under Voltage Detection - 1.25 - V IHYS External Under Voltage Detection Hysteresis Current - 5.0 - µA Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 4 www.anpec.com.tw APA2172 Typical Operating Characteristics THD+N vs. Output Power 10 In phase RL=32Ω Cin=2.2µ f=1kHz Av=2V/V 1 THD+N (%) 1 THD+N (%) THD+N vs. Output Power 10 VDD=3.3V 0.1 0.01 0 VDD=5V 10 20 30 40 50 VDD=3.3V 0.1 out phase RL=32Ω Cin=2.2µ f=1kHz Av=2V/V 0.01 0 60 20 Output Power (mW) 80 100 In phase RL=10kΩ Cin=2.2µ f=1kHz Av=2V/V 1 VDD=2.3V VDD=3.3V 0.1 60 THD+N vs. Output Voltage 10 In phase RL=600Ω Cin=2.2µ f=1kHz Av=2V/V THD+N (%) THD+N (%) 1 40 Output Power (mW) THD+N vs. Output Voltage 10 VDD=5V VDD=3.3V 0.1 VDD=2.3V 0.01 VDD=5V 0.01 VDD=5V 0.001 0.001 0 2 1 3 4 0 THD+N vs. Output Voltage In phase RL=100kΩ Cin=2.2µ f=1kHz Av=2V/V THD+N (%) THD+N (%) 4 THD+N vs. Frequency 1 0.1 3 Output Voltage (V) 10 1 2 1 Output Voltage (V) VDD=3.3V VDD=2.3V 0.01 In phase VDD=3.3V RL=32Ω Cin=2.2µ Av=2V/V 0.1 Po=1mW Po=5mW Po=10mW 0.01 VDD=5V 0.001 0 1 2 3 0.002 20 4 Output Voltage (V) Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 100 1k 10k 20k Frequency (Hz) 5 www.anpec.com.tw APA2172 Typical Operating Characteristics THD+N vs. Frequency 1 THD+N vs. Frequency 1 In phase VDD=5V RL=32Ω Cin=2.2µ Av=2V/V 0.1 THD+N (%) 0.1 THD+N (%) In phase VDD=3.3V RL=600Ω Cin=2.2µ Av=2V/V Po=3mW Po=30mW Po=15mW 0.01 Vo=1.8Vrms 0.01 0.002 0.001 20 100 1k 20 10k 20k 100 In phase VDD=3.3V RL=100kΩ Cin=2.2µ Av=2V/V 0.1 THD+N (%) THD+N (%) 1 In phase VDD=3.3V RL=10kΩ Cin=2.2µ Av=2V/V 0.1 0.01 0.01 Vo=1.8Vrms Vo=1.8Vrms 0.001 0.001 20 100 1k 20 10k 20k 100 Gain +0 +10 -50 +8 -2 10 100 Gain -300 200k -200 Phase -2 10 -250 VDD=3.3V RL=10kΩ Cin=2.2µ Vo=2Vrms Av=2V/V 100 -300 -350 1k 10k 200k Frequency (Hz) Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 +4 +0 -350 10k -150 +2 -250 1k -100 Phase(Deg) -200 Phase VDD=3.3V RL=600Ω Cin=2.2µ Vo=2Vrms Av=2V/V -50 +6 Phase(Deg) -150 +4 +0 -100 +6 Gain(dB) +8 +0 10k 20k Frequency Response Frequency Response +10 +2 1k Frequency (Hz) Frequency (Hz) Gain(dB) 10k 20k THD+N vs. Frequency THD+N vs. Frequency 1 1k Frequency (Hz) Frequency (Hz) 6 www.anpec.com.tw APA2172 Typical Operating Characteristics (Cont.) Crosstalk vs. Frequency Frequency Response +10 +0 -50 +8 Gain -200 Phase +0 -2 10 -250 VDD=3.3V RL=100kΩ Cin=2.2µ Vo=2Vrms Av=2V/V 100 Crosstalk (dB) +4 Phase(Deg) -150 +2 VDD=3.3V RL=600Ω AV=-1V/V Ci=1µF VO=1Vrms -70 -100 +6 Gain(dB) -60 -80 -90 -100 Right to Left -300 -110 -350 1k 10k Left to Right -120 200k Frequency (Hz) 20 1k 20k Frequency (Hz) Crosstalk vs. Frequency Output Noise Voltage vs. Frequency 20µ -60 -80 Output Noise Voltage (Vrms) VDD=3.3V RL=100kΩ AV=-1V/V Ci=1µF VO=1Vrms -70 Crosstalk (dB) 100 -90 -100 Right to Left -110 VDD=3.3V RL=600Ω AV=-1V/V Ci=1µF A-Weighting 15µ Left channel 10µ Right channel 5µ Left to Right -120 0µ 20 100 1k 20k 100 1k 20k Frequency (Hz) Output Noise Voltage vs. Frequency PSRR vs. Frequency +0 20µ 15µ VDD=3.3V RL=100kΩ AV=-1V/V Ci=1µF A-Weighting Power Supply Rejection Ratio (dB) Output Noise Voltage (Vrms) 20 Frequency (Hz) Left channel 10µ Right channel 5µ 0µ 20 100 1k -40 -60 Right channel -80 Left channel -100 -120 20 20k 100 1k 20k Frequency (Hz) Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 -20 VDD=3.3V RL=600Ω AV=-1V/V Ci=1µF Vrr=0.2Vpp 7 www.anpec.com.tw APA2172 Typical Operating Characteristics (Cont.) PSRR vs. Frequency Output Voltage FFT vs. Frequency +0 VDD=3.3V RL=100kΩ AV=-1V/V Ci=1µF Vrr=0.2Vpp -20 -40 -20 Output Voltage FFT (dBr) -60 Right channel -80 Left channel -100 -40 VDD=3.3V RL=600Ω AV=-1V/V VO=-60dB to 2Vrms -60 -80 -100 -120 -140 -12020 100 1k Frequency (Hz) 20k 0k Supply Current vs. Supply Voltage 5k 10k 15k Frequency (Hz) GSM Power Supply Rejection vs. Frequency 10 +0 -25 -50 -75 -100 -125 AV=-2V/V No Load 9 7 6 5 Output Voltage (dBV) Supply Current (mA) 8 4 3 2 1 0 0.0 1.0 20k 2.0 3.0 4.0 Supply Voltage (V) 5.0 5.5 -150 +0 -25 -50 -75 -100 -125 -150 0 400 800 1.2k Frequency (Hz) 1.6k Supply Voltage (dBV) Power Supply Rejection Ratio (dB) +0 2k GSM Power Supply Rejection vs. Time 1 VDD V LOUT 2 VROUT 3 CH1: VDD, 500mV/Div, DC, Offset=3.3V CH2: VLOUT, 20mV/Div, DC CH3: VROUT, 20mV/Div, DC TIME:2ms/Div Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 8 www.anpec.com.tw APA2172 Operating Waveforms Output Transient at Power On Output Transient at Power Off VDD VDD 1 1 V ROUT VLOUT 2 2 VROUT V LOUT 3 3 CH1: VDD, 1V/Div, DC CH2: VLOUT, 20mV/Div, DC CH3: VROUT, 20mV/Div, DC TIME:2ms/Div CH1: VDD, 1V/Div, DC CH2: VLOUT, 20mV/Div, DC CH3: VROUT, 20mV/Div, DC TIME:10ms/Div Shutdown Release Shutdown VSD VS D 1 1 2 2 VROUT VROUT 3 3 VLOUT VLOUT CH1: VSD, 1V/Div, DC CH2: VLOUT, 1V/Div, DC CH3: VROUT, 1V/Div, DC TIME:1ms/Div Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 CH1: VSD, 1V/Div, DC CH2: VLOUT, 1V/Div, DC CH3: VROUT, 1V/Div, DC TIME:1ms/Div 9 www.anpec.com.tw APA2172 Pin Description PIN NO. NAME 1 RINP FUNCTION I/O/P I Right channel non-inverting input. 2 RINN I Right channel inverting input. 3 ROUT O Right channel output. 4 GND P Signal ground. 5 SDN I Shutdown mod control input signal, pull low for shutdown headphone driver. This pin should be connect a 100Ω Protection Resistor. Headphone driver negative power supply. 6 VSS P 7 CPN I/O 8 CPP I/O 9 VDD P Supply voltage input. 10 PGND P Power ground. Charge pump flying capacitor negative connection. Charge pump flying capacitor positive connection. 11 UVP I Under voltage protection input. Floating or Pull “H” to disable this function. 12 LOUT O Left channel output. 13 LINN I Left channel inverting input. 14 LINP I Left channel non-inverting input. Block Diagram RINN ROUT RINP LINP LOUT LINN Under Voltage Detection Circuit Thermal and Over Current Protection SDN Shutdown Circuit UVP VDD Power and Depop Circuit CPP Charge Pump CPN GND Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 PGND 10 VSS www.anpec.com.tw APA2172 Typical Application Circuit Line Driver Amplifier RFB 1. Inverting R-CH Input RFB CIN 1µF RIN R-CH Output RINN ROUT RINP System Power CIN 1µF L-CH Output LINP LOUT RIN L-CH Input LINN Under Voltage Detection Circuit Thermal and Over Current Protection RSD 100Ω Shutdown SDN Control Shutdown Circuit UVP R3 50kΩ VDD Charge Pump R2 1kΩ LDO CPP Power and Depop Circuit R1 3kΩ 10µF 1µF CCPF 1µF CPN VSS CCPO 1µF GND PGND 2. Non-Inverting RFB RFB CX 1µF RIN RINN ROUT R-CH Input L-CH Input R-CH Output RINP CIN 1µF RX CIN 1µF RX System Power LINP LOUT L-CH Output LINN CX 1µF RIN Shutdown SDN Control RSD 100Ω Under Voltage Detection Circuit Thermal and Over Current Protection Shutdown Circuit UVP VDD Power and Depop Circuit R3 50kΩ CCPF R2 1kΩ LDO CPP Charge Pump R1 3kΩ 1µF 10µF 1µF CPN GND PGND Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 11 VSS CCPO 1µF www.anpec.com.tw APA2172 Typical Application Circuit (Cont.) Line Driver Amplifier (Cont.) 3. Differential RFB RFB CIN 1µF RIN R-CH Output RINN R-CH Input ROUT RINP CIN 1µF CIN 1µF RIN RFB System Power RFB RIN L-CH Output LINP L-CH Input LOUT R1 3kΩ LINN RIN CIN 1µF RSD 100Ω Shutdown SDN Control Under Voltage Detection Circuit Thermal and Over Current Protection UVP VDD Power and Depop Circuit Shutdown Circuit LDO CPP Charge Pump R2 1kΩ R3 50kΩ 10µF 1µF CCPF 1µF CPN VSS CCPO 1µF GND PGND Second-Order Active Low-Pass Filter 1. Differential C1 R2 C3 R1 R-CH Input R3 C2 C3 R1 C3 R1 L-CH Input C2 R2 R2 RINN R3 RINP C1 C1 R2 C1 C1 R3 LINP Cout 220pF LINN LOUT C1 C3 Under Voltage Detection Circuit Thermal and Over Current Protection Shutdown SDN Control R-CH Output System Power R3 R1 ROUT Cout 220pF RSD 100Ω Shutdown Circuit UVP VDD Power and Depop Circuit L-CH Output R3 50kΩ CCPF R2 1kΩ LDO CPP Charge Pump R1 3kΩ 1µF 10µF 1µF CPN GND Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 PGND 12 VSS CCPO 1µF www.anpec.com.tw APA2172 Typical Application Circuit (Cont.) Second-Order Active Low-Pass Filter 2. Inverting R2 C3 R1 R-CH Input C1 R3 RINN C1 ROUT Cout 220pF RINP C2 R2 C2 L-CH Input R1 R-CH Output System Power C1 Cout 220pF LINP R3 LINN LOUT C1 C3 Under Voltage Detection Circuit Thermal and Over Current Protection Shutdown SDN Control RSD 100Ω L-CH Output Shutdown Circuit UVP VDD Power and Depop Circuit R3 50kΩ CCPF R2 1kΩ LDO CPP Charge Pump R1 3kΩ 1µF 10µF 1µF CPN GND PGND Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 13 VSS CCPO 1µF www.anpec.com.tw APA2172 Function Description Line Driver Operation Shutdown Function In order to reduce power consumption while not in use, the APA2172 contains shutdown controllers to externally VDD turn off the amplifier bias circuitry. This shutdown feature turns the amplifier off when logic low is placed on the VOUT VDD/2 SDN pins for the APA2172. The trigger point between a logic high is 1.0V and logic low level is 0.35V. It is recomGND mended to switch between ground and the supply voltage VDD to provide maximum device performance. By Conventional Line Driver switching the SDN pins to a low level, the amplifier enters a low-consumption current circumstance, charge pump VDD is disabled, and IDD for the APA2172 is in shutdown mode. In normal operating, the APA2172’s SDN pins should be pulled to a high level to keep the IC out of the shutdown mode. The SDN pins should be tied to a definite voltage VOUT GND to avoid unwanted circumstance changes. Under-Voltage Protection External under voltage detection can be used to shutdown the APA2172 before an input device can generate a VSS pop. The shutdown threshold at the UVP pin is 1.25V. The user selects a resistor divider to obtain the shut- Cap-free Line Driver down threshold and hysteresis for the specific application. The thresholds can be determined as below: Figure 1. Cap-free Operation The APA2172’s line drivers use a charge pump to invert the positive power supply (VDD) to negative power supply VUVP = (1.25-6µAxR3) x (R1+R2)/R2 Hysteresis = 5µA x R3 x (R1+R2)/R2 (VSS), see figure1. The headphone drivers operate at this bipolar power supply (VDD and VSS) and the outputs refer- With the condition: R3>>R1//R2 For example, to obtain VUVP=3.8V and 1V hysteresis, R1= ence refers to the ground. This feature eliminates the output capacitor that is using in conventional single-ended 3kΩ, R2=1kΩ and R3=50kΩ. headphone drive amplifier. Compare with the single power supply amplifier, the power supply range has al- Vsystem most doubled. R1 3kΩ Thermal Protection The thermal protection circuit limits the junction temperature of the APA2172. When the junction temperature exceeds TJ=+150OC, a thermal sensor turns off the driver, R2 1kΩ R3 50kΩ UVP Pin 1.25V 6µA allowing the devices to cool. The thermal sensor allows the driver to start-up after the junction temperature down about 125OC. The thermal protection is designed with a 25OC hysteresis to lower the average TJ during continu- Figure 2. Under-Voltage Protection ous thermal overload conditions, increasing lifetime of the ICs. Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 14 www.anpec.com.tw APA2172 Application Information Input Capacitor, Ci Using The APA2172 As A Second-Order Filter Several audio DACs used today require an external lowpass filter to remove out-of-band noise. This is possible Ri Ci Rf with the APA2172, as it can be used like a standard Operational Amplifier. Several filter topologies can be implemented, both single-ended and differential. In Figure 3, a multi-feedback (MFB) with differential input and Figure 4. Typical Application Circuit single-ended input is shown. An ac-coupling capacitor to remove dc content from the In the typical application, an input capacitor, Ci, is required to allow the amplifier to bias the input signal to the proper source is shown; it serves to block any dc content from the source and lowers the dc-gain to 1, helping reducing DC level for optimum operation. In this case, Ci and the minimum input impedance Ri from a high-pass filter with the output dc-offset to minimum. R2 Cx C3 R1 R3 Cy 6pF In C2 C1 the corner frequency are determined in the following equation: Differential Input R2 Cx C3 R1 R3 Cy 6pF In C2 C1 Inverting Input Out C3 R1 R3 Cout In + 220pF C1 fc (highpass ) = Out Cout 220pF circuit. Ri is the external input resistance that typical value is 10kΩ and the specification calls for a flat bass re- Figure 3. Second-Order Active Low-Pass Filter sponse down to 20Hz. Equation is reconfigured as below: Table 1: Filter Specifications. High Low C1 Gain Pass Pass (V/V) (pF) (Hz) (kHz) Ci = C2 (pF) C3 (µF) R1 (kΩ) R2 (kΩ) R3 (kΩ) 10 10 10 24 -1 1.6 40 100 680 -1.5 1.3 40 68 680 15 8.2 12 30 -2 1.6 60 33 150 6.8 15 30 47 -2 1.6 30 47 470 6.8 15 30 43 -3.33 1.2 30 33 470 10 13 43 43 -10 1.5 30 22 1000 22 4.7 47 27 leakage path from the input source through the input network (Ri + Rf, Ci) to the load. This leakage current creates a DC offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason, a low leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the negative side of the capacitor should face the amplifiers’ input in most (1) 1 2πR1C3 applications because the DC level of the amplifiers’ input is held at GND. Please note that it is important to (2) confirm the capacitor polarity in the application. Input Resistor, Ri The low pass filter’s cutoff frequency is: fc(lowpass) = 1 2π R2R3C1C2 (5) is 0.8µF, so a value in the range of 1µF to 2.2µF would be chosen. A further consideration for this capacitor is the The high pass filter’s cutoff frequency is: fc(highpass) = 1 2πRifc(highpass) When the input resistance variation is considered, the Ci For Inverting Input, The overall gain is: R2 AV = − R1 (4) The value of Ci must be considered carefully because it directly affects the low frequency performance of the R2 Cx+Cy=C1 Cy:internal Capacitance(6pF) Cx+Cy=C1 Cy:internal Capacitance(6pF) 1 2πRiCi The gain of the APA2172 is be set by the external input resistor (Ri) and external feedback resistor (Rf). Please (3) see the figure 4. Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 15 www.anpec.com.tw APA2172 Application Information (Cont.) Input Resistor, Ri (Cont.) Gain ( A V ) = Rf Ri Charge Pump Output Capacitor, CCPO The output capacitor’s value affects the power ripple di- (6) rectly at CVSS (VSS). Increasing the value of output capacitor reduces the power ripple. The ESR of output capacitor The external gain setting is recommended using from -1V/V to -10V/V, and the Ri is in the range from 1kΩ to affects the load transient of CVSS (VSS). Lower ESR and greater than 1µF ceramic capacitor is a recommendation. 47kΩ. It’s recommended to use 1% tolerance resistor or better. Keep the input trace as short as possible to limit the noise injection. The gain is recommended to set -1V/V, and Ri is 10kΩ, Layout Recommendation and Rf is 10kΩ. 1.5mm Feedback Resistor, Rf 0.7mm Refer the figure 4, the external gain is setting by Ri and Rf; and the gain setting is recommended using from -1V/V to 1.27mm -10V/V. The Rf is in the range from 4.7kΩ to 100kΩ. It’s recommended to use 1% tolerance resistor or better. Power Supply Decoupling, Cs The APA2172 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD+N) is as low as possible. Power supply decoupling also prevents the oscillations being caused by long lead length 5.0mm between the amplifier and the speaker. The optimum decoupling is achieved by using two different types of capacitors that target on different types of noise on the power supply leads. For higher frequency SOP-14 Land Pattern Recommendation transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, 4.7mm typically 0.1µF, is placed as close as possible to the device VDD and PVDD lead for the best performance. For 1.7mm 1.7mm 0.35mm filtering lower frequency noise signals, a large aluminum electrolytic capacitor of 10µF or greater placed near the audio power amplifier is recommended. Charge Pump Flying Capacitor, CCPF The flying capacitor affects the load transient of the charge pump. If the capacitor’s value is too small, then that will degrade the charge pump’s current driver capability and 0.65mm the performance of line drive amplifier. Increasing the flying capacitor’s value will improve the TSSOP-14 Land Pattern Recommendation load transient of charge pump. It is recommended using the low ESR ceramic capacitors (X7R type is recommended) above 1µF. Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 16 www.anpec.com.tw APA2172 Package Information TSSOP-14 D b A 0.25 c A2 e E E1 SEE VIEW A GAUGE PLANE A1 SEATING PLANE S Y M B O L VIEW A L TSSOP-14 INCHES MILLIMETERS MIN. MAX. A MIN. MAX. 1.20 0.047 A1 0.05 0.15 0.002 0.006 A2 0.80 1.05 0.031 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.008 D 4.90 5.10 0.193 0.201 E 6.20 6.60 0.244 0.260 E1 4.30 4.50 0.169 0.177 0.026 BSC 0.65 BSC e L 0.45 0.75 0.018 0.030 0 0° 8° 0° 8° Note : 1. Follow from JEDEC MO-153 AB-1. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension "E1" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 17 www.anpec.com.tw APA2172 Package Information SOP-14 D E E1 SEE VIEW A h X 45 ° e c 0.25 A GAUGE PLANE SEATING PLANE A1 A2 b L VIEW A S Y M B O L SOP-14 INCHES MILLIMETERS MIN. MAX. A MIN. MAX. 1.75 0.25 0.069 0.010 0.004 A1 0.10 A2 1.25 b 0.31 0.51 0.012 0.020 c 0.17 0.25 0.007 0.010 D 8.55 8.75 0.337 0.344 E 5.80 6.20 0.228 0.244 E1 3.80 4.00 0.150 0.157 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 0 0° 8° 0° e 0.049 1.27 BSC 0.050 BSC 8° Note: 1. Follow JEDEC MS-012 AB. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension “E” does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 18 www.anpec.com.tw APA2172 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application A H 330.0±2.00 50 MIN. P0 P1 TSSOP-14 T1 C 16.4+2.00 13.0+0.50 -0.00 -0.20 d D W E1 F 1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.50±0.10 P2 D0 D1 T A0 B0 K0 1.5 MIN. 0.6+0.00 -0.40 6.40±0.20 5.20±0.20 1.60±0.20 4.00±0.10 8.00±0.10 2.00±0.10 1.5+0.10 -0.00 A H T1 C d D W E1 F 330.0±2.00 50 MIN. 16.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 16.0±0.30 1.75±0.10 7.50±0.10 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.10 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 6.40±0.20 9.00±0.20 2.10±0.20 Application SOP-14 4.0±0.10 8.0±0.10 (mm) Devices Per Unit Package Type Unit Quantity TSSOP-14 Tape & Reel 2500 SOP-14 Tape & Reel 2500 Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 19 www.anpec.com.tw APA2172 Taping Direction Information TSSOP-14 USER DIRECTION OF FEED SOP-14 USER DIRECTION OF FEED Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 20 www.anpec.com.tw APA2172 Classification Profile Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3 °C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 21 www.anpec.com.tw APA2172 Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) 3 Package Thickness <2.5 mm Volume mm <350 235 °C Volume mm ≥350 220 °C ≥2.5 mm 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.8 - Aug., 2013 22 www.anpec.com.tw