APA2012 3W Mono Class-D Audio Power Amplifier With Auto-Recovering Short-Circuit Protection Features General Description • • Operating Voltage: 2.4V-6V Low Supply Current The APA2012 is a mono, filter-free Class-D audio amplifier available in a WLCSP package. The gain can be set- – IDD=1.8mA at VDD=5V – IDD=1.5mA at VDD=3.6V ting by external input resistance. High PSRR and differential architecture provide increased immunity to noise Low Shutdown Current – IDD=0.1µA at VDD=5V and RF rectification. In addition to these features, a fast startup time and small package size make the APA2012 Output Power at 1% THD+N an ideal choice for both cellular handsets and PDAs. The APA2012 is capable of driving 1.3 W at 5 V or 600 mW – 1.40W, at VDD=5V, RL=8Ω – 0.74W, at VDD=3.6V, RL=8Ω at 3.6 V into 8 Ω. The APA2012 is also capable of driving 4 Ω. The APA2012 is designed with a Class-D architec- – 2.51W, at VDD=5V, RL=4Ω – 1.32W, at VDD=3.6V, RL=4Ω ture and operating with highly efficiency compared with Class-AB amplifier. It's suitable for power sensitive at 10% THD+N – 1.8W, at VDD=5V, RL=8Ω application, such as battery powered devices. The filterfree architecture eliminates the output filter, reduces the – 0.91W, at VDD=3.6V, RL=8Ω – 3.2W, at VDD=5V, RL=4Ω external component count, board area, and system costs, and simplifies the design. – 1.62W, at VDD=3.6V, RL=4Ω Less External Components Required The APA2012 provides thermal and over circuit protection. • • • • • • • Fast Startup Time (4ms) High PSRR: 75 dB at 217 Hz Short-Circuit and Thermal Protection 9-Ball, 1.2mm x 1.2 mm Pitch WLCSP Simplified Application Circuit Applications • • • • APA2012 OUTN Input Signal INN VON INP VOP Mobile Phones Handsets PDAs Portable multimedia devices OUTP SHUTDOWN Bias Circuitry ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 1 www.anpec.com.tw APA2012 Pin Configuration Top View VDD (B1) INN (C1) GND (A2) VON (A3) PVDD PGND (B2) (B3) SD (C2) SD 1 8 VOP INN 2 1.2mm INP (A1) 7 PVDD VDD 3 6 GND INP 4 5 VON TDFN3x3-8 (Top View) VOP (C3) 1.2mm WLCSP1.2x1.2-9 Ordering and Marking Information Package Code HA : WLCSP1.2x1.2-9 QB : TDFN3x3-8 Operating Ambient Temperature Range I : -40 to 85oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device APA2012 Assembly Material Handling Code Temperature Range Package Code APA2012 HA: A2 X X - Date Code APA2012 QB: APA 2012 X X - Date Code Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings (Note 1) (Over operating free-air temperature range unless otherwise noted.) Symbol Parameter Rating Unit VDD Supply Voltage (VDD, PVDD) -0.3 to 6.3 V VIN, VSD Input Voltage (SD, INP, INN) -0.3 to 3.6 V TJ TSTG Maximum Junction Temperature Storage Temperature Range TS Soldering Temperature Range PD Power Dissipation 150 ο -65 to +150 ο 260 ο C C C Internally Limited W Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 2 www.anpec.com.tw APA2012 Thermal Characteristics Symbol Parameter Typical Value Unit Thermal Resistance -Junction to Ambient (Note 2) θJA ο 165 60 WLCSP1.2x1.2-9 TDFN3x3-8 C/W Note 3 : Please refer to “ Layout Recommendation”, the ThermalPad on the bottom of the IC should soldered directly to the PCB's ThermalPad area that with several thermal vias connect to the ground plan, and the PCB is a 2-layer, 5-inch square area with 2oz copper thickness. Recommended Operating Conditions Symbol Parameter Range VDD Supply Voltage VIH High Level Threshold Voltage SD 1~3 VIL Low Level Threshold Voltage SD 0 ~ 0.35 TA Ambient Temperature Range -40 ~ 85 TJ Junction Temperature Range -40 ~ 125 Unit 2.4 ~ 3 V o C Electrical Characteristics VDD=5V, GND=0V, TA= 25οC (unless otherwise noted) Symbol Parameter Test Conditions APA2012 Min. Typ. Max. Unit IDD Supply Current No load - 1.8 - mA IIH SD High-Level Input Curent SD = VDD - 50 - µA IIL SD High-Level Input Curent SD = 0V - 1 - µA ISD VDD shutdown supply current SD = 0V - 1 2 µA Fosc Oscillator Frequency - 300 - kHz P-Channel MOSFET - 200 - N-Channel MOSFET - 200 - P-Channel MOSFET - 220 - N-Channel MOSFET - 220 - VDD = 5V RDSON Static drain-source on-state resistance VDD = 3.6V Vos Output Offset Voltage INN and INP connect together, A V=2V/V AV Gain Rin in kΩ OTP Tstart-up mΩ - 1 5 mV 285/Rin 300/Rin 315/Rin V/V Over Temperature Protection - 170 - o Start up time - 4 - ms Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 3 C www.anpec.com.tw APA2012 Electrical Characteristics VDD=5V, GND=0V, TA= 25οC (unless otherwise noted) Symbol Parameter Test Conditions APA2012 Min. Typ. Max. Unit VDD=5V, TA=25° C RL = 4Ω - 2.51 - fin = 1kHz RL = 8Ω - 1.41 - THD+N = 10%, fin = 1kHz RL = 4Ω - 3.2 - RL = 8Ω 1 1.8 - RL = 4Ω PO= 1.7W - 0.1 - - 0.1 - - 75 - dB THD+N = 1%, PO THD+N Output Power Total Harmonic Distortion Pulse Noise fin = 1kHz W % Power Supply Rejection Ratio RL = 8Ω PO= 0.9W Inputs AC floating, VPP=200mV ripple, f = 217Hz S/N Signal-to-noise ratio With A-weighted Filter PO=0.43W, RL=8Ω - 90 - dB Vn Noise Output Voltage Inputs AC grounded with Ci=2µF, f=20Hz to 20kHz, A-weighting Filter - 55 - µV (rms) RL = 4Ω - 1.32 - RL = 8Ω - 0.74 - RL = 4Ω - 1.62 - RL = 8Ω - 0.91 - RL = 4Ω PO= 0.84W - 0.1 - - 0.1 - - 75 - dB PSRR VDD=3.6V, TA=25° C THD = 1% f = 1KHz Po Output Power THD = 10% f = 1KHz THD+N PSRR S/N Vn Total harmonic Distortion Pulse Noise f=1KHz W % Power Supply Rejection Ratio RL = 8Ω PO= 0.4W Inputs AC floating, VPP=200mV ripple, f = 217Hz Signal-to-noise ratio With A-weighted Filter PO=0.43W, RL=8Ω - 90 - dB Noise Output Voltage Inputs AC grounded with Ci=2µF, f=20Hz to 20kHz, A-weighting Filter - 55 - µV (rms) Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 4 www.anpec.com.tw APA2012 Typical Operating Characteristics THD+N vs. Output Power THD+N vs. Output Power 10 10 VDD=3.6V THD+N (%) THD+N (%) VDD=3.6V VDD=5.5V 1 1 VDD=5.5V 0.1 0.1 fin=1kHz Cin=0.1uF Rin=150kΩ RL=4Ω VDD=5V VDD=2.4V 0.01 0 2 1 3 VDD=2.4V 0.01 0 4 0.4 0.8 1.2 1.6 2 2.4 Output Power (W) Output Power (W) THD+N vs. Frequency THD+N vs. Frequency 1 1 Po=1.7W THD+N (%) Po=0.9W 0.1 THD+N (%) fin=1kHz Cin=0.1uF Rin=150kΩ RL=8Ω VDD=5V Po=0.8W Po=0.17W 0.1 Po=0.45W Po=0.09W 0.01 0.01 0.001 20 VDD=5V Cin=0.1uF Rin=150kΩ RL=8Ω VDD=5V Cin=0.1uF Rin=150kΩ RL=4Ω 100 1k 0.001 20 10k 20k 100 Frequency (Hz) 1k 10k 20k Frequency (Hz) Output Noise Voltage vs. Frequency Frequence Response +10 85µ +300 +8 Output Noise Voltage(µV) +200 +6 +0 +4 +2 -100 VDD=5V Cin=0.1uF Rin=150kΩ RL=4Ω Po=2.1W -200 -300 100 1k Frequency (Hz) 10k Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 65µ Cin=0.1uF Rin=150kΩ RL=4Ω Input Short to GND A-weighting VDD=2.4V VDD=3.6V 55µ 50µ VDD=5.5V VDD=5V -400 +0 20 Phase(Deg) Gain(dB) +100 75µ 45µ 20 50k 100 1k 10k 20k Frequency (Hz) 5 www.anpec.com.tw APA2012 Typical Operating Characteristics (Cont.) Output Noise Voltage vs. Frequency 80µ CMRR vs. Frequency Common Mode Rejection Ratio(dB) Output Noise Voltage(µV) 90µ Cin=0.1uF Rin=150kΩ RL=8Ω Input Short to GND A-weighting +0 Cin=0.1µF Rin=150kΩ RL=4Ω Input Short AES-17(20kHz) -20 VDD=2.4V 70µ -40 VDD=3.6V 62µ 55µ 50µ 45µ 20 VDD=5V 100 VDD=5.5V 1k Frequency (Hz) VDD=2.4V -80 20 10k 20k 100 CMRR vs. Frequency -20 VDD=5V VDD=2.4V 100 -40 VDD=2.4V -60 VDD=5V VDD=3.6V VDD=3.6V 1k Frequency (Hz) -100 20 10k 20k Cin=0.1µF Rin=150kΩ RL=8Ω AES-17(20kHz) VDD=2.4V VDD=5.5V VDD=5V VDD=3.6V 100 10k 20k 1.6 -60 -100 20 1k Frequency (Hz) Supply Current vs. Supply Voltage -40 -80 100 2 Supply Current(mA) PSRR(dB) -20 VDD=5.5V VDD=5.5V PSRR VS Frequency +0 10k 20k Cin=0.1µF Rin=150kΩ -20 RL=4Ω AES-17(20kHz) -80 -80 20 1k Frequency (Hz) +0 -40 -60 VDD=3.6V PSRR VS Frequency Cin=0.1µF Rin=150kΩ RL=8Ω Input Short AES-17(20kHz) PSRR(dB) Common Mode Rejection Ratio(dB) +0 VDD=5.5V VDD=5V -60 1.2 0.8 0.4 1k Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 0 10k 20k 0 6 1 2 3 4 Supply Voltage(V) 5 www.anpec.com.tw APA2012 Typical Operating Characteristics (Cont.) Output Noise Voltage vs. Frequency 80µ Cin=0.1uF Rin=150kΩ RL=8Ω Input Short to GND A-weighting 0.16 Shutdown Current(uA) Output Noise Voltage(µV) 90µ Shutdown Current vs. Supply Voltage 0.2 VDD=2.4V 70µ VDD=3.6V 62µ 55µ 0.12 0.08 0.04 50µ 45µ 20 VDD=5V 100 1k Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 VDD=5.5V 0 10k 20k 7 0 1 2 3 4 Supply Voltage(V) 5 www.anpec.com.tw APA2012 Pin Description PIN NO. I/O FUNCTION INP I The non-inverting input of amplifier. INP is connected to Gnd via a capacitor for single-end (SE) input signal. 6 GND - Ground connection for circuitry. A3 5 VON O The negative output terminal of Class-D amplifier. B1 3 VDD - Supply voltage input pin. B2 7 PVDD - Supply voltage only for power stage. B3 - PGND - Ground connection for power stage C1 2 INN I The inverting input of amplifier. INN is used as audio input terminal, typically. C2 1 SD I Shutdown mode control signal input, place entire IC in shutdown mode when held low. C3 8 VOP O The positive output terminal of Class-D amplifier. WLCSP1.2x1.2-9 TDFN3x3-8 A1 4 A2 NAME Block Diagram PVDD VON Gate Drive INN De-glitch & Modulati on Logic INP VOP Gate Drive Biases & Reference VDD GND RAMP GEN POR SD 320kΩ Startup protection logic TTL Input Buffer Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 8 Over-Current Protection Thermal Protection www.anpec.com.tw APA2012 Typical Application Circuit Differential input mode (WLCSP-9) VDD 1µF Negative input signal 0.1µF 10µF VDD PVDD (B1) (B2) INN (C1) VON 150KΩ (A3) Positive input signal 0.1µF INP (A1) APA2012 150KΩ 4 VOP SD Shutdown signal (C3) (C2) GND PGND (A2) (B3) Single-ended input mode (WLCSP-9) VDD 1µF Singal-ended signal 0.1µF 10µF VDD PVDD (B1) (B2) INN (C1) VON 150KΩ (A3) 0.1µF INP (A1) APA2012 150KΩ 4 VOP SD Shutdown signal (C3) (C2) GND (A2) Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 9 PGND (B3) www.anpec.com.tw APA2012 Application Information Fully Differential Amplifier The APA2012 is a fully differential amplifier with differen- The APA2012 modulation scheme is show in figure 1, The outputs VOP and VON are in phase with each other tial inputs and outputs. The fully differential has some advantages versus traditional amplifier. First, there is no when no input signals. When output > 0V the duty cycle of VOP is greater than 50% and VON is less than 50%, and need for the input coupling capacitors, because the common-mode feedback will compensate the input bias. The when output <0V, the duty cycle of VOP is less than 50% and VON is greater than 50%. This method reduces the inputs can biased from 0.5V~VDD-0.5V, and the outputs still be biased at mid-supply of APA2012. If the inputs are switching current across the load, and reduces the I2R losses in the load that improve the amplifier’s efficiency. biased out of the input range, the coupling capacitors are required. Second, No need the mid-supply capacitor (CB), This modulation scheme has very short pulses across the load, this making the small ripple current and very this is because any shift of the mid-supply of APA2012, will have the same affect both positive & negative channel, little loss on the load, and the LC filter can be eliminate in most applications. Added the LC filter can increase the and will cancel at the differential outputs. Third, The fully differential amplifier will cancel the GSM RF transmitter’s efficiency by filter the ripple current. signal (217Hz). Shutdown Function Class-D Operation In order to reduce power consumption while not in use, the APA2012 contains a shutdown function to externally Output = 0 turn off the amplifier bias circuitry. This shutdown feature turns the amplifier off when logic low is placed on the SD VOUTP pin for APA2012. The trigger point between a logic high and logic low level is typically 0.4VDD. It is best to switch VOUTN between ground and the supply voltage VDD to provide maximum device performance. By switching the SD pin to low level, the amplifier enters a low-consumption- cur- VOUT (VOUTP-VOUTN) rent state,IDD for APA2012 is in shutdown mode. On normal operating, APA2012’s SD pin should pull to high level IOUT Output > 0 to keeping the IC out of the shutdown mode. The SD pin should be tied to a definite voltage to avoid unwanted VOUTP state changes. VOUTN Square Wave Into the Speaker VOUT (VOUTP-VOUTN) Apply the square wave into the speaker may cause the voice coil of speaker jump out the air gap and deface the voice coil. But this depend on the amplitude of square IOUT Output < 0 VOUTP wave is high enough and the bandwidth of speaker is high than the square wave¡¦s frequency. For 250KHz VOUTN switching frequency, this is not issue for the speaker, because the frequency is beyond the audio band, and VOUT (VOUTP-VOUTN) can¡¦t significantly move the voice coil, as cone movement 2 is proportional to 1/f for frequency out of audio band. IOUT Figure 1. APA2012 Output waveform (Voltage& Current) Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 10 www.anpec.com.tw APA2012 Application Information (Cont.) Over Current Protection The APA2012 monitors the output current, and when the The value of Cin must be considered carefully because it directly affects the low frequency performance of the circuit. current exceeds the current-limit threshold, the APA2012 turn-off the output stage to prevent the output device from For example, when Rin is 100kΩ and the specification calls for a flat bass response are down to 40Hz. The damages in over-current or short-circuit condition. The IC will turn-on the output buffer after 100ms, but if the over- equation is reconfigured as below: Cin = current or short-circuits condition is still remain, it enters the Over-Current protection again. The situation will cir- 1 2πRinFc (3) When input resistance is considered, the Cin is 0.2µF. Therefoe, a value in the range of 0.22µF to 0.1.0µF would culate until the over-current or short-circuits has be removed. be chosen. A further consideration for this capacitor is the leakage path from the input source through the input net- Thermal Protection work (Rin + Rf, Cin) to the load. This leakage current creates a DC offset voltage at the The over-temperature circuit limits the junction temperature of the APA2012. When the junction temperature o exceedsTJ=+170 C, a thermal sensor turns off the output input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason, a low- buffer, allowing the devices to cool. The thermal sensor allows the amplifier to start-up after the junction tempera- leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of o ture down about 150 C. The thermal protection is deo signed with a 25 C hysterics to lower the average TJ dur- the capacitor should face the amplifier input in most applications because the DC level of the amplifiers’inputs are ing continuous thermal overload conditions, increasing lifetime of the IC. held at VDD/2. Please note that it is important to confirm the capacitor polarity in the application. Input Resistance, Rin Power Supply Decoupling, Cs The gain of the APA2012 has been set by the external The APA2012 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to resistors (Rin ). Gain(Av) = 2X150k Ω Rin (1) ensure the output total harmonic distortion (THD+N) is as low as possible. Power supply decoupling also pre- For fully differential operating, the Rin match is very impor- vents the oscillations being caused by long lead length between the amplifier and the speaker. tant for CMRR, PSRR and harm onic distortion performance. It’s recommended to use 1% tolerance re- The optimum decoupling is achieved by using two different types of capacitors that target on different types of sistor or better. Keeping the input trace as short as possible to limit the noise injection. noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low The gain is recommended to set as 2V/V or lower for APA2012 optimal performance. Input Capacitor, Cin equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1µF, is placed as close as possible to the de- In the typical application, an input capacitor, Cin, is required to allow the amplifier to bias the input signal to the proper vice VDD pin for the best operation. For filtering lower frequency noise signals, a large aluminum electrolytic DC level for optimum operation. In this case, Cin and the capacitor of 10µF or greater is placed near the audio power amplifier is recommended. minimum input impedance Rin from a high-pass filter with the corner frequency are determined in the following equation: FC(highpass ) = 1 2πRinCin Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 (2) 11 www.anpec.com.tw APA2012 Application Information (Cont.) Output LC Filter For mixing two Single-Ended (SE) input signals, please refer to Figure 4. The gains of each input can be set If the traces from the APA2012 to speaker are short, the APA2012 doesn’t require output filter for FCC & CE difference: standard. A ferrite bead may be needed if it’s failing the test for FCC A V (1) = (5) or CE is tested without the LC filter. The Figure 2 is the sample for adding ferrite bead; the ferrite shows when 2 × 150k Ω R1 A V (2) = 2 × 150k Ω R2 (6) choosing high impedance in high frequency. VON The corner frequency of each input high- pass-filter also can be set by R1&C1, and R2&C2. Ferrite Bead The non-inverting input’s resistor (RP) and capacitor (CP) need to match the impedances of invert inputs. 1nF Ferrite Bead VOP CP = C1//C2 = C1 + C2 (7) R1 × R 2 R1 + R 2 (8) 4Ω RP = R1//R 2 = 1nF Figure 2. Ferrite bead output filter Figure 3 is an example for adding the LC filter. It’s recommended to eliminate the radiated emission or EMI when the trace from amplifier to speaker is too long. VON 33µH 1µF 33µH VOP 4 1µF Figure 3. LC output filter Figure 3’s low pass filter cut-off frequency is FC FC(lowpass) = 1 (4) 2π LC Mixing Two Single-Ended Input Signals C1 R1 C2 R2 INP CP RP INN Figure 4. Mixing Two Single-Ended Input Signals Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 12 www.anpec.com.tw APA2012 Package Information E WLCSP1.2x1.2-9 PIN 1 A2 A1 D A NX aaa e SEATING PLANE b S Y M B O L e WLCSP1.2x1.2-9 MILLIMETERS MIN. INCHES MAX. A MIN. MAX. 0.63 0.025 A1 0.12 0.20 0.005 0.008 A2 0.37 0.43 0.015 0.017 b 0.20 0.30 0.008 0.012 D 1.10 1.25 0.043 0.049 E 1.10 1.25 0.043 0.049 e 0.40 BSC 0.016 BSC aaa 0.05 BSC 0.002 Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 13 www.anpec.com.tw APA2012 Package Information TDFN3x3-8 A b E D Pin 1 A1 D2 A3 L K E2 Pin 1 Corner e S Y M B O L TDFN3x3-8 MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 0.70 0.80 0.028 0.031 A1 0.00 0.05 0.000 0.002 0.014 A3 0.20 REF 0.008 REF b 0.25 0.35 0.010 D 2.90 3.10 0.114 0.122 D2 1.90 2.40 0.075 0.094 E 2.90 3.10 0.114 0.122 E2 1.40 1.75 0.055 0.069 e L K 0.65 BSC 0.30 0.026 BSC 0.012 0.50 0.20 Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 0.020 0.008 14 www.anpec.com.tw APA2012 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 A H 178.0± 2.00 50 MIN. P0 P1 T1 8.4+2.00 -0.00 P2 4.0±0.10 4.0±0.10 2.0±0.05 A H 330± 2.00 50 MIN. P0 P1 T1 12.4+2.00 -0.00 P2 4.0±0.10 8.0±0.10 2.0±0.05 Application WLCSP1.5X1.5-9A Application TDFN3x3-8 C 13.0+0.50 -0.20 D0 1.5+0.10 -0.00 C 13.0+0.50 -0.20 D0 1.5+0.10 -0.00 d D W E1 F 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 D1 A0 B0 K0 1.70±0.20 1.70±0.20 d T 0.6+0.00 -0.40 D 1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 D1 T 0.6+0.00 -0.40 1.5 MIN. 1.5 MIN. W E1 0.90±0.20 F 5.5±0.05 A0 B0 K0 3.30±0.20 3.30±0.20 1.00±0.20 (mm) Devices Per Unit Package Type Unit Quantity WLCSP1.2X1.2-9 Tape & Reel 3000 TDFN3x3-8 Tape & Reel 3000 Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 15 www.anpec.com.tw APA2012 Taping Dircetion Information WLCSP1.2x1.2-9 USER DIRECTION OF FEED TDFN3x3-8 USER DIRECTION OF FEED Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 16 www.anpec.com.tw APA2012 Classification Profile Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 17 www.anpec.com.tw APA2012 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3°C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) 3 Package Thickness <2.5 mm Volume mm <350 235 °C Volume mm ≥350 220 °C ≥2.5 mm 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 18 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA www.anpec.com.tw APA2012 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.3 - Oct., 2013 19 www.anpec.com.tw