ETC VND830ASP13TR

VND830ASP
®
DOUBLE CHANNEL HIGH SIDE SOLID STATE RELAY
TYPE
VND830ASP
RDS(on)
60 mΩ (*)
IOUT
6 A (*)
VCC
36 V (*)
(*) Per channel
10
DC SHORT CIRCUIT CURRENT: 6A
■ CMOS COMPATIBLE INPUTS
■ PROPORTIONAL LOAD CURRENT SENSE
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUT-DOWN
■ OVERVOLTAGE CLAMP
■ THERMAL SHUT-DOWN
■ CURRENT LIMITATION
■ VERY LOW STAND-BY POWER DISSIPATION
■
PROTECTION AGAINST:
LOSS OF GROUND AND LOSS OF VCC
■ REVERSE BATTERY PROTECTION (**)
■
DESCRIPTION
The VND830ASP is a monolithic device made using
STMicroelectronics VIPower M0-3 technology. It
is intended for driving any kind of load with one
1
PowerSO-10™
ORDER CODES
PACKAGE
TUBE
T&R
PowerSO-10™ VND830ASP VND830ASP13TR
side connected to ground. Active VCC pin voltage
clamp protects the device against low energy
spikes (see ISO7637 transient compatibility table).
This device has two channels in high side
configuration; each channel has an analog sense
output on which the sensing current is proportional
(according to a known ratio) to the corresponding
load current. Built-in thermal shut-down and
outputs current limitation protect the chip from
over temperature and short circuit. Device turns off
in case of ground pin disconnection.
BLOCK DIAGRAM
VCC
OVERVOLTAGE
VCC CLAMP
UNDERVOLTAGE
PwCLAMP 1
DRIVER 1
OUTPUT 1
ILIM1
INPUT 1
Vdslim1
LOGIC
IOUT1
INPUT 2
Ot1
CURRENT
SENSE 1
K
PwCLAMP 2
DRIVER 2
GND
Ot1
OVERTEMP. 1
OVERTEMP. 2
Vdslim2
Ot2
OUTPUT 2
ILIM2
IOUT2
K
Ot2
CURRENT
SENSE 2
(**) See application schematic at page 8
July 2003
1/17
VND830ASP
ABSOLUTE MAXIMUM RATING
Symbol
VCC
-VCC
-IGND
IOUT
IR
IIN
VCSENSE
Parameter
DC Supply Voltage
Reverse Supply Voltage
DC Reverse Ground Pin Current
Output Current
Reverse Output Current
Input Current
Value
41
- 0.3
- 200
Internally Limited
-6
+/- 10
-3
Unit
V
V
mA
A
A
mA
V
+15
V
- INPUT
4000
V
- CURRENT SENSE
2000
V
- OUTPUT
5000
V
- VCC
Maximum Switching Energy
5000
V
100
mJ
74
Internally Limited
- 40 to 150
- 55 to 150
W
°C
°C
°C
Current Sense Maximum Voltage
Electrostatic Discharge (Human Body Model: R=1.5Ω; C=100pF)
VESD
EMAX
Ptot
Tj
Tc
Tstg
(L=1.8mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=9A)
Power Dissipation at TC=25°C
Junction Operating Temperature
Case Operating Temperature
Storage Temperature
CONNECTION DIAGRAM (TOP VIEW)
OUTPUT 2
OUTPUT 2
N.C.
OUTPUT 1
OUTPUT 1
5
4
3
6
7
GROUND
INPUT2
INPUT1
C.SENSE1
C.SENSE2
8
9
2
10
1
11
VCC
CURRENT AND VOLTAGE CONVENTIONS
IS
VCC
IIN1
INPUT1
VIN1
OUTPUT1
VIN2
IOUT2
INPUT2
VOUT1
ISENSE1
CURRENT SENSE 1
IIN2
OUTPUT2
CURRENT SENSE 2
GROUND
IGND
2/17
VCC
IOUT1
VSENSE1
VOUT2
ISENSE2
VSENSE2
VND830ASP
THERMAL DATA
Symbol
Rthj-case
Parameter
Thermal Resistance Junction-case
Value
1.2
Unit
°C/W
Rthj-amb
Thermal Resistance Junction-ambient
51.2 (*)
°C/W
(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick). Horizontal mounting and no artificial air
flow
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C< Tj <150°C, unless otherwise specified)
(Per each channel)
POWER OUTPUT
Symbol
VCC
VUSD
VOV
RON
Parameter
Operating Supply Voltage
Undervoltage Shut-down
Overvoltage Shut-down
On State Resistance
Vclamp
Clamp voltage
IS
Supply Current
Test Conditions
Min
5.5
3
36
Typ
13
4
Max
36
5.5
IOUT =2A; Tj=25°C
60
Unit
V
V
V
mΩ
IOUT =2A; Tj=150°C
ICC=20 mA (see note 1)
Off State; VCC=13V; VIN=VOUT=0V
48
12
120
55
40
mΩ
V
µA
12
25
µA
7
50
0
5
3
mA
µA
µA
µA
µA
Max
Unit
41
Off State; VCC=13V; VIN=VOUT=0V;
Tj =25°C
On State; VIN=5V; VCC=13V; IOUT=0A;
IL(off1)
IL(off2)
IL(off3)
IL(off4)
Off State Output Current
Off State Output Current
Off State Output Current
Off State Output Current
RSENSE=3.9KΩ
VIN=VOUT=0V; VCC=36V; Tj=125°C
VIN=0V; VOUT=3.5V
VIN=VOUT=0V; VCC=13V; Tj =125°C
VIN=VOUT=0V; VCC=13V; Tj =25°C
0
-75
SWITCHING (VCC =13V)
Symbol
Parameter
td(on)
Turn-on Delay Time
td(off)
Turn-off Delay Time
Test Conditions
RL=6.5Ω from VIN rising edge to
VOUT=1.3V
RL=6.5Ω from VIN falling edge to
VOUT=11.7V
dVOUT/dt(on) Turn-on Voltage Slope
RL=6.5Ω from VOUT=1.3V to VOUT=10.4V
dVOUT/dt(off) Turn-off Voltage Slope
RL=6.5Ω from VOUT=11.7V to VOUT=1.3V
Min
Typ
30
µs
30
µs
See
relative
diagram
See
relative
diagram
V/µs
V/µs
LOGIC INPUT (Channels 1,2)
Symbol
VIL
IIL
VIH
IIH
VI(hyst)
VICL
Parameter
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
Input clamp voltage
Test Conditions
VIN=1.25V
Min
Typ
1
3.25
VIN=3.25V
IIN=1mA
IIN=-1mA
Max
1.25
10
0.5
6
6.8
-0.7
8
Unit
V
µA
V
µA
V
V
V
Note 1: Vclamp and VOV are correlated. Typical difference is 5V.
3/17
1
VND830ASP
ELECTRICAL CHARACTERISTICS (continued)
PROTECTIONS
Symbol
Ilim
TTSD
TR
THYST
Vdemag
VON
Parameter
Current limitation
Test Conditions
Vcc=13V
5.5V<Vcc<36V
Thermal shut-down
temperature
Thermal reset temperature
Thermal hysteresis
Turn-off output voltage
IOUT=2A; VIN=0V; L=6mH
clamp
Output voltage drop
IOUT=10mA
limitation
Min
6
Typ
9
Max
15
Unit
A
15
A
200
°C
150
175
135
7
15
°C
°C
VCC-41 VCC-48 VCC-55
V
50
mV
CURRENT SENSE (9V≤VCC≤16V) (See figure 1)
Symbol
Parameter
K0
IOUT/ISENSE
K1
IOUT/ISENSE
dK1/K1
K2
dK2/K2
K3
Current Sense Ratio Drift
IOUT/ISENSE
Current Sense Ratio Drift
IOUT/ISENSE
dK3/K3
Current Sense Ratio Drift
ISENSE
Analog Sense Leakage
Current
VSENSE
Max Analog Sense Output
Voltage
VSENSEH
Sense Voltage in
Overtemperature conditions
Test Conditions
IOUT1 or IOUT2=0.05A; VSENSE=0.5V;
other channels open; Tj= -40°C...150°C
IOUT1 or IOUT2=0.25A; VSENSE=0.5V;
other channels open; Tj= -40°C...150°C
IOUT1 or IOUT2=0.25A; VSENSE=0.5V;
other channels open; Tj= -40°C...150°C
Max
600
1300
2000
1000
1400
1900
-10
+10
1280
1500
1800
Tj=25°C...150°C
1300
1500
1780
IOUT1 or IOUT2=1.6A; VSENSE=4V; other
channels open; Tj=-40°C...150°C
-6
+6
IOUT1 or IOUT2=2.5A; VSENSE=4V; other
channels open; Tj=-40°C
1280
1500
1680
Tj=25°C...150°C
1340
1500
1600
IOUT1 or IOUT2=2.5A; VSENSE=4V; other
channels open; Tj=-40°C...150°C
VIN=0V; IOUT=0A; VSENSE=0V;
Tj=-40°C...150°C
VIN=5V; IOUT=0A; VSENSE=0V;
Tj=-40°C...150°C
VCC=5.5V; IOUT1,2=1.3A; RSENSE=10kΩ
VCC>8V, IOUT1,2=2.5A; RSENSE=10kΩ
VCC=13V; RSENSE=3.9kΩ
Note 2: current sense signal delay after positive input slope.
4/17
Typ
IOUT1 or IOUT2=1.6A; VSENSE=4V; other
channels open; Tj=-40°C
Analog Sense Output
VCC=13V; Tj>TTSD; All Channels Open
RVSENSEH Impedance in
Overtemperature Condition
Current sense delay
to 90% ISENSE (see note 2)
tDSENSE
response
Note: Sense pin doesn’t have to be left floating.
Min
Unit
%
%
-6
+6
%
0
5
µA
0
10
µA
2
V
4
V
5.5
V
400
Ω
500
µs
VND830ASP
TRUTH TABLE (per channel)
CONDITIONS
Normal operation
Overtemperature
Undervoltage
Overvoltage
Short circuit to GND
Short circuit to VCC
Negative output voltage
clamp
INPUT
OUTPUT
SENSE
L
L
H
L
H
L
0
Nominal
H
L
L
L
VSENSEH
0
H
L
L
L
0
0
H
L
L
L
0
0
H
L
(Tj<TTSD) 0
H
L
L
H
(Tj>TTSD) VSENSEH
0
H
H
< Nominal
L
L
0
0
ELECTRICAL TRANSIENT REQUIREMENTS
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
CLASS
C
E
I
II
TEST LEVELS
III
IV
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
I
C
C
C
C
C
C
TEST LEVELS RESULTS
II
III
C
C
C
C
C
C
C
C
C
C
E
E
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
IV
C
C
C
C
C
E
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
5/17
VND830ASP
Figure 1: IOUT/ISENSE versus IOUT
Iout/Isense
2250
2000
m ax Tj= -40ºC
1750
m ax Tj=25...150ºC
1500
typical value
m in Tj=25...150ºC
1250
m in Tj= -40ºC
1000
750
500
0
0.5
1
1.5
2
2.5
3
Iout (A)
Figure 2: Switching Characteristics (Resistive load RL=6.5Ω)
VOUT
90%
80%
dVOUT /dt(off)
dVOUT /dt(on)
tr
10%
tf
t
ISENSE
90%
INPUT
t
tDSENSE
td(on)
td(off)
t
6/17
VND830ASP
Figure 3: Waveforms
NORMAL OPERATION
INPUTn
LOAD CURRENTn
SENSEn
UNDERVOLTAGE
VCC
VUSDhyst
VUSD
INPUTn
LOAD CURRENTn
SENSEn
OVERVOLTAGE
VOV
VCC
VCC < VOV
VCC > VOV
INPUTn
LOAD CURRENTn
SENSEn
SHORT TO GROUND
INPUTn
LOAD CURRENTn
LOAD VOLTAGEn
SENSEn
SHORT TO VCC
INPUTn
LOAD VOLTAGEn
LOAD CURRENTn
SENSEn
<Nominal
<Nominal
OVERTEMPERATURE
Tj
TTSD
TR
INPUTn
LOAD CURRENTn
SENSEn
ISENSE=
VSENSEH
RSENSE
7/17
VND830ASP
APPLICATION SCHEMATIC
+5V
Rprot
INPUT1
VCC
Dld
µC
Rprot
CURRENT SENSE1
Rprot
INPUT2
Rprot
CURRENT SENSE2
OUTPUT1
GND
RSENSE1
RSENSE2
GND PROTECTION
REVERSE BATTERY
NETWORK
VGND
AGAINST
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / IS(on)max.
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on how many devices are ON in the case of
several high side drivers sharing the same RGND.
8/17
RGND
OUTPUT2
DGND
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSDs. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input thresholds and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating. The
same applies if the device will be subject to transients on
the VCC line that are greater than the ones shown in the
ISO T/R 7637/1 table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transient are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot )
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
VND830ASP
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
9/17
VND830ASP
High Level Input Current
Off State Output Current
IL(off1) (uA)
Iih (uA)
8
5
7
4.5
Vin=3.25V
Off state
Vcc=13V
Vin=Vout=0V
6
4
5
3.5
4
3
3
2.5
2
2
1
1.5
0
1
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
50
75
100
125
150
175
100
125
150
175
100
125
150
175
Tc (ºC)
Input Clamp Voltage
Input High Level
Vicl (V)
Vih (V)
3.6
8
7.8
3.4
Iin=1mA
Vcc=13V
7.6
3.2
7.4
3
7.2
2.8
7
6.8
2.6
6.6
2.4
6.4
2.2
6.2
2
6
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
Tc (ºC)
Tc (ºC)
Input Low Level
Input Hysteresis Voltage
Vil (V)
Vhyst (V)
2.6
1.5
1.4
2.4
Vcc=13V
Vcc=13V
1.3
2.2
1.2
2
1.1
1.8
1
0.9
1.6
0.8
1.4
0.7
1.2
0.6
1
0.5
-50
-25
0
25
50
75
Tc (ºC)
10/17
100
125
150
175
-50
-25
0
25
50
75
Tc (ºC)
VND830ASP
ILIM Vs Tcase
Overvoltage Shutdown
Vov (V)
Ilim (A)
50
20
47.5
17.5
45
15
42.5
12.5
40
10
37.5
7.5
35
5
32.5
2.5
Vcc=13V
30
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
Tc (ºC)
75
100
125
150
175
100
125
150
175
Tc (ºC)
Turn-on Voltage Slope
Turn-off Voltage Slope
dVout/dt(on) (V/ms)
dVout/dt(off) (V/ms)
600
500
450
550
Vcc=13V
Rl=6.5Ohm
500
Vcc=13V
Rl=6.5Ohm
400
350
450
300
400
250
200
350
150
300
100
250
50
200
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
50
75
Tc (ºC)
On State Resistance Vs Tcase
On State Resistance Vs VCC
Ron (mOhm)
Ron (mOhm)
100
100
90
Tc=150ºC
90
Iout=5A
Vcc=8V & 36V
80
80
70
Iout=5A
70
60
60
50
40
50
30
Tc=25ºC
40
20
Tc= -40ºC
30
10
20
0
-50
-25
0
25
50
75
Tc (ºC)
100
125
150
175
5
10
15
20
25
30
35
40
Vcc (V)
11/17
VND830ASP
Maximum turn off current versus load inductance
ILMAX (A)
100
10
A
B
C
1
0.1
1
10
100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
12/17
VND830ASP
PowerSO-10™ THERMAL DATA
PowerSO-10™ PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm2).
Rthj-amb Vs PCB copper area in open box free air condition
RTHjamb
55
50
45
40
35
30
25
20
0
5
10
15
20
2
PCB Cu heatsink area (cm )
13/17
VND830ASP
PowerSO-10 Thermal Impedance Junction Ambient Single Pulse
100
Footprint
4 cm2
8 cm2
16 cm2
ZTH (°C/W)
10
1
0.1
0.0001
0.001
0.01
0.1
1
10
100
1000
Time (s)
Thermal fitting model of a double channel HSD
in PowerSO-10
Pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Thermal Parameter
Tj_1
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd1
Tj_2
C1
C2
R1
R2
Pd2
T_amb
14/17
Area/island (cm2)
R1 (°C/W)
R2 (°C/W)
R3( °C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
2
0.12
0.5
0.7
0.8
13
37
0.0006
0.0012
0.013
0.3
0.75
3
4
8
16
25
20
15
4
6
9
VND830ASP
PowerSO-10™ MECHANICAL DATA
mm.
DIM.
MIN.
A
A (*)
A1
B
B (*)
C
C (*)
D
D1
E
E2
E2 (*)
E4
E4 (*)
e
F
F (*)
H
H (*)
h
L
L (*)
α
α (*)
inch
TYP
3.35
3.4
0.00
0.40
0.37
0.35
0.23
9.40
7.40
9.30
7.20
7.30
5.90
5.90
MAX.
MIN.
3.65
3.6
0.10
0.60
0.53
0.55
0.32
9.60
7.60
9.50
7.60
7.50
6.10
6.30
0.132
0.134
0.000
0.016
0.014
0.013
0.009
0.370
0.291
0.366
0.283
0.287
0.232
0.232
1.35
1.40
14.40
14.35
0.049
0.047
0.543
0.545
1.80
1.10
8º
8º
0.047
0.031
0º
2º
TYP.
MAX.
0.144
0.142
0.004
0.024
0.021
0.022
0.0126
0.378
0.300
0.374
300
0.295
0.240
0.248
1.27
0.050
1.25
1.20
13.80
13.85
0.053
0.055
0.567
0.565
0.50
0.002
1.20
0.80
0º
2º
0.070
0.043
8º
8º
(*) Muar only POA P013P
B
0.10 A B
10
H
E
E2
E4
1
SEATING
PLANE
e
B
DETAIL "A"
h
A
C
0.25
D
= D1 =
=
=
SEATING
PLANE
A
F
A1
A1
L
DETAIL "A"
α
P095A
15/17
VND830ASP
PowerSO-10™ SUGGESTED PAD LAYOUT
TUBE SHIPMENT (no suffix)
14.6 - 14.9
CASABLANCA
B
10.8- 11
MUAR
C
6.30
C
A
A
0.67 - 0.73
10
9
1
9.5
2
3
B
0.54 - 0.6
All dimensions are in mm.
8
7
4
5
1.27
Base Q.ty Bulk Q.ty Tube length (± 0.5)
6
Casablanca
Muar
50
50
1000
1000
532
532
A
B
C (± 0.1)
10.4 16.4
4.9 17.2
0.8
0.8
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
600
600
330
1.5
13
20.2
24.4
60
30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
24
4
24
1.5
1.5
11.5
6.5
2
End
Start
Top
No components
Components
No components
cover
tape
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
16/17
1
VND830ASP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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