VN920PEP-E SINGLE CHANNEL HIGH SIDE DRIVER Table 1. General Features Figure 1. Package TYPE RDS(on) IOUT VCC VN920PEP-E 15mΩ 30 A 36 V CMOS COMPATIBLE INPUT PROPORTIONAL LOAD CURRENT SENSE ■ SHORTED LOAD PROTECTION ■ UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN ■ OVERVOLTAGE CLAMP ■ THERMAL SHUTDOWN ■ CURRENT LIMITATION ■ ■ PROTECTION AGAINST LOSS OF GROUND AND LOSS VCC ■ VERY LOW STAND-BY POWER DISSIPATION ■ REVERSE BATTERY PROTECTION (*) ■ IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE ■ PowerSSO-24™ DESCRIPTION The VN920PEP-E is a monolithic device designed in STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. The device integrates an analog current sense output which delivers a current proportional to the load current. Device automatically turns off in case of ground pin disconnection. Table 2. Order Codes Package PowerSSO-24 Tube Tape and Reel VN920PEP-E VN920PEPTR-E Note: (*) See application schematic at page 10 Rev. 5 March 2005 1/18 VN920PEP-E Figure 2. Block Diagram VCC OVERVOLTAGE DETECTION VCC CLAMP UNDERVOLTAGE DETECTION GND Power CLAMP DRIVER OUTPUT LOGIC INPUT CURRENT LIMITER VDS LIMITER IOUT CURRENT SENSE K OVERTEMPERATURE DETECTION Table 3. Absolute Maximum Ratings Symbol VCC Parameter DC Supply Voltage Value Unit 41 V - VCC Reverse DC Supply Voltage - 0.3 V - IGND DC Reverse Ground Pin Current - 200 mA Internally Limited A - 40 A +/- 10 mA -3 V +15 V - INPUT 4000 V - CURRENT SENSE 2000 V - OUTPUT 5000 V - VCC 5000 V (L=0.3mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=45A) 462 mJ Power Dissipation TC≤25°C 96 W Internally limited °C IOUT - IOUT IIN VCSENSE DC Output Current Reverse DC Output Current DC Input Current Current Sense Maximum Voltage Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF) VESD Maximum Switching Energy EMAX Ptot Tj Junction Operating Temperature Tc Case Operating Temperature - 40 to 150 °C Storage Temperature - 55 to 150 °C TSTG 2/18 VN920PEP-E Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins VCC GND NC NC INPUT NC CURRENT SENSE NC NC NC NC VCC 1 2 3 4 5 6 24 23 22 21 20 19 7 8 9 10 11 12 18 17 16 15 14 13 OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT TAB = VCC Connection / Pin Current Sense Floating Through 1KΩ To Ground resistor N.C. X Output X X Input X Through 10KΩ resistor Figure 4. Current and Voltage Conventions IS VCC VCC VF IOUT OUTPUT IIN VOUT INPUT VIN ISENSE CURRENT SENSE VSENSE GND IGND Table 4. Thermal Data Symbol Rthj-case Parameter Thermal Resistance Junction-case Rthj-amb Thermal Resistance Junction-ambient Max Max Value 1.3 55 (1) Unit °C/W 40 (2) °C/W Note: (1) When mounted on a standard single-sided FR-4 board with 0.5cm 2 of Cu (at least 35µm thick). Note: (2) When mounted on a standard single-sided FR-4 board with 8cm 2 of Cu (at least 35µm thick). 3/18 VN920PEP-E ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified) Table 5. Power Symbol Parameter VCC Min. Typ. Max. Unit Operating Supply Voltage 5.5 13 36 V VUSD Undervoltage Shut-down 3 4 5.5 V VOV Overvoltage Shut-down 36 RON Vclamp IS On State Resistance Clamp Voltage Supply Current Test Conditions V IOUT=10A; Tj =25°C 15 mΩ IOUT=10A 30 mΩ IOUT=3A; VCC=6V 50 mΩ 48 55 V 10 25 µA 10 20 µA 5 mA 50 µA 5 µA 3 µA Max. Unit ICC=20mA (See note 1) 41 Off State; VCC=13V; VIN=VOUT=0V Off State; VCC=13V; Tj=25°C; VIN=VOUT=0V On State; VCC=13V; VIN=5V; IOUT=0; RSENSE=3.9KΩ IL(off1) Off State Output Current VIN=VOUT=VSENSE=0V IL(off3) Off State Output Current VIN=VOUT=VSENSE=0V; VCC=13V;Tj=125°C IL(off4) Off State Output Current 0 VIN=VOUT=VSENSE=0V; VCC=13V; Tj=25°C Note: 1. Vclamp and VOV are correlated. Typical difference is 5V. Table 6. Switching (VCC =13V) Symbol Parameter Test Conditions Min. Typ. td(on) Turn-on Delay Time RL=1.3Ω (see figure 2) 50 µs td(off) Turn-off Delay Time RL=1.3Ω (see figure 2) 50 µs dVOUT/ dt(on) Turn-on Voltage Slope RL=1.3Ω (see figure 2) See relative diagram V/µs dVOUT/ dt(off) Turn-off Voltage Slope RL=1.3Ω (see figure 2) See relative diagram V/µs Table 7. Logic Input Symbol Parameter VIL Input Low Level IIL Low Level Input Current VIH Input High Level IIH High Level Input Current VI(hyst) Input Hysteresis Voltage VICL 4/18 Input Clamp Voltage Test Conditions VIN=1.25V Min. Typ. Max. Unit 1.25 V 1 µA 3.25 V VIN=3.25V 10 0.5 IIN=1mA IIN=-1mA 6 µA V 6.8 -0.7 8 V V VN920PEP-E ELECTRICAL CHARACTERISTICS (continued) Table 8. Current Sense (9V≤VCC≤16V) (See figure 5) Symbol K1 dK1/K1 K2 dK2/K2 K3 dK3/K3 Parameter IOUT/ISENSE Current Sense Ratio Drift IOUT/ISENSE Current Sense Ratio Drift IOUT/ISENSE Current Sense Ratio Drift Test Conditions IOUT=1A; VSENSE=0.5V; Tj= -40°C...150°C IOUT=1A; VSENSE=0.5V; Tj= -40°C...+150°C Min Typ Max 3300 4400 6000 -10 +10 IOUT=10A; VSENSE=4V; Tj=-40°C 4200 4900 6000 Tj=25°C...150°C 4400 4900 5750 IOUT=10A; VSENSE=4V; Tj=-40°C...+150°C -8 +8 IOUT=30A; VSENSE=4V; Tj=-40°C 4200 4900 5500 Tj=25°C...150°C 4400 4900 5250 IOUT=30A; VSENSE=4V; Tj=-40°C...+150°C VCC=6...16V; IOUT=0A;VSENSE=0V; Unit % % -6 +6 % 0 10 µA ISENSEO Analog Sense Leakage Current Tj=-40°C...+150°C VSENSE Max Analog Sense Output Voltage VCC=5.5V; IOUT=5A; RSENSE=10KΩ 2 V VCC>8V; IOUT=10A; RSENSE=10KΩ 4 V Sense Voltage in Overtemperature conditions VCC=13V; RSENSE=3.9KΩ 5.5 V RVSENSEH Analog sense output impedance in overtemperature condition VCC=13V; Tj>TTSD; Output Open 400 Ω tDSENSE Current sense delay response to 90% ISENSE (see note 2) VSENSEH 500 µs Note: 2. Current sense signal delay after positive input slope Table 9. Protections (See note 3) Symbol Parameter TTSD Min. Typ. Max. Unit Shut-down Temperature 150 175 200 °C TR Reset Temperature 135 Thyst Thermal Hysteresis 7 15 30 45 Ilim Vdemag VON DC Short Circuit Current Turn-off Output Clamp Voltage Output Voltage Drop Limitation Test Conditions VCC=13V °C 5V<VCC<36V IOUT=2A; VIN=0V; L=6mH IOUT=1A; Tj=-40°C....+150°C VCC-41 VCC-48 50 °C 75 A 75 A VCC-55 V mV Note: 3. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. 5/18 VN920PEP-E ELECTRICAL CHARACTERISTICS (continued) Table 10. VCC - Output Diode Symbol VF Parameter Forward on Voltage Test Conditions -IOUT=5.3A; Tj=150°C Min Typ Max 0.6 Figure 5. IOUT/ISENSE versus IOUT IOUT/ISENSE 6500 6000 max.Tj=-40°C 5500 max.Tj=25...150°C 5000 typical value min.Tj=25...150°C 4500 min.Tj=-40°C 4000 3500 3000 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 IOUT (A) Figure 6. Switching Characteristics (Resistive load RL=1.3Ω) VOUT 90% 80% dVOUT/dt(off) dVOUT/dt(on) tr 10% tf t ISENSE 90% INPUT t tDSENSE td(on) td(off) t 6/18 30 32 Unit V VN920PEP-E Table 11. Truth Table CONDITIONS INPUT Normal operation Overtemperature Undervoltage Overvoltage Short circuit to GND Short circuit to VCC Negative output voltage clamp OUTPUT SENSE 0 Nominal L L H H L L 0 H L VSENSEH L L 0 H L 0 L L 0 H L 0 L L 0 H L (Tj<TTSD) 0 H L (Tj>TTSD) VSENSEH L H 0 H H < Nominal L L 0 Figure 7. Switching time Waveforms VOUTn 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% t VINn td(on) td(off) t 7/18 VN920PEP-E Table 12. Electrical Transient Requirements on VCC Pin ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E 8/18 I II TEST LEVELS III IV -25 V +25 V -25 V +25 V -4 V +26.5 V -50 V +50 V -50 V +50 V -5 V +46.5 V -75 V +75 V -100 V +75 V -6 V +66.5 V -100 V +100 V -150 V +100 V -7 V +86.5 V I C C C C C C TEST LEVELS RESULTS II III C C C C C C C C C C E E Delays and Impedance 2 ms 10 Ω 0.2 ms 10 Ω 0.1 µs 50 Ω 0.1 µs 50 Ω 100 ms, 0.01 Ω 400 ms, 2 Ω IV C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. VN920PEP-E Figure 8. Waveforms NORMAL OPERATION INPUT LOAD CURRENT SENSE UNDERVOLTAGE VCC VUSDhyst VUSD INPUT LOAD CURRENT SENSE OVERVOLTAGE VOV VCC VCC > VUSD VOVhyst INPUT LOAD CURRENT SENSE SHORT TO GROUND INPUT LOAD CURRENT LOAD VOLTAGE SENSE SHORT TO VCC INPUT LOAD VOLTAGE LOAD CURRENT SENSE <Nominal <Nominal OVERTEMPERATURE Tj TTSD TR INPUT LOAD CURRENT SENSE ISENSE= VSENSEH RSENSE 9/18 VN920PEP-E Figure 9. Application Schematic +5V VCC Rprot INPUT Dld µC Rprot OUTPUT CURRENT SENSE RSENSE GND VGND GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND ≤ 600mV / (IS(on)max). 2) RGND ≥ (−VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device’s datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the 10/18 RGND DGND input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT line is also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT pin is to leave it unconnected, while unused SENSE pin has to be connected to Ground pin. LOAD DUMP PROTECTION Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table. µC I/Os PROTECTION: If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the µC I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os. -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V 5kΩ ≤ Rprot ≤ 65kΩ. Recommended Rprot value is 10kΩ. VN920PEP-E Figure 10. Off State Output Current Figure 11. High Level Input Current Iih (uA) Il (off1) (µA) 5 4 4.5 3.5 Vin=3.25V 4 3 3.5 2.5 3 2.5 2 2 1.5 1.5 1 1 0.5 0.5 0 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 100 125 150 175 150 175 Tc (°C) Tc (°C) Figure 12. Input Clamp Voltage Figure 14. Input High Level Vicl (V) Vih (V) 10 5 9.5 4.5 Iin=1mA 9 4 8.5 3.5 8 7.5 3 7 2.5 6.5 2 6 1.5 5.5 1 5 0.5 4.5 4 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 50 75 Tc (°C) Figure 13. Input Low Level Figure 15. Input Hysteresis Voltage Vil (V) Vhyst (V) 2.6 16 2.4 14 2.2 12 2 10 1.8 8 1.6 6 1.4 4 1.2 2 1 0 -50 -25 0 25 50 75 Tc (°C) 100 125 150 175 -50 -25 0 25 50 75 100 125 Tc (°C) 11/18 VN920PEP-E Figure 16. Overvoltage Shutdown Figure 19. ILIM Vs Tcase Vov (V) Ilim (A) 60 100 57 90 54 80 Vcc=13V 51 70 48 60 45 50 42 40 39 30 36 20 33 10 0 30 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 150 175 Tc (°C) Tc (°C) Figure 17. Turn-on Voltage Slope Figure 20. Turn-off Voltage Slope dVout/dt (on)(V/ms) dVout/dt (off)(V/ms) 1.6 1 0.9 1.4 Vcc=13V Rl=1.3Ohm 0.8 Vcc=13V Rl=1.3Ohm 1.2 0.7 1 0.6 0.8 0.5 0.4 0.6 0.3 0.4 0.2 0.2 0.1 0 0 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Ron (mOhm) 60 54 Vcc=13V Iout=10A 42 36 30 24 18 12 6 0 -50 -25 0 25 50 75 Tc (°C) 12/18 -25 0 25 50 75 Tc (°C) Figure 18. On State Resistance Vs Tcase 48 -50 100 125 150 175 100 125 VN920PEP-E PowerSSO-24 Thermal Data Figure 21. PowerSSO-24 PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 78mm x 78mm, PCB thickness=2mm, Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm2). Figure 22. Rthj-amb Vs PCB copper area in open box free air condition RTHj_amb(°C/W) 60 55 50 45 40 35 30 0 1 2 3 4 5 6 7 8 9 PCB Cu heatsink area (cm^2) 13/18 VN920PEP-E Figure 23. Maximum turn off current versus load inductance ILMAX (A) 100 A B C 10 1 0.01 0.1 1 10 L(mH) A = Single Pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive Pulse at TJstart=125ºC Conditions: VCC=13.5V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 14/18 VN920PEP-E Figure 24. PowerSSO-24 Thermal Impedance Junction Ambient Single Pulse ZTH (°C/W) 100 Footprint 8 cm2 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 10 100 1000 Time (s) Figure 25. Thermal Fitting Model of a Single Channel HSD in PowerSSO-24 Pulse Calculation Formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Table 13. Thermal Parameter Area/island (cm2) R1(°C/W) R2(°C/W) R3( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1(W.s/°C) C2(W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) Footprint 0.012 0.05 0.65 4 13.5 37 0.0004 0.005 0.022 0.08 0.7 3 8 22 5 15/18 VN920PEP-E PACKAGE MECHANICAL Table 14. PowerSSO-24™ Mechanical Data Symbol millimeters Min Max A 2.15 2.47 A2 2.15 2.40 a1 0 0.075 b 0.33 0.51 c 0.23 0.32 D 10.10 10.50 E 7.4 7.6 e 0.8 e3 8.8 G 0.1 G1 0.06 H 10.1 h L 10.5 0.4 0.55 N 0.85 10deg X 4.1 4.7 Y 6.5 7.1 Figure 26. PowerSSO-24™ Package Dimensions 16/18 Typ VN920PEP-E REVISION HISTORY Table 15. Revision History Date Revision Description of Changes Oct. 2004 1 - First Issue. Nov. 2004 2 - Mechanical data updating. - PowerSSO-24 Thermal Charact. insertion Dec. 2004 3 - PC Board copper area correction. Dec. 2004 4 - IL(off2) removal. Mar. 2005 5 - Maximum Switching Energy value insertion. - Maximum turn off current versus load inductance curve insertion. - Minor changes. 17/18 VN920PEP-E Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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