ETC PI74ALVC16334A

PI74ALVC16334
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16-Bit Universal Bus Driver
with 3-State Outputs
Product Features
Product Description
• PI74ALVC16334 is designed for low voltage operation,
VCC = 2.3V to 3.6V
• Supports PC100 Registered DIMM
• Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
• Industrial operation at –40°C to +85°C
• Packages available:
– 48-pin 240 mil wide plastic TSSOP (A)
– 48-pin 173 mil wide plastic TVSOP (K)
– 48-pin 300 mil wide plastic SSOP (V)
Pericom Semiconductor’s PI74ALVC series of logic circuits
are produced in the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The 16-bit PI74ALVC16334 universal bus driver is designed
for 2.3V to 3.6V Vcc operation.
Data flow from A to Y is controlled by Output Enable (OE).
The device operates in the transparent mode when LE is LOW.
When LE is HIGH, the A data is latched if CLK is held at a high or
low logic level. If LE is HIGH, the A-data is stored in the latch/flipflop on the low-to-high transition of CLK. When OE is HIGH, the
outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down,
OE should be tied to Vcc through a pullup resistor; the minimum
value of the resistor is determined by the current-sinking capability
of the driver.
Logic Block Diagram
1
PS8310
08/03/98
PI74ALVC16334
16-Bit Universal Bus Driver with 3-State Outputs
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Truth Table(1)†
Product Pin Description
Pin Name
OE
LE
CLK
A
Y
GND
VCC
Description
Output Enable Input (Active LOW)
Latch Enable (Active LOW)
Clock Input
Data Input
Data Output
Ground
Power
Inputs
Product Pin Configuration
OE
Y1
Y2
GND
1
48
2
47
3
46
4
45
Y3
Y4
VCC
5
44
6
43
7
42
Y5
Y6
8
41
9
40
GND
Y7
Y8
10
39
Y9
36
A9
Y10
GND
14
35
15
34
A10
GND
Y11
Y12
VCC
Y13
Y14
16
33
17
32
18
31
19
30
20
29
GND
Y15
Y16
NC
21
28
22
27
23
26
24
25
38
CLK
A
H
X
X
X
Z
L
L
X
L
L
L
L
X
H
H
L
H
↑
L
L
L
H
↑
H
H
L
H
L or H
X
Yo(2)
A5
A6
13
48-Pin
A,K,V
LE
A3
A4
VCC
37
12
OE
Note:
1 H = High Signal Level
L = Low Signal Level
Z = High Impedance
↑ = Transition LOW-to-HIGH
X = Irrelevant
2. Output level before the indicated steady-state input
conditions were established.
CLK
A1
A2
GND
GND
A7
A8
11
Outputs
Y
A11
A12
VCC
A13
A14
GND
A15
A16
LE
2
PS8310
08/03/98
PI74ALVC16334
16-Bit Universal Bus Driver with 3-State Outputs
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................................. –65°C to +150°C
Ambient Temperature with Power Applied .................. –40°C to +85°C
Input Voltage Range, VIN ....................................... –0.5V to VCC +0.5V
Output Voltage Range, VOUT ................................. –0.5V to VCC +0.5V
DC Input Voltage ........................................................... –0.5V to +5.0V
DC Output Current .................................................................... 100mA
Power Dissipation ......................................................................... 1.0W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Recommended Operating Conditions(1)
Parame te rs
De s cription
VCC
Supply Voltage
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VIN
Input Voltage
0
VCC
V
VOUT
Output Voltage
0
VCC
V
IOH
IOL
TA
High- level Output Current
Low- level Output Current
Te s t Conditions
M in.
Typ.
2.3
VCC = 2.3V to 2.7V
1.7
VCC = 2.7V to 3.6V
2.0
M ax.
Units
3.6
V
V
VCC = 2.3V to 2.7V
0.7
VCC = 2.7V to 3.6V
0.8
VCC = 2.3V
- 12
VCC = 2.7V
- 12
VCC = 3.0V
- 24
VCC = 2.3V
12
VCC = 2.7V
12
VCC = 3.0V
24
Operating Free- Air Temperature
- 40
85
V
mA
mA
°C
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
3
PS8310
08/03/98
PI74ALVC16334
16-Bit Universal Bus Driver with 3-State Outputs
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DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 3.3V ± 10%)
Parame te rs
VOH
VOL
II
IOZ(3)
ICC
∆ICC
CI Control Inputs
Data Input
CO O utputs
Te s t Conditions
IOH = - 100 µA
VIH = 1.7V
IOH = - 6 MA
VIH = 1.7V
IOH = - 12 mA
VIH = 2.0V
VIH = 2.0V
IOH = - 24 MA
VIH = 2.0V
IOL = 100 µA
IOL = 6 mA
VIL = 0.7V
VIL = 0.7V
IOL = 12 MA
VIL = 0.8V
VIL = 0.8V
IOL = 24 mA
VI = VCC or GND
VO = VCC or GND
VI = VCC or GND
IO = 0
O ne input at VCC - 0.6V, O ther inputs at VCC or GND
VI = VCC or GND
VO = VCC or GND
VO = VCC or GND
VCC(1)
Min. to Max.
2.3V
2.3V
2.7V
3.0V
3.0V
Min. to Max.
2.3V
2.3V
2.7V
3.0V
3.6V
3.6V
3.6V
3V to 3.6V
3.3V
3.3V
3.3V
Typ.(2)
M in.
VCC - 0.2
2.0
1.7
2.2
2.4
2.0
M ax. Units
V
0.2
0.4
0.7
0.4
0.55
±5
±5
40
750
V
µA
5
5.5
7.5
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading.
3. For I/O ports, the IOZ includes the input leakage current.
Timing Requirements over Operating Range
Parame te rs
De s cription
fCLOCK
tW Pulse Duration
tSU Setup time
tH Hold time
∆t/∆v(1)
VCC = 2.5 V ± 0.2V
VCC = 2.7V
VCC = 3.3V ± 0.3V
M in.
M ax.
M in.
M ax.
M in.
M ax.
Clock frequency
0
150
0
150
0
150
LE LOW
3.3
3.3
3.3
CLK high or low
3.3
3.3
3.3
Data before CLK↑
1.4
1.7
1.5
Data before LE↑, CLK High
1.2
1.6
1.3
Data before LE↑, CLK Low
1.4
1.5
1.2
Data after CLK↑
0.9
0.9
0.9
Data after LE↑, CLK High or Low
1.1
1.1
1.1
Input Transition Rise or Fall
0
10
0
10
0
Units
MHz
ns
ns
ns
10
ns/V
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
4
PS8310
08/03/98
PI74ALVC16334
16-Bit Universal Bus Driver with 3-State Outputs
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Switching Characteristics Over Operating Range(1)
Parame te rs
From
(INPUT)
VCC = 2.7V
VCC = 2.5V ± 0.2V
To
(OUTPUT)
M in.(2)
M ax. M in.(2) M ax.
fMAX
150
150
VCC = 3.3 V ± 0.3V
M in.(2)
Units
M ax.
150
MHz
tPD
A
Y
1.0
3.7
3.6
1.1
3.3
ns
tPD
LE
Y
1.0
4.8
5.0
1.3
4.4
ns
tPD
CLK
Y
1.0
4.4
4.5
1.0
4.1
ns
tEN
OE
Y
1.0
5.4
5.4
1.1
4.6
ns
tDIS
OE
Y
1.0
4.1
4.5
1.7
4.4
ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
Operating Characteristics, TA = 25°C
Parame te rs
CPD Power Dissipation O utputs Enabled
Capacitance
O utputs Disabled
Te s t
Conditions
VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V
CL = 50pF,
F = 10 MHz
Typical
Typical
31
36
7
11
Units
pF
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
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PS8310
08/03/98