Philips Semiconductors Product specification N-channel TrenchMOSTM transistor & schottky diode FEATURES SYMBOL • MOSFET + Schottky diode in the same package • Low threshold voltage • Extremely fast switching • Logic level compatible • Surface mount package PHN103S QUICK REFERENCE DATA VDS = 25 V k d ID = 5.8 A RDS(ON) ≤ 35 mΩ (VGS = 10 V) g RDS(ON) ≤ 60 mΩ (VGS = 4.5 V) a s VF (schottky) < 0.55 V GENERAL DESCRIPTION N-channel enhancement mode field-effect transistor and schottky diode in the same plastic envelope. The MOSFET uses ’trench’ technology to achieve low on-state resistance. Applications:• d.c. to d.c. converters • motor drivers • relay and actuator drivers PINNING PIN SOT96-1 DESCRIPTION 1,2 anode (a) 3 source (s) 4 gate (g) 5,6 drain (d) 7,8 cathode (k) pin 1 index 8 7 6 5 1 2 3 4 The PHN103S is supplied in the SOT96-1 (SO8) surface mounting package. LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS VDS Tj = 25 ˚C to 150˚C VDS VDGR VGS ID Repetitive peak drain-source voltage Continuous drain-source voltage Drain-gate voltage Gate-source voltage Drain current1 IDM Ptot Drain current (pulse peak value) Total power dissipation Tstg, Tj Storage & operating temperature RGS = 20 kΩ Ta = 25 ˚C Ta = 70 ˚C Ta = 25 ˚C Ta = 25 ˚C Ta = 70 ˚C MIN. MAX. UNIT - 25 V - 65 25 25 ± 20 5.8 4.6 23 2 1.3 150 V V V A A A W W ˚C 1 Surface mounted on FR4 board, t ≤ 10 sec September 1999 1 Rev 1.000 Philips Semiconductors Product specification N-channel TrenchMOSTM transistor & schottky diode PHN103S THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS Rth j-a Surface mounted, FR4 board, t ≤ 10 sec Rth j-a MOSFET or schottky diode thermal resistance junction to ambient MOSFET or schottky diode thermal resistance junction to ambient Surface mounted, FR4 board TYP. MAX. UNIT - 62.5 K/W 150 - K/W ELECTRICAL CHARACTERISTICS Tj= 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS V(BR)DSS VGS = 0 V; ID = 10 µA; VGS(TO) Drain-source breakdown voltage Gate threshold voltage MIN. Tj = -55˚C VDS = VGS; ID = 1 mA Tj = 150˚C Tj = -55˚C RDS(ON) IGSS IDSS Drain-source on-state resistance VGS = 10 V; ID = 5 A VGS = 4.5 V; ID = 2.5 A VGS = 10 V; ID = 5 A; Tj = 150˚C Gate source leakage current VGS = ±20 V; VDS = 0 V Zero gate voltage drain VDS = 25 V; VGS = 0 V; current Tj = 150˚C TYP. MAX. UNIT 25 22 1 0.4 - 2.1 30 50 50 10 0.05 1 3.2 35 60 60 100 10 100 V V V V V mΩ mΩ mΩ nA µA µA Qg(tot) Qgs Qgd Total gate charge Gate-source charge Gate-drain (Miller) charge ID = 6 A; VDD = 15 V; VGS = 10 V - 17 2.9 4.1 - nC nC nC td on tr td off tf Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time VDD = 20 V; RD = 18 Ω; VGS = 10 V; RG = 6 Ω Resistive load - 8 11 31 17 - ns ns ns ns Ld Ls Internal drain inductance Internal source inductance Measured from drain lead to centre of die Measured from source lead to source bond pad - 2.5 5 - nH nH Ciss Coss Crss Input capacitance Output capacitance Feedback capacitance VGS = 0 V; VDS = 20 V; f = 1 MHz - 650 320 130 - pF pF pF SOURCE-DRAIN DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25˚C, per MOSFET unless otherwise specified SYMBOL PARAMETER CONDITIONS IS Ta = 25 ˚C - - 2 A ISM VSD Continuous source diode current Pulsed source diode current Diode forward voltage IF = 1.25 A; VGS = 0 V - 0.75 23 1 A V trr Qrr Reverse recovery time Reverse recovery charge IF = 1.25 A; -dIF/dt = 100 A/µs; VGS = 0 V; VR = 25 V - 35 24 - ns nC September 1999 MIN. 2 TYP. MAX. UNIT Rev 1.000 Philips Semiconductors Product specification N-channel TrenchMOSTM transistor & schottky diode PHN103S SCHOTTKY DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS IF IFRM IR Continuous forward current Ta = 25 ˚C Repetitive peak forward current Reverse leakage current VR = 25 V VF Forward voltage Cd Junction capacitance Tj = 100˚C IF = 2.5 A; VGS = 0 V IF = 2.5 A; VGS = 0 V, Tj = 100 ˚C VR = 5 V, f = 1MHz, Tj = 25˚C to 150˚C MIN. TYP. MAX. UNIT - 0.2 5 0.4 0.3 120 3 23 1.0 10 0.6 0.55 - A A mA mA V V pF Normalised Power Derating, Ptot (%) 100 100 90 Peak Pulsed Drain Current, IDM (A) tp = 10 us RDS(on) = VDS/ ID 80 70 100 us 10 1 ms 60 10 ms 50 1 100 ms 40 30 0.1 20 10 s 10 0.01 0 0 20 40 60 80 100 120 140 160 0.1 1 10 Drain-Source Voltage, VDS (V) Ambient temperature, Ta (C) Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Ta) 100 Fig.3. Safe operating area. Ta = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp Normalised Current Derating, ID (%) 120 100 Zth j-a (K/W) D = 0.5 100 10 80 0.2 0.1 0.05 60 0.02 1 P D single pulse 40 tp D = tp/T 0.1 20 T 0.01 1E-06 0 0 20 40 60 80 100 120 140 160 Ambient temperature, Ta (C) 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01 Pulse width, tp (s) Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Ta); conditions: VGS ≥ 4.5 V September 1999 1E-05 Fig.4. Transient thermal impedance; MOSFET. Zth j-a = f(t); parameter D = tp/T 3 Rev 1.000 Philips Semiconductors Product specification N-channel TrenchMOSTM transistor & schottky diode PHN103S Drain current, ID (A) Transient Thermal Impedance, Zth j-a (K/W) 10 SCHOTTKY 100 VDS > ID X RDS(ON) 9 8 7 10 6 Single pulse 5 1 4 P D tp 150 C Tj = 25 C 3 2 0.1 1 t 0.01 1E-06 0 0 1E-05 1E-04 1E-03 1E-02 1E-01 pulse width, tp (s) 1E+00 0.5 2.5 3 3.5 4 4.5 5 Transconductance, gfs (S) 10 VDS > ID X RDS(ON) 9 VGS = 3.4 V 2 Fig.8. Typical transfer characteristics. ID = f(VGS) Drain Current, ID (A) 4.5 V 1.5 Gate-source voltage, VGS (V) Fig.5. Transient thermal impedance; Schottky Diode. Zth j-a = f(t) 5 1 1E+01 Tj = 25 C Tj = 25 C 8 4 150 C 7 3.2 V 10V 6 3 5 4 3V 2 3 2.8 V 2 2.6 V 1 1 2.4 V 0 0 0 0 1 2 3 4 Drain-Source Voltage, VDS (V) 2.8V 3V 1.5 2 2.5 3 3.5 4 4.5 5 Fig.9. Typical transconductance, Tj = 25 ˚C. gfs = f(ID) Drain-Source On Resistance, RDS(on) (Ohms) 0.45 1 Drain current, ID (A) Fig.6. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS 0.5 0.5 5 2 a SOT223 30V Trench Normalised RDS(ON) = f(Tj) VGS = 3.4 V 3.2V 0.4 1.5 0.35 Tj = 25 C 0.3 1 0.25 0.2 0.15 0.5 0.1 4.5V 10V 0.05 0 0 1 2 3 Drain Current, ID (A) 4 0 -50 5 Fig.7. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS September 1999 0 50 Tj / C 100 150 Fig.10. Normalised drain-source on-state resistance. RDS(ON)/RDS(ON)25 ˚C = f(Tj) 4 Rev 1.000 Philips Semiconductors Product specification N-channel TrenchMOSTM transistor & schottky diode 5 VGS(TO) / V PHN103S PHN1013 Gate-source voltage, VGS (V) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 4 3 typ. 2 min. 1 0 -100 -50 0 50 Tj / C 100 150 0 200 Fig.11. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS 100mA VDD = 15 V 5 10 15 Gate charge, QG (nC) 20 25 Fig.14. Typical turn-on gate-charge characteristics. VGS = f(QG) Sub-Threshold Conduction Drain current, ID (A) ID = 6 A Tj = 25 C Source-Drain Diode Current, IF (A) 10 VGS = 0 V 9 10mA 8 7 min 1mA typ 6 5 4 100uA 150 C 3 Tj = 25 C 2 10uA 1 VDS = VGS Tj = 25 C 1uA 0 0 0 1 2 3 Gate-source voltage, VGS (V) 4 0.1 5 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Drain-Source Voltage, VSDS (V) Fig.12. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C Fig.15. MOSFET source-drain diode characteristics IF = f(VSDS); conditions: VGS = 0 V; parameter Tj Schottky Forward Current,IF(A) 5 Capacitances, Ciss, Coss, Crss (pF) 10000 4.5 4 3.5 150 C 3 Tj = 25 C 2.5 1000 2 Ciss 1.5 1 Coss 0.5 Crss 0 100 0 0.1 1 10 Drain-Source Voltage, VDS (V) 100 0.2 0.3 0.4 0.5 0.6 0.7 0.8 Schottky Forward Voltage,VF (V) Fig.13. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz September 1999 0.1 Fig.16. Schottky diode characteristics IF = f(VF); parameter Tj 5 Rev 1.000 Philips Semiconductors Product specification N-channel TrenchMOSTM transistor & schottky diode Capacitance, Cj (pF) PHN103S SCHOTTKY 1000 100 10 0.1 1 10 Reverse voltage, VR (V) 100 Fig.17. Schottky diode typical capacitance, Cj C = f(VR); f = 1 MHz September 1999 6 Rev 1.000 Philips Semiconductors Product specification N-channel TrenchMOSTM transistor & schottky diode PHN103S MECHANICAL DATA SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 D E A X c y HE v M A Z 5 8 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) A max. A1 A2 mm inches UNIT A3 bp c D (1) E (2) 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.014 0.0075 0.20 0.19 e HE 4.0 3.8 1.27 6.2 5.8 0.16 0.15 0.050 L Lp Q 1.05 1.0 0.4 0.7 0.6 0.244 0.039 0.028 0.041 0.228 0.016 0.024 v w y Z (1) 0.25 0.25 0.1 0.7 0.3 0.01 0.01 0.004 0.028 0.012 θ o 8 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT96-1 076E03S MS-012AA EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 97-05-22 Fig.18. SOT96 surface mounting package. Notes 1. This product is supplied in anti-static packaging. The gate-source input must be protected against static discharge during transport or handling. 2. Refer to Integrated Circuit Packages, Data Handbook IC26. 3. Epoxy meets UL94 V0 at 1/8". September 1999 7 Rev 1.000 Philips Semiconductors Product specification N-channel TrenchMOSTM transistor & schottky diode PHN103S DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1999 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. September 1999 8 Rev 1.000