ETC BB401M

BB401M
Build in Biasing Circuit MOS FET IC
VHF RF Amplifier
ADE-208-715A (Z)
2nd. Edition
Dec. 1, 1998
Features
• Build in Biasing Circuit; To reduce using parts cost & PC board space.
• Low noise characteristics;
(NF = 1.3 dB typ. at f = 200 MHz)
• Withstanding to ESD;
Build in ESD absorbing diode. Withstand up to 200V at C=200pF, Rs=0 conditions.
• Provide mini mold packages; MPAK-4R(SOT-143 var.)
Outline
MPAK-4R
3
4
2
1
1. Source
2. Drain
3. Gate2
4. Gate1
Notes: 1. Marking is “AX–”.
2. BB401M is individual type number of HITACHI BBFET.
BB401M
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Ratings
Unit
Drain to source voltage
VDS
6
V
Gate1 to source voltage
VG1S
+6
–0
V
Gate 2 to source voltage
VG2S
±6
V
Drain current
ID
25
mA
Channel power dissipation
Pch
150
mW
Channel temperature
Tch
150
°C
Storage temperature
Tstg
–55 to +150
°C
Electrical Characteristics (Ta = 25°C)
Item
Min
Typ
Max
Unit
Test Conditions
Drain to source breakdown voltage V(BR)DSS
6
—
—
V
I D = 200µA, VG1S = VG2S = 0
Gate1 to source breakdown voltage V(BR)G1SS
+6
—
—
V
I G1 = +10µA, VG2S = VDS = 0
Gate2 to source breakdown voltage V(BR)G2SS
±6
—
—
V
I G2 = ±10µA, VG1S = VDS = 0
Gate1 to cutoff current
I G1SS
—
—
+100
nA
VG1S = +5V, V G2S = VDS = 0
Gate2 to cutoff current
I G2SS
—
—
±100
nA
VG2S = ±5V, VG1S = VDS = 0
Gate1 to source cutoff voltage
VG1S(off)
0.4
0.7
1.0
V
VDS = 5V, VG2S = 4V, ID = 100µA
Gate2 to source cutoff voltage
VG2S(off)
0.4
0.7
1.0
V
VDS = 5V, VG1S = 5V, ID = 100µA
Drain current
I D(op)
10
15
20
mA
VDS = 5V, VG1 = 5V
VG2S = 4V, RG = 100kΩ
Forward transfer admittance
|yfs|
15
20
—
mS
VDS = 5V, VG1 = 5V, VG2S =4V
RG = 100kΩ, f = 1kHz
Input capacitance
c iss
2.2
3.0
3.9
pF
VDS = 5V, VG1 = 5V
Output capacitance
c oss
0.9
1.2
1.6
pF
VG2S =4V, RG = 100kΩ
Reverse capacitance
c rss
—
0.018
0.04
pF
f = 1MHz
Power gain
PG
22
26
—
dB
VDS = 5V, VG1 = 5V, VG2S =4V
Noise figure
NF
—
1.3
1.9
dB
RG = 100kΩ, f = 200MHz
2
Symbol
BB401M
Main Characteristics
Test Circuit for Operating Items (I D(op) , |yfs|, Ciss, Coss, Crss, NF, PG)
VG1
VG2
RG
Gate 1
Gate 2
Source
A
Drain
ID
Power Gain, Noise Figure Test Circuit
1000p
1000p
47k
VT
VG2
VT
1000p
47k
1000p
47k
BBFET
Output(50¶)
1000p
L2
Input(50¶)
L1
10p max
1000p
1000p
36p
1SV70
RG
RFC
100k
1SV70
1000p
V D = V G1
Unit@ Resistance@ (¶ )
@@
Capacitance@ (F)
L1 : 1mm Enameled Copper Wire,Inside dia 10mm, 2Turns
L2 : 1mm Enameled Copper Wire,Inside dia 10mm, 2Turns
RFC : 1mm Enameled Copper Wire,Inside dia 5mm, 2Turns
3
BB401M
Power vs. Temperature Derating
30
100
50
15
20
10
5
RG=
50
100
150
Ambient Temperature
0
200
Ta (°C)
DC Current vs.
Gate2 to Source Voltage
1
2
3
Drain to Source Voltage
Ω
k
82 k Ω
0
10 k Ω
0
2
1 0kΩ
15 k Ω
180
kΩ
220
4
5
V DS (V)
DC Current vs.
Gate1 to Source Voltage
25
20
V DS = 5 V
R G = 82 k Ω
RG
5
12
V
10
120 k Ω
= 150 k Ω
3
100 k Ω
V
15
16
4
82 k Ω
Drain Current
20
I D (mA)
Ω
68 k
V DD = V GG = 5 V
I D (mA)
47
5 k
68 6 k Ω
k Ω
Ω
I D (mA)
150
0
Drain Current
Typical Output Characteristics
V G2S = 4 V
25
Drain Current
Channel Dissipation
Pch (mW)
200
2V
8
4
V G2S = 1 V
0
4
1
2
3
Gate2 to Source Voltage
4
5
VG2S (V)
0
1
2
3
Gate1 to Source Voltage
4
VG1S (V)
5
BB401M
DC Current vs.
Gate1 to Source Voltege
DC Current vs.
Gate1 to Source Voltege
I D (mA)
V
4
V
12
8
2V
4
Drain Current
16
20
V DS = 5 V
R G = 100 k Ω
3
Drain Current
I D (mA)
20
V DS = 5 V
R G = 150 k Ω
16
12
4V
8
2V
4
V G2S = 1 V
1
2
3
Gate1 to Source Voltage
30
25
4V
3V
20
15
2V
10
5
V G2S = 1 V
0
1
2
3
Gate1 to Source Voltage
0
4
5
VG1S (V)
Forward Transfer Admittance vs.
Gate1 to Source Voltage
V DS = 5 V
R G = 82 k Ω
f = 1 kHz
V G2S = 1 V
4
5
V G1S (V)
Forward Transfer Admittance |y fs | (mS)
Forward Transfer Admittance |y fs | (mS)
0
3V
1
2
3
Gate1 to Source Voltage
4
5
VG1S (V)
Forward Transfer Admittance vs.
Gate1 to Source Voltage
30
V DS = 5 V
R G = 100 k Ω
25
f = 1 kHz
4V
3V
20
15
2V
10
5
V G2S = 1 V
0
1
2
3
Gate1 to Source Voltage
4
5
VG1S (V)
5
Forward Transfer Admittance vs.
Gate1 to Source Voltage
Power Gain vs. Gate Resistance
30
20
V DS = 5 V
R G = 150 k Ω
16 f = 1 kHz
25
4V
Power Gain PG (dB)
Forward Transfer Admittance |y fs | (mS)
BB401M
3V
12
2V
8
4
15
10
5
V G2S = 1 V
0
20
1
2
3
Gate1 to Source Voltage
4
0
10
5
VG1S (V)
Noise Figure vs. Gate Resistance
V DS = 5 V
V G1S = 5 V
V G2S = 4 V
f = 200 MHz
500 1000
25
Power Gain PG (dB)
Noise Figure NF (dB)
100 200
Power Gain vs. Drain Current
1
20
15
10
5
20
50
100 200
500 1000
Gate Resistance R G (k Ω )
6
50
30
2
0
10
20
Gate Resistance R G (k Ω )
4
3
V DS = 5 V
V G1S = 5 V
V G2S = 4 V
f = 200 MHz
0
V DS = 5 V
V G1S = 5 V
V G2S = 4 V
R G = variable
f = 200 MHz
5
10
15
20
25
Drain Current I D (mA)
30
BB401M
Noise Figure vs. Drain Current
Drain Current vs. Gate Resistance
30
V DS = 5 V
V G1S = 5 V
V G2S = 4 V
R G = variable
f = 200 MHz
3
2
1
0
5
10
15
20
25
Drain Current I D (mA)
Noise Figure NF (dB)
4
15
10
5
V DS = 5 V
V G1S = 5 V
V G2S = 4 V
20
50
100 200
500 1000
Drain Current I D (mA)
Gate Resistance R G (k Ω )
Gain Reduction vs.
Gate2 to Source Voltage
Input Capacitance vs.
Gate2 to Source Voltage
4
V DS = 5 V
V G1S = 5 V
V G2S = 4 V
R G = 100 k Ω
f = 200 MHz
50
40
30
20
10
1
2
3
4
5
Gate2 to Source Voltage V G2S (V)
Input Capacitance Ciss (pF)
Gain Reduction GR (dB)
20
0
10
30
60
0
25
3
2
1
0
V DS = 5 V
V G1S = 5 V
R G = 100 k Ω
f = 1 MHz
1
2
3
4
5
Gate2 to Source Voltage V G2S (V)
7
BB401M
Package Dimensions (Unit: mm)
0.2
+ 0.1
0.1
1.9 } 0.2
0.95 0.95
+ 0.1
0.4 – 0.05
0.4 – 0.05
4
+ 0.1
0.65 }
2.95 }
0.16 – 0.06
+ 0.1
0.4 – 0.05
0.85
0.95
2.8 } 0.2
0.65 }
2
1
+ 0.1
0.6 – 0.05
0 ~ 0.1
0.1
1.5 }
0.15
3
1.1}
0.1
0.8
1.8
8
Hitachi Code
EIAJ
JEDEC
MPAK–4R
—
—
BB401M
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
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Copyright © Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
9