ETC CLC450AJM5

CLC450
Single Supply, Low Power, High Output, Current
Feedback Amplifier
General Description
The CLC450 has a new output stage that delivers high
output drive current (100mA), but consumes minimal
quiescent supply current (1.5mA) from a single 5V supply. Its
current feedback architecture, fabricated in an advanced
complementary bipolar process, maintains consistent
performance over a wide range of gains and signal levels,
and has a linear phase response up to one half of the -3dB
frequency.
The CLC450 offers superior dynamic performance with a
100MHz small signal bandwidth, 280V/µs slew rate and
6.1ns rise/fall times (2VSTEP). The combination of low
quiescent power, high output current drive, and high speed
performance make the CLC450 well suited for many battery
powered personal communication/computing systems.
The ability to drive low impedance, highly capacitive loads,
makes the CLC450 ideal for single ended cable applications.
It also drives low impedance loads with minimum distortion.
The CLC450 will drive a 100Ω load with only −75/−64dBc
second/third harmonic distortion (AV =+2, VOUT = 2VPP, f =
1MHz). With a 25Ω load, and the same conditions, it
produces only −70/−60dBc second/third harmonic distortion.
It is also optimized for driving high currents into single-ended
transformers and coils.
When driving the input of high resolution A/D converters, the
CLC450 provides excellent −79/−75dBc second/third
harmonic distortion (AV = +2, VOUT = 2VPP, f = 1MHz, RL =
1kΩ) and fast settling time.
Available in SOT23-5, the CLC450 is ideal for applications
where space is critical.
n
n
n
n
n
n
−79/−75dBc HD2/HD3 (1MHz)
20ns settling to 0.05%
280V/µs slew rate
Stable for capacitive loads up to 1000pf
Single 5V to ± 5V supplies
Available in Tiny SOT23-5 package
Applications
n
n
n
n
n
n
n
Coaxial cable driver
Twisted pair driver
Transformer/Coil Driver
High capacitive load driver
Video line driver
Portable/battery powered applications
A/D driver
Maximum Output Voltage vs. RL
Features
n 100mA output current
n 1.5mA supply current
n 100MHz bandwidth (AV = +2)
DS012733-65
Connection Diagrams
DS012733-3
DS012733-4
Pinout
DIP & SOIC
© 2001 National Semiconductor Corporation
DS012733
Pinout
SOT23-5
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CLC450 Single Supply, Low Power, High Output, Current Feedback Amplifier
March 2001
CLC450
Typical Application
DS012733-1
Single Supply Cable Driver
DS012733-2
Response After 10m of Cable
Ordering Information
Package
Temperature Range
Industrial
Part Number
Package Marking
NSC Drawing
8-pin plastic DIP
−40˚C to +85˚C
CLC450AJP
CLC450AJP
N08E
8-pin plastic SOIC
−40˚C to +85˚C
CLC450AJE
CLC450AJE
M08A
5-pin SOT
−40˚C to +85˚C
CLC450AJM5
A20
MA05A
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2
ESD Rating (human body model)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Ratings
Supply Voltage (VCC - VEE)
Output Current (see note 3)
Common Mode Input Voltage
Maximum Junction Temperature
Storage Temperature Range
Lead Solder Duration (+300˚C)
Thermal Resistance
Package
MDIP
SOIC
SOT23
+14V
140mA
VEE to VCC
+150˚C
−65˚C to +150˚C
10 sec
500V
(θJC)
115˚C/W
130˚C/W
140˚C/W
(θJA)
125˚C/W
150˚C/W
210˚C/W
+5V Electrical Characteristics
AV = +2, Rf = 1k, RL = 100Ω, VS = +5 (Note 4), VCM = VEE + (VS/2), RL tied to VCM; unless specified
Symbol
Parameter
Ambient Temperature
Conditions
CLC450AJ
Typ
Min/Max (Note 2)
Units
+25˚C
+25˚C
0 to
70˚C
−40 to
85˚C
VO < 0.5VPP
100
85
75
70
MHz
VO < 2.0VPP
75
60
55
50
MHz
−0.1dB Bandwidth
VO < 0.5VPP
30
25
20
20
MHz
Gain Ppeaking
< 200MHz, VO < 0.5VPP
< 30MHz, VO < 0.5VPP
< 30MHz, VO = 0.5VPP
0
0.5
0.9
1.0
dB
0.1
0.3
0.4
0.5
dB
0.2
0.4
0.5
0.5
deg
Rise and Fall Time
2V Step
6.1
8.5
9.2
10.0
ns
Settling Time to 0.05%
1V Step
20
30
50
80
ns
Overshoot
2V Step
16
20
22
22
%
Slew Rate
2V Step
280
200
185
170
V/µs
Frequency Domain Response
-3dB Bandwidth
Gain Rolloff
Linear Phase Deviation
TIME DOMAIN RESPONSE
DISTORTION AND NOISE RESPONSE
2nd Harmonic Distortion
3rd Harmonic Distortion
2VPP,1MHz
−75
-
-
-
dBc
2VPP, 1MHz, RL = 1kΩ
−79
-
-
-
dBc
2VPP, 5MHz
−62
-58
-57
-56
dBc
2VPP, 1MHz
−64
-
-
-
dBc
2VPP, 1MHz, RL = 1kΩ
−75
-
-
-
dBc
2VPP, 5MHz
−52
-48
-46
-46
dBc
Voltage (eni)
> 1MHz
3.0
3.7
4.0
4.0
nV/
Non-Inverting Current (ibn)
> 1MHz
6.9
9
10
10
pA/
Inverting Current (ibi)
> 1MHz
8.5
11
12
12
pA/
1
4
5
6
mV
7
-
15
15
µV/˚C
5
12
15
16
µA
Equivalent Input Noise
Static, DC Performance
Input Offset Voltage (Note 5)
Average Drift
Input Bias Current (Non-Inverting)
(Note 5)
Average Drift
Input Bias Current (Inverting)
(Note 5)
Average Drift
25
-
60
60
nA/˚C
3
10
12
13
µA
10
-
20
20
nA/˚C
Power Supply Rejection Ratio
DC
54
50
48
48
dB
Common Mode Rejection Ratio
DC
51
47
45
45
dB
3
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CLC450
Absolute Maximum Ratings (Note 1)
CLC450
+5V Electrical Characteristics
(Continued)
AV = +2, Rf = 1k, RL = 100Ω, VS = +5 (Note 4), VCM = VEE + (VS/2), RL tied to VCM; unless specified
Symbol
Parameter
Conditions
Typ
Min/Max (Note 2)
Units
Static, DC Performance
Supply Current (Note 5)
RL = ∞
1.5
1.7
1.8
1.8
mA
Input Resistance (Non-Inverting)
0.46
0.37
0.33
0.33
MΩ
Input Capacitance (Non-Inverting)
1.5
2.3
2.3
2.3
pF
Input Voltage Range, High
4.2
4.1
4.1
4.0
V
Input Voltage Range, Low
0.8
0.9
0.9
1.0
V
Miscellaneous Performance
Output Voltage Range, High
RL = 100Ω
4.0
3.9
3.9
3.8
V
Output Voltage Range, Low
RL = 100Ω
1.0
1.1
1.1
1.2
V
Output Voltage Range, High
RL = ∞
4.1
4.0
4.0
3.9
V
Output Coltage Range, Low
RL = ∞
0.9
1.0
1.0
1.1
V
100
80
65
40
mA
55
90
90
120
mΩ
Output Current (Note 3)
Output Resistance, Closed Loop
DC
± 5V Electrical Characteristics
AV = +2, VCC = ± 5V, RL = 100Ω, Rf = 1kΩ; unless specified
Symbol
Parameterm
Ambient Temperature
Conditions
CLC450AJ
Typ
Min/Max (Note 2)
Units
+25˚C
+25˚C
0 to
70˚C
−40 to
85˚C
VO < 1.0VPP
135
115
105
100
MHz
VO < 4.0VPP
55
45
42
40
MHz
40
30
25
25
MHz
0
0.5
0.9
1.0
dB
0.1
0.3
0.4
0.5
dB
Linear Phase Deviation
VO < 1.0VPP
< 200MHz, VO < 1.0VPP
< 30MHz, VO < 1.0VPP
< 30MHz, VO < 1.0VPP)
0.1
0.3
0.4
0.4
deg
Differential Gain
NTSC, RL = 150Ω
0.03
-
-
-
%
Differential Phase
NTSC, RL = 150Ω
0.3
-
-
-
deg
Rise and Fall Time
2V Step
4.4
5.8
6.2
6.8
ns
Settling Time to ± 0.05%
2V Step
15
25
40
60
ns
Overshoot
2V Step
15
20
22
22
%
Slew Rate
2V Step
370
280
260
240
V/µs
Frequency Domain Response
-3dB Bandwidth
−0.1dB Bandwidth
Gain Peaking
Gain Rolloff
TIME DOMAIN RESPONSE
DISTORTION AND NOISE RESPONSE
2nd Harmonic Distortion
2VPP, 1MHz
−86
-
-
-
dBc
2VPP, 1MHz, RL = 1kΩ
−85
-
-
-
dBc
2VPP, 5MHz
−68
−64
−61
−60
dBc
2VPP, 1MHz
−65
-
-
-
dBc
2VPP, 1MHz, RL = 1kΩ
−74
-
-
-
dBc
2VPP, 5MHz
−52
−48
−46
−46
dBc
Voltage (eni)
> 1MHz
3.0
3.7
4.0
4.0
nV/
Non-Inverting Current (ibn)
> 1MHz
6.9
9
10
10
pA/
Inverting Current (ibi)
> 1MHz
8.5
11
12
12
pA/
3rd Harmonic Distortion
Equivalent Input Noise
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4
CLC450
± 5V Electrical Characteristics
(Continued)
AV = +2, VCC = ± 5V, RL = 100Ω, Rf = 1kΩ; unless specified
Symbol
Parameterm
Conditions
Typ
Min/Max (Note 2)
Units
Static, DC Performance
Input Offset Voltage
2
Average Drift
Input Bias Current (Non-Inverting)
Average Drift
Input Bias Current (Inverting)
Average Drift
6
7
8
mV
8
-
20
20
µV/˚C
5
12
16
17
µA
40
-
70
70
nA/˚C
5
13
15
16
µA
20
-
45
45
nA/˚C
Power Supply Rejection Ratio
DC
56
51
49
49
dB
Common-Mode Rejection Ratio
DC
53
48
46
46
dB
Supply Current
RL = ∞
1.6
1.9
2.0
2.0
mA
0.62
0.50
0.45
0.45
MΩ
Miscellaneous Performance
Input Resistance (Non-Inverting)
Input Capacitance (Non-Inverting)
Common-Mode Input Range
Output Voltage Range
RL = 100Ω
Output Voltage Range
RL = ∞
Output Current (Note 3)
Output Resistance, Closed Loop
DC
1.2
1.8
1.8
1.8
pF
± 4.2
± 3.8
± 4.0
± 4.1
± 3.6
± 3.8
± 4.1
± 3.6
± 3.8
± 4.0
± 3.5
± 3.7
V
130
100
80
50
mA
40
70
70
90
mΩ
V
V
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined
from tested parameters.
Note 3: The short circuit current can exceed the maximum safe output current.
Note 4: VS = VCC −VEE
Note 5: AJ-level: spec. is 100% tested at +25˚C.
+5V Typical Performance Characteristics
Non-Inverting Frequency Response
Inverting Frequency Response
DS012733-5
DS012733-6
5
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Frequency Response vs. RL
(Continued)
Frequency Response vs. VO
DS012733-7
Frequency Response vs. CL
DS012733-8
Open Loop Transimpedance Gain, Z(s)
DS012733-9
Gain Flatness
DS012733-10
Equivalent Input Noise
Magnitude (0.05dB/div)
CLC450
+5V Typical Performance Characteristics
10
20
30
Frequency (MHz)
DS012733-11
DS012733-12
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6
2nd & 3rd Harmonic Distortion
CLC450
+5V Typical Performance Characteristics
(Continued)
2nd Harmonic Distortion, RL = 25Ω
DS012733-14
DS012733-13
3rd Harmonic Distortion, RL = 25Ω
2nd Harmonic Distortion, RL = 100Ω
DS012733-15
3rd Harmonic Distortion, RL = 100Ω
DS012733-16
2nd Harmonic Distortion, RL = 1kΩ
Distortion (dBc)
-30
-40
10MHz
-50
5MHz
-60
2MHz
1MHz
-70
0
0.5
1
1.5
2
2.5
Output Amplitude (Vpp)
DS012733-17
DS012733-18
7
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CLC450
+5V Typical Performance Characteristics
3rd Harmonic Distortion, RL = 1kΩ
(Continued)
Closed Loop Output Resistance
DS012733-20
DS012733-19
Recommended RS vs. CL
Large & Small Signal Pulse Response
DS012733-22
DS012733-21
PSRR & CMRR
IBI, IBN, VOS vs. Temperature
DS012733-24
DS012733-23
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8
CLC450
+5V Typical Performance Characteristics
(Continued)
Maximum Output Voltage vs. RL
DS012733-25
± 5V Typical Performance Characteristics
Non-Inverting Frequency Response
Inverting Frequency Response
DS012733-26
Frequency Response vs. RL
DS012733-27
Frequency Response vs. VO
DS012733-28
DS012733-29
9
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Frequency Response vs. CL
(Continued)
Gain Flatness
Magnitude (0.05dB/div)
CLC450
± 5V Typical Performance Characteristics
10
20
30
Frequency (MHz)
DS012733-31
DS012733-30
Small Signal Pulse Response
Large Signal Pulse Response
DS012733-32
2nd & 3rd Harmonic Distortion
DS012733-33
2nd Harmonic Distortion, RL = 25Ω
DS012733-35
DS012733-34
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10
3rd Harmonic Distortion, RL = 25Ω
CLC450
± 5V Typical Performance Characteristics
(Continued)
2nd Harmonic Distortion, RL = 100Ω
DS012733-36
3rd Harmonic Distortion, RL = 100Ω
DS012733-37
2nd Harmonic Distortion, RL = 1kΩ
DS012733-38
3rd Harmonic Distortion, RL = 1kΩ
DS012733-39
Recommended RS vs. CL
DS012733-40
DS012733-41
11
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Maximum Output Voltage vs. RL
(Continued)
Differential Gain & Phase
DS012733-43
DS012733-42
IBI, IBN, VOS vs. Temperature
Short Term Settling Time
1.5
12
1
8
IBI
0.5
4
IBN
Vos
0
IBI, IBN (µA)
Offset Voltage Vos (mV)
CLC450
± 5V Typical Performance Characteristics
0
-0.5
-4
-100
-50
0
50
100
150
Temperature (ϒC)
DS012733-44
DS012733-45
Long Term Settling Time
DS012733-46
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12
CLC450 Operation
The CLC450 is a current feedback amplifier built in an
advanced complementary bipolar process. The CLC450
operates from a single 5V supply or dual ± 5V supplies.
Operating from a single supply, the CLC450 has the
following features:
•
Provides 100mA of output current while consuming
7.5mW of power
•
•
Offers low −79/−75dB 2nd and 3rd harmonic distortion
Provides BW > 60MHz and 1MHz distortion < −65dBc at
VO = 2.5VPP
The CLC450 performance is further enhanced in ± 5V supply
application as indicated in the ± 5V Electrical Characteristics table and ± 5V Typical Performance plots.
Current Feedback Amplifiers
Some of the key features of current feedback technology
are:
• Independence of AC bandwidth and voltage gain
• Inherently stable at unity gain
• Adjustable fequency response with feedback resistor
• High slew rate
• Fast settling
Current feedback operation can be described using a simple
equation. The voltage gain for a non-inverting or inverting
current feedback amplifier is approximated by Equation 1.
DS012733-47
Equation 1.
FIGURE 1. Non-Inverting Configuration
For single supply DC coupled operation, keep input signal
levels above 0.8V DC. For input signals that drop below 0.8V
DC, AC coupling and level shifting the signal are
recommended. The non-inverting and inverting configurations for both input conditions are illustrated in the following
2 sections.
DC Coupled Single Supply Operation
Figure 1 and Figure 2 show the recommended non-inverting
and inverting configurations for input signals that remain
above 0.8V DC.
(1)
where:
• AV is the closed loop DC voltage gain
• Rf is the feedback resistor
• Z(j(ω)) is the CLC450’s open loop transimpedance gain
• Z(j(ω))/Rf is the loop gain
The denominator of Equation 1 is approximately equal to 1 at
low frequencies. Near the -3dB corner frequency, the
interaction between Rf and Z(j(ω) dominates the circuit
performance. The value of the feedback resistor has a large
affect on the circuits performance. Increasing Rf has the
following affects:
• Decreases loop gain
• Decreases bandwidth
• Reduces gain peaking
• Lowers pulse response overshoot
• Affects frequency response phase linearity
Refer to the Feedback Resistor Selection section for more
details on selecting a feedback resistor value.
Design Information
Single Supply Operation (Vcc = +5V, VEE = GND)
The specifications given in the +5V Electrical Characteristics table for single supply operation are measured with a
common mode voltage (Vcm) of 2.5V. Vcm is the voltage
around which the inputs are applied and the output voltages
are specified.
DS012733-50
FIGURE 2. Inverting Configuration
AC Coupled Single Supply Operation
Figure 3 and Figure 4 show possible non-inverting and
inverting configurations for input signals that go below 0.8V
DC. The input is AC coupled to prevent the need for level
shifting the input signal at the source. The resistive voltage
divider biases the non-inverting input to VCC ÷ 2 = 2.5V (For
VCC = +5V).
13
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CLC450
Operating from a single +5V supply, The Common Mode
Input Range (CMIR) of the CLC450 is typically +0.8V to
+4.2V. The typical output range with RL = 100Ω is +1.0V to
+4.0V.
Application Division
CLC450
Application Division
(Continued)
DS012733-53
FIGURE 5. Dual Supply Non-Inverting Configuration
DS012733-51
FIGURE 3. AC Coupled Non -Inverting Configuration
DS012733-54
FIGURE 6. Dual Supply Inverting Configuration
Feedback Resistor Selection
The feedback resistor, Rf, affects the loop gain and
frequency response of a current feedback amplifier.
Optimum performance of the CLC450, at a gain of +2V/V, is
achieved with Rf equal to 1kΩ. The frequency response plots
in the Typical Performance sections illustrate the
recommended Rf for several gains. These recommended
values of Rf provide the maximum bandwidth with minimal
peaking. Within limits, Rf can be adjusted to optimize the
frequency response.
DS012733-52
FIGURE 4. AC Coupled Inverting Configuration
Dual Supply Operation
The CLC450 operates on dual supplies as well as single
supplies. The non-inverting and inverting configurations are
shown in Figure 5 and Figure 6.
•
•
Decrease Rf to peak frequency response and extend
bandwidth
Increases Rf to roll off frequency response and compress
bandwidth
As a rule of thumb, if the recommended Rf is doubled, then
the bandwidth will be cut in half.
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14
(Continued)
2.
Calculate the RMS power at the output stage:Po =(VCC
− Vload)(Iload), where Vload and Iload are the RMS voltage
and current across the external load.
3.
Calculate the total RMS power:Pt =Pamp + Po
Unity Gain Operation
The recommended Rf for unity gain (+1V/V) operation is
1.5kΩ. Rg is left open. Parasitic capacitance at the inverting
node may require a slight increase in Rf to maintain a flat
frequency response.
The maximum power that the DIP, SOIC, and SOT packages
can dissipate at a given temperature is illustrated in Figure 8.
The power derating cure for any CLC450 package can be
derived by utilizing the following equation:
Bandwidth vs. Output Amplitude
The bandwidth of the CLC450 is at a maximum for output
voltages near 1Vpp. The bandwidth decreases for smaller
and larger output amplitudes. Refer to the Frequency
Response vs. Vo plots.
Load Termination
The CLC450 can source and sink near equal amounts of
current. For optimum performance, the load should be tied to
Vcm.
Driving Cables and Capacitive Loads
When driving cables, double termination is used to prevent
reflections. For capacitive load application, a small series
resistor at the output of the CLC450 will improve stability and
settling performance. The Frequency Response vs. CL and
Recommended Rsvs. CL plots, in the typical performance
section, give the recommended series resistance value for
optimum flatness at various capacitive loads.
Transmission Line Matching
One method for matching the characteristic impedance (Zo)
of a transmission line or cable is to place the appropriate
resistor at the input or output of the amplifier. Figure 7 shows
typical inverting and non-inverting circuit configurations for
matching transmission lines.
Where
•
•
Tamb = Ambient temperature (˚C)
θJA = Thermal resistance, from junction to ambient, for a
given package (˚C/W)
DS012733-57
FIGURE 8. Power Derating Curves
Connect Rg directly to ground.
Layout Considerations
A proper printed circuit layout is essential for achieving high
frequency performance. National provides evaluation boards
for the CLC450 (730013-DIP, 730027-SOIC, 730068-SOT)
and suggests their use as a guide for high frequency layout
and as an aid for device testing and characterization.
General layout and supply bypassing play major roles in high
frequency performance. Follow the steps below as a basis
for high frequency layout:
Make R1,R2, R6, R7 equal to Zo.
•
Include 6.8µF tantalum and 0.1µF ceramic capacitors on
both supplies
•
Place the 6.8µF capacitors within 0.75 inches of the
power pins.
•
Place the 0.1µF capacitors less than 0.1 inches from the
power pins
•
Remove the ground plane under and around the part,
especially near the input and output pins to reduce
parasitic capacitance.
•
•
Minimize all trace lengths to reduce series inductances.
DS012733-55
FIGURE 7. Transmission Line Matching
Non-inverting gain applications:
•
•
•
Use R3 to isolate the amplifier from reactive loading
caused by the transmission line, or by parasitics.
Inverting gain applications:
• Connect R3 directly to ground.
• Make the resistors R4, R6, and R7 equal to Zo
• Make R5\ Rg =Zo
The input and output matching resistors attenuate the signal
by a factor of 2, therefore additional gain is needed. Use C6
to match the output transmission line over a greater
frequency range. C6 compensates for the increase of the
amplifier’s output impedance with frequency.
Power Dissipation
Follow these steps to determine the power consumption of
the CLC450:
1. Calculate the quiescent (no-load) power:
Pamp = ICC (VCC − VEE)
Use flush-mount printed circuit board pins for prototyping,
never use high profile DIP sockets.
•
Evaluation Board Information
Data sheet are available for the CLC730013/CLC730027
and CLC730068 evaluation boards. The evaluation board
data sheets provide:
•
•
15
Evaluation board schematics
Evaluation board layouts
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CLC450
Application Division
CLC450
Application Division
(Continued)
• General information about the boards
The CLC730013/CLC730027 data sheet also contains
tables of recommended components to evaluate several of
National’s high speed amplifiers. This table for the CLC450
is illustrated below. Refer to the evaluation board data sheet
for schematics and further information.
Components Needed to Evaluate the CLC450 on the
Evaluation Board:
• Rf, Rg — Use this product data sheet to select values.
• Rin, Rout - Typically 50Ω (Refer to the Basic Operation
section of the evaluation board data sheet for details
• Rf — Optional resistor for inverting gain configurations
(Select Rf to yield desired input impedance = Rg\Rf
• C1, C2- 0.1 µF ceramic capacitors
• C3, C4- 6.8 µF tantalum capacitors
• C5, C6, C7, C8
• R1 thru R8
Components not used:
• C5, C6, C7, C8
• R1 thru R8
The evaluation boards are designed to accommodate dual
supplies. The boards can be modified to provide single
supply operation. For best performance; 1) do not connect
the unused supply, 2) ground the unused supply pin.
SPICE Models
SPICE models provide a means to evaluate amplifier
designs. Free SPICE models are available for National’s
monolithic amplifiers that:
• Support Berkeley SPICE 2G and its many derivatives
• Reproduce typical DC, AC, Transient, and Noise
performance
• Support room temperature simulations
The readme file that accompanies the diskette lists released
models, and provides a list of modeled parameters. The
application note OA-18, Simulation SPICE Models for
National’s Op Amps, contains schematics and a
reproduction of the readme file.
Application Circuits
Single Supply Cable Driver
The typical application shown on the front page shows the
CLC450 driving 10m of 75Ω coaxial cable. The CLC450 is
set for a gain of +2V/V to compensate for the divide-by-two
voltage drop at Vo.
Single Supply Lowpass Filter
Figure 9 and Figure 10 illustrate a lowpass filter and design
equations. The circuit operates from a single supply of +5V.
The voltage divider biases the non-inverting input to 2.5V.
And the input is AC coupled to prevent the need for level
shifting the input signal at the source. Use the design
equations to determine R1, R2, C1 and C2 based on the
desired Q and corner frequency.
DS012733-58
FIGURE 9. Lowpass Filter Topology
Gain = K = 1 +
Rf
Rg
Corner frequency = ω c =
1
R1R2C1C2
1
Q=
R 2C 2
+
R1C1
R1C1
R1C2
+ (1− K)
R2C1
R 2C 2
For R1 = R2 = R and C1 = C2 = C
ωc =
Q=
1
RC
1
(3 − K)
DS012733-59
FIGURE 10. Design Equations
This example illustrates a lowpass filter with Q = 0.707 and
corner frequency fc = 10MHz. AQ of 0.707 was chosen to
achieve a maximally flat, Butterworth response. Figure 11
indicates the filter response.
DS012733-60
FIGURE 11. Lowpass Response
www.national.com
16
Where Req is the transformed value of the load impedance,
(RL), and is approximated by:
(Continued)
Twisted Pair Driver
The high output current and low distortion, of the CLC450,
make it well suited for driving transformers. Figure 12
illustrates a typical twisted pair driver utilizing the CLC450
and a transformer. The transformer provides the signal and
its inversion for the twisted pair.
Req =
RL
n2
Select the transformer so that it loads the line with a value
close to Zo, over the desired frequency range. The output
impedance, Ro, of the CLC450 varies within frequency and
can also affect the return loss. The return loss, shown below,
takes into account an ideal transformer and the value of Ro
DS012733-61
FIGURE 12. Twisted Pair Driver
The load current (Ii) and voltage (Vo) are related to the
CLC450’s maximum output voltage and current by:
To match the line’s characteristic impedance (Zo) set:
•
•
RL = ZO
Rm = Req
From the above current relationship, it is obvious that an
amplifier with high output drive capability is required.
17
www.national.com
CLC450
Application Division
CLC450
Physical Dimensions
inches (millimeters) unless otherwise noted
8-Pin SOIC
NS Package Number M08A
8-Pin MDIP
NS Package Number N08E
www.national.com
18
inches (millimeters) unless otherwise noted (Continued)
5-Pin SOT23
NS Package Number MA05A
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
CLC450 Single Supply, Low Power, High Output, Current Feedback Amplifier
Physical Dimensions