SCAS023A − D2957, JULY 1978 − REVISED APRIL 1993 • • • • • • • 54ACT11521 . . . J PACKAGE 74ACT11521 . . . DB, DW OR N PACKAGE Compares Two 8-Bit Words Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic SmallOutline Packages, Plastic Shrink Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs (TOP VIEW) Q1 P1 Q0 P0 GND P=Q G7 P7 Q6 P6 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 G P2 Q2 P3 G3 VCC P4 Q4 P5 Q5 54ACT11521 . . . FK PACKAGE (TOP VIEW) Q2 P3 Q3 VCC P4 description These identity comparators perform comparisons on two 8-bit binary or BCD words. Also included is a P = Q totem-pole output. P2 G Q1 P1 Q0 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 Q4 P5 Q5 P6 Q6 P0 GND P=Q Q7 P7 The 54ACT11521 is characterized for operation over the full military temperature range of − 55°C to 125°C. The 74ACT11521 is characterized for operation from − 40°C to 85°C. 4 FUNCTION TABLE INPUTS OUTPUT P=Q DATA P, Q ENABLE G P=Q L L P>Q L H P<Q L H X H H EPIC is a trademark of Texas Instruments Incorporated. Copyright 1993, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • 2−1 SCAS023A − D2957, JULY 1978 − REVISED APRIL 1993 logic symbol† G P0 P1 P2 P3 P4 P5 P6 P7 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 20 4 2 logic diagram (positive logic) COMP G1 P7 0 Q7 19 P6 17 P 14 Q6 12 10 8 3 1 P5 7 1P = Q 6 Q5 P=Q 0 P4 18 16 Q4 Q 13 11 P3 9 7 Q3 7 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. P2 Q2 P1 Q1 P0 Q0 G 8 7 10 9 12 11 14 13 17 6 16 P=Q 19 18 2 1 4 3 20 Pin numbers shown are for the DW, J, and N packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mA Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2−2 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • SCAS023A − D2957, JULY 1978 − REVISED APRIL 1993 recommended operating conditions 54ACT11521 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 0 VO IOH Output voltage 0 High-level output current IOL Dt /Dv Low-level output current TA Operating free-air temperature High-level input voltage 74ACT11521 2 2 V V 0.8 Input transition rise or fall rate UNIT 0.8 V VCC VCC V −24 −24 mA 24 24 mA VCC VCC 0 0 V 0 10 0 10 ns/ V −55 125 −40 85 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = − 50 mA A VOH IOH = − 24 mA IOH = − 50 mA{ IOH = − 75 mA{ 54ACT11521 74ACT11521 MIN MIN MIN 4.5 V 4.4 4.4 4.4 5.5 V 5.4 5.4 5.4 4.5 V 3.94 3.7 3.8 5.5 V 4.94 4.7 4.8 5.5 V MAX UNIT V 3.85 4.5 V IOL = 24 mA MAX 3.85 5.5 V IOL = 50 mA A VOL TA = 25°C TYP MAX VCC 0.1 0.1 0.1 5.5 V 0.1 0.1 0.1 4.5 V 0.36 0.5 0.44 5.5 V 0.36 0.5 0.44 V IOL = 50 mA{ IOL = 75 mA{ 5.5 V II ICC VI = VCC or GND VI = VCC or GND, 5.5 V ± 0.1 ±1 ±1 mA 5.5 V 8 160 80 mA DICC} One input at 3.4 V, Other inputs at GND or VCC 5.5 V 0.9 1 1 mA 1.65 5.5 V IO = 0 1.65 Ci VI = VCC or GND 5V 4 † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. ‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC. pF switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL P or Q P=Q tPLH tPHL G P=Q MIN • TA = 25°C TYP MAX 74ACT11521 MIN MAX MIN MAX 1.5 8.8 13 1.5 15.9 1.5 14.7 1.5 8.2 12 1.5 14.6 1.5 13.6 1.5 6.7 9.3 1.5 11.2 1.5 10.5 1.5 6.8 8.8 1.5 10.2 1.5 9.7 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • 54ACT11521 UNIT ns ns 2−3 SCAS023A − D2957, JULY 1978 − REVISED APRIL 1993 operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance CL = 50 pF, f = 1 MHz TYP UNIT 40 pF PARAMETER MEASUREMENT INFORMATION 3V Input (see Note B) From Output Under Test CL = 50 pF (see Note A) 1.5 V 1.5 V 0V tPHL 500 Ω tPLH 50% VCC Output VOH 50% VCC VOL VOLTAGE WAVEFORMS LOAD CIRCUIT NOTES: A. CL includes probe and jig capacitance. B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 2−4 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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