SCAS039A − APRIL 1988 − REVISED APRIL 1993 • • • • • • • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Noninverting Version of ′AC11138 Incorporates 3 Enable Inputs to Simplify Cascading and/or Data Reception Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs 54AC11238 . . . J PACKAGE 74AC11238 . . . D OR N PACKAGE (TOP VIEW) Y1 Y2 Y3 GND Y4 Y5 Y6 Y7 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 Y0 A B C VCC G1 G2A G2B 54AC11238 . . . FK PACKAGE (TOP VIEW) B C NC VCC G1 • A Y0 NC Y1 Y2 description 4 3 2 1 20 19 18 5 17 6 16 G2A G2B NC Y7 Y6 Y3 GND NC Y4 Y5 The ′AC11238 circuit is designed to be 15 7 used in high-performance memory-decoding or 14 8 9 10 11 12 13 data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a NC − No internal connection fast enable circuit, the delay times of this decoder and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The conditions at the binary select inputs and the three enable inputs select one of eight input lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The 54AC11238 is characterized for operation over the full military temperature range of − 55°C to 125°C. The 74AC11238 is characterized for operation from − 40°C to 85°C. EPIC is a trademark of Texas Instruments Incorporated. Copyright 1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • 2−1 SCAS039A − APRIL 1988 − REVISED APRIL 1993 FUNCTION TABLE SELECT INPUTS ENABLE INPUTS G2B C B H X X X X H X X G1 G2A X X OUTPUTS A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X L L L L L L L L X L L L L L L L L L X X X X X L L L L L L L L H L L L L L H L L L L L L L H L L L L H L H L L L L L L H L L L H L L L H L L L L L H L L L H H L L L H L L L L H L L H L L L L L L H L L L H L L H L H L L L L L H L L H L L H H L L L L L L L H L H L L H H H L L L L L L L H logic symbols (alternatives)† A B C 15 14 13 BIN/OCT 0 1 1 2 4 2 3 G1 G2A G3A 11 10 9 & 4 5 EN 6 7 16 1 2 3 5 6 7 8 Y0 A Y1 B Y2 C 15 0 0 G 7 14 13 2 1 2 Y3 3 & Y4 G1 Y5 G2A Y6 Y7 G2B 10 9 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • 4 11 † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2−2 DMUX 0 5 EN 6 7 16 1 2 3 5 6 7 8 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 SCAS039A − APRIL 1988 − REVISED APRIL 1993 logic diagram (positive logic) 16 A 1 B C 14 2 3 13 5 6 G1 G3A Y1 Y2 Y3 Y4 Y5 11 7 G2A Y0 15 Y6 10 8 Y7 9 Pin numbers shown are for the D, J, and N packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • 2−3 SCAS039A − APRIL 1988 − REVISED APRIL 1993 recommended operating conditions 54AC11238 VCC Supply voltage VIH VCC = 3 V VCC = 4.5 V High-level input voltage VCC = 5.5 V VCC = 3 V VIL VI VO Input voltage MAX 3 5 5.5 Dt /Dv Input transition rise or fall rate TA Operating free-air temperature NOM MAX 3 5 5.5 2.1 3.15 3.15 3.85 3.85 UNIT V V 0.9 0.9 1.35 1.35 1.65 1.65 VCC VCC 0 Low-level output current MIN 2.1 VCC = 3 V VCC = 4.5 V High-level output current IOL NOM 0 Output voltage IOH MIN VCC = 4.5 V VCC = 5.5 V Low-level input voltage 74AC11238 0 VCC VCC 0 −4 −4 −24 −24 VCC = 5.5 V VCC = 3 V −24 −24 12 12 VCC = 4.5 V VCC = 5.5 V 24 24 24 24 V V V mA mA 0 10 0 10 ns/ V −55 125 − 40 85 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = − 50 mA VOH IOH = − 4 mA IOH = − 24 mA IOH = − 50 mA} IOH = − 75 mA} IOL = 50 mA VOL IOL = 12 mA IOL = 24 mA VCC MIN TA = 25°C TYP† MAX 54AC11238 MIN MAX 74AC11238 MIN 3V 2.9 2.9 2.9 4.5 V 4.4 4.4 4.4 5.5 V 5.4 5.4 5.4 3V 2.58 2.4 2.48 4.5 V 3.94 3.7 3.8 5.5 V 4.94 4.7 4.8 5.5 V MAX V 3.85 5.5 V 3.85 3V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 5.5 V 0.1 0.1 0.1 3V 0.36 0.5 0.44 4.5 V 0.36 0.5 0.44 5.5 V 0.36 0.5 0.44 IOL = 50 mA} IOL = 75 mA} 5.5 V VI = VCC or GND VI = VCC or GND, 5.5 V UNIT V 1.65 5.5 V 1.65 ±1 ±1 mA IO = 0 5.5 V 4 80 VI = VCC or GND 5V 3.5 † All typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. 40 mA II ICC ± 0.1 Ci 2−4 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • pF SCAS039A − APRIL 1988 − REVISED APRIL 1993 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A, B, C Any Y tPLH tPHL G1 Any Y tPLH tPHL G2A, G2B Any Y MIN TA = 25°C TYP MAX 54AC11238 74AC11238 MIN MAX MIN MAX 1.5 8.5 10.6 1.5 12.7 1.5 11.7 1.5 9.6 11.9 1.5 14.3 1.5 13.3 1.5 8.2 10.3 1.5 12.3 1.5 11.4 1.5 9.6 11.7 1.5 14 1.5 13 1.5 9.1 11.2 1.5 13.4 1.5 12.5 1.5 10.7 12.9 1.5 15.6 1.5 14.5 UNIT ns ns ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A, B, C Any Y tPLH tPHL G1 Any Y tPLH tPHL G2A, G2B Any Y TA = 25°C MIN TYP MAX 54AC11238 MIN 74AC11238 MAX MIN MAX 1.5 5.4 7.3 1.5 9 1.5 8.5 1.5 6.3 8.6 1.5 10.9 1.5 10.2 1.5 5.2 6.9 1.5 8.7 1.5 8.1 1.5 6.5 8.5 1.5 10.6 1.5 9.9 1.5 5.6 7.5 1.5 9.6 1.5 8.9 1.5 7.2 9.3 2.5 11.8 1.5 11 UNIT ns ns ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance CL = 50 pF, f = 1 MHz TYP UNIT 44 pF PARAMETER MEASUREMENT INFORMATION VCC Input (see Note B) From Output Under Test CL = 50 pF (see Note A) 50% 50% 0V tPHL 500 Ω tPLH 50% VCC Output VOH 50% VCC VOL VOLTAGE WAVEFORMS LOAD CIRCUIT NOTES: A. CL includes probe and jig capacitance. B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • 2−5 SCAS039A − APRIL 1988 − REVISED APRIL 1993 TYPICAL APPLICATION DATA 74AC11238 BIN/OCT 15 14 13 1 2 2 4 11 VCC 0 1 3 & 4 10 EN 9 5 6 7 16 1 2 3 5 6 7 8 0 1 2 3 4 5 6 7 74AC11238 BIN/OCT 15 A0 14 A1 13 A2 1 2 2 4 11 A3 0 1 3 & 4 10 A4 EN 9 5 6 7 16 1 2 3 5 6 7 8 8 9 10 11 12 13 14 15 74AC11238 BIN/OCT 15 14 13 11 0 1 1 2 2 4 3 & 4 10 9 EN 5 6 7 Pin numbers shown are for the D, J, and N packages. Figure 2. 24-Bit Decoding Scheme 2−6 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • 16 1 2 3 5 6 7 8 16 17 18 19 20 21 22 23 SCAS039A − APRIL 1988 − REVISED APRIL 1993 TYPICAL APPLICATION DATA 74AC11238 BIN/OCT 15 A0 14 A1 13 A2 1 1 2 2 4 11 VCC 0 3 & 4 10 A3 EN 9 A4 5 6 7 16 1 2 3 5 6 7 8 0 1 2 3 4 5 6 7 74AC11238 BIN/OCT 15 14 13 0 1 1 2 2 4 11 3 & 4 10 EN 9 5 6 7 16 1 2 3 5 6 7 8 8 9 10 11 12 13 14 15 74AC11238 BIN/OCT 15 14 13 0 1 1 2 2 4 11 3 & 4 10 EN 9 5 6 7 16 1 2 3 5 6 7 8 16 17 18 19 20 21 22 23 74AC11238 BIN/OCT 15 14 13 11 0 1 1 2 2 4 3 & 4 10 9 EN 5 6 7 16 1 2 3 5 6 7 8 24 25 26 27 28 29 30 31 Pin numbers shown are for the D, J, and N packages. Figure 3. 32-Bit Decoding Scheme • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • 2−7 SCAS039A − APRIL 1988 − REVISED APRIL 1993 2−8 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001 • IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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