HAT1110R Silicon P Channel Power MOS FET Power Switching REJ03G0416-0200 Rev.2.00 Oct.07.2004 Features • Capable of –4.5 V gate drive • Low drive current • High density mounting Outline SOP-8 7 8 D D 2 G 5 6 D D 4 G 8 5 7 6 3 1 2 S1 S3 MOS1 MOS2 4 1, 3 Source 2, 4 Gate 5, 6, 7, 8 Drain Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Drain to source voltage VDSS –80 Gate to source voltage VGSS ±20 Drain current ID –1 Note1 Drain peak current ID(pulse) –6 Reverse drain current IDR –1 Note2 Channel dissipation Pch 1.2 Channel dissipation Pch Note3 1.8 Channel temperature Tch 150 Storage temperature Tstg –55 to +150 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1 % 2. 1 Drive operation; When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10 s 3. 2 Drive operation; When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10 s Rev.2.00, Oct.07.2004, page 1 of 7 Unit V V A A A W W °C °C HAT1110R Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Notes: 4. Pulse test Rev.2.00, Oct.07.2007, page 2 of 7 Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) Min –80 ±20 — — –1.0 — — 0.4 — — — — — — — — — Typ — — — — — 0.8 1.02 0.8 170 24 16 3.6 0.3 0.7 14 12 25 Max — — ±10 –1 –2.5 1.05 1.38 — — — — — — — — — — Unit V V µA µA V Ω Ω S pF pF pF nC nC nC ns ns ns tf VDF trr — — — 5.5 –0.86 21 — –1.12 — ns V ns Test Conditions ID = –10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = –80 V, VGS = 0 VDS = –10 V, I D = –1mA ID = –0.5 A, VGS = –10 V Note4 ID = –0.5 A, VGS = – 4.5 V Note4 ID = –0.5 A, VDS = –10 V Note4 VDS = –10 V VGS = 0 f = 1MHz VDD = -25 V VGS = -10 V ID = -1.0 A VGS = –10 V, ID = –0.5 A VDD ≈ –30 V RL = 60 Ω Rg = 4.7 Ω IF = –1.0 A, VGS = 0 Note4 IF = –1.0 A, VGS = 0 diF/ dt = 100 A/µs HAT1110R Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area Test condition. When using the glass epoxy board. (FR4 40 x 40 x 1.6 mm), (PW ≤ 10 s) 2.0 2 Dr ive 1.0 er 1D rive Op Op at era 0 50 10 Drain Current Channel Dissipation 3.0 10 ID (A) Pch (W) 4.0 ion tion 100 Ambient Temperature 1 PW 1 DC Op er 0.1 150 0.1 200 Ta (°C) s( 1s ho t) (P ≤ 1 Not 0 se 5 ) 1 10 100 Typical Transfer Characteristics –2.0 –5 V Tc = −25°C –4 V VGS = –3 V –1.0 –0.5 25°C ID (A) Drain Current ID (A) –3.5 V –1.5 Drain Current m ati on µs µs Drain to Source Voltage VDS (V) Note 5 : When using the glass epoxy board (FR4 40x40x1.6 mm) –2.0 75°C –1.0 VDS = –10 V Pulse Test Pulse Test –5 Drain to Source Voltage VDS Drain to Source Saturation Voltage vs Gate to Source Voltage Pulse Test –4 –3 –2 –1 ID = –1 A –0.5 A –4 –8 –12 Gate to Source Voltage Rev.2.00, Oct.07.2007, page 3 of 7 0 –10 (V) –16 –20 VGS (V) Static Drain to Source on State Resistance RDS(on) (mΩ) Drain to Source Voltage VDS(on) (V) 10 Operation in this area is 0.01 limited by RDS(on) –10 V 0 m s = W Typical Output Characteristics –5 0 Ta = 25°C 0.001 1 shot Pulse –2.5 0 10 –1.0 –2.0 –3.0 –4.0 Gate to Source Voltage VGS –5.0 (V) Static Drain to Source on State Resistance vs. Drain Current 10 Pulse Test VGS = –4.5 V 1 –10 V 0 0.1 1 Drain Current 10 ID (A) Static Drain to Source on State Resistance vs. Temperature 3.0 Pulse Test Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) (Ω) HAT1110R 2.5 –1 A 2.0 ID = –0.2 A, –0.5 A 1.5 VGS = –4.5 V –1 A 1.0 –0.2 A, –0.5 A 0.5 –10 V 0 –25 0 25 50 75 100 125 150 Case Temperature Tc (°C) Forward Transfer Admittance vs. Drain Current 10 5 Tc = –25°C 2 1 0.5 25°C 0.2 0.1 75°C 0.05 0.02 0.01 –0.01 –0.03 –0.1 –0.3 Drain Current Reverse Recovery Time trr (ns) 100 Capacitance C (pF) 20 10 5 di / dt = –100 A / µs VGS = 0, Ta = 25°C 2 1 –0.1 Ciss 100 50 Coss 20 10 Crss 5 2 1 0 –0.3 –1 –3 –10 Reverse Drain Current IDR (A) 0 –10 –20 –30 –40 –50 Drain to Source Voltage VDS (V) Switching Characteristics 100 0 –40 –8 VGS VDS –12 VDD = –50 V –25 V –10 V 2 4 Gate Charge Rev.2.00, Oct.07.2007, page 4 of 7 –16 6 8 Qg (nC) –20 10 50 Switching Time t (ns) ID = –1 A –4 VGS –20 (V) VDD = –50 V –25 V –10 V Gate to Source Voltage VDS (V) ID (A) 200 Dynamic Input Characteristics Drain to Source Voltage –10 VGS = 0 f = 1 MHz 50 –100 0 –3 1000 500 –80 –1 Typical Capacitance vs. Drain to Source Voltage Body-Drain Diode Reverse Recovery Time –60 VDS = –10 V Pulse Test td(off) 20 10 5 2 1 –0.1 td(on) tr tf VGS = –10 V, VDS = –30 V Rg = 4.7 Ω, duty ≤ 1 % –1 Drain Current –10 ID (A) HAT1110R Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) –2.5 Pulse Test –2.0 –1.5 –1.0 –5 V –0.5 0 Normalized Transient Thermal Impedance γs (t) –10 V VGS = 0V, 5 V –0.4 –0.8 –1.2 Source to Drain Voltage –1.6 –2.0 VSD (V) Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation) 10 1 D=1 0.5 0.2 0.1 0.1 θch - f(t) = γs (t) x θch - f θch - f = 180°C/W, Ta = 25°C When using the glass epoxy board (FR4 40x40x1.6 mm) 0.05 0.02 0.01 0.01 lse pu t ho PDM D= 1s PW T PW T 0.001 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation) 10 1 D=1 0.5 0.2 0.1 0.1 θch - f(t) = γs (t) x θch - f θch - f = 230°C/W, Ta = 25°C When using the glass epoxy board (FR4 40x40x1.6 mm) 0.05 0.02 0.01 0.01 lse t ho PDM pu 1s D= PW T PW T 0.001 10 µ 100 µ Rev.2.00, Oct.07.2007, page 5 of 7 1m 10 m 100 m 1 10 Pulse Width PW (S) 100 1000 10000 HAT1110R Switching Time Test Circuit Vout Monitor Vin Monitor Rg Switching Time Waveform Vin 10% D.U.T. RL 90% Vin -10 V V DD = -30 V Vout td(on) Rev.2.00, Oct.07.2007, page 6 of 7 90% 90% 10% 10% tr td(off) tf HAT1110R Package Dimensions As of January, 2003 Unit: mm 3.95 4.90 5.3 Max 5 8 1 1.75 Max *0.22 ± 0.03 0.20 ± 0.03 4 0.75 Max + 0.10 6.10 – 0.30 1.08 *0.42 ± 0.08 0.40 ± 0.06 0.14 – 0.04 + 0.11 0˚ – 8˚ 1.27 + 0.67 0.60 – 0.20 0.15 0.25 M *Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8DA Conforms — 0.085 g Ordering Information Part Name HAT1110R-EL-E Quantity 2500 pcs Shipping Container Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.2.00, Oct.07.2007, page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. 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