INTERSIL IRFF9230

IRFF9230
Data Sheet
February 1999
-4.0A, -200V, 0.800 Ohm, P-Channel Power
MOSFET
File Number
2225.2
Features
• -4.0A, -200V
This P-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
• rDS(ON) = 0.800Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
Symbol
Formerly developmental type TA17512.
D
Ordering Information
PART NUMBER
IRFF9230
PACKAGE
TO-205AF
G
BRAND
IRFF9230
S
NOTE: When ordering, use the entire part number.
Packaging
JEDEC TO-205AF
DRAIN
(CASE)
SOURCE
GATE
4-114
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
IRFF9230
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
IRFF9230
-200
-200
-4.0
-16
±20
25
0.2
500
-55 to 150
UNITS
V
V
A
A
V
W
W/oC
mJ
oC
300
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
-200
-
-
V
Drain to Source Breakdown Voltage
BVDSS
ID = -250µA, VGS = 0V, (Figure 10)
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = -250µA
-2
-
-4
V
VDS = Rated BVDSS, VGS = 0V
-
-
-25
µA
-
-
-250
µA
-4.0
-
-
A
Zero Gate Voltage Drain Current
IDSS
VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC
On-State Drain Current (Note 2)
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
ID(ON)
IGSS
rDS(ON)
gfs
td(ON)
tr
Turn-Off Delay Time
td(OFF)
Fall Time
tf
Total Gate Charge
(Gate to Source + Gate to Drain)
Gate to Source Charge
Qg(TOT)
Qgs
VDS > ID(ON) x rDS(ON)MAX, VGS = -10V
VGS = ±20V
-
-
±100
nA
ID = -2.0A, VGS = -10V, (Figures 8, 9)
-
0.5
0.800
Ω
VDS > ID(ON) x rDS(ON)MAX, ID = -2.0A, (Figure 12)
2.2
3.5
-
S
VDD = 0.5BVDSS, ID ≈ -4.0A, RG = 9.1Ω,
RL = 2.5Ω for BVDSS = -200V
RL = 18.7Ω for BVDSS = -150V
(Figures 17, 18) MOSFET Switching Times are
Essentially Independent of Operating
Temperature
-
30
50
ns
-
50
100
ns
-
50
100
ns
-
40
80
ns
VGS = -10V, ID = -4.0A, VDS = 0.8 x Rated BVDSS,
IG(REF) = -1.5mA, (Figures 14, 19, 20)
Gate Charge is Essentially Independent of
Operating Temperature
-
31
45
nC
-
18
-
nC
-
13
-
nC
VDS = -25V, VGS = 0V, f = 1MHz, (Figure 11)
-
550
-
pF
Gate to Drain “Miller” Charge
Qgd
Input Capacitance
CISS
Output Capacitance
COSS
-
170
-
pF
Reverse Transfer Capacitance
CRSS
-
50
-
pF
-
5.0
-
nH
-
15
-
nH
-
-
5.0
oC/W
-
-
175
oC/W
Internal Drain Inductance
LD
Internal Source Inductance
LS
Measured From the Drain
Lead, 5mm (0.2in) From
Package to Center of Die
Modified MOSFET
Symbol Showing the Internal Devices
Measured From the Source Inductances
D
Lead, 5mm (0.2in) From
Header to Source Bonding
LD
Pad
G
LS
S
Thermal Resistance Junction to Case
RθJC
Thermal Resistance
Junction to Ambient
RθJA
4-115
Typical Socket Mount
IRFF9230
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Continuous Source to Drain Current
ISD
Pulse Source to Drain Current
(Note 3)
TEST CONDITIONS
Modified MOSFET Symbol
Showing the Integral
Reverse P-N Junction
Rectifier
ISM
MIN
TYP
MAX
-
-
-4.0
UNITS
A
-
-
-16
A
-
-
-1.5
V
-
400
-
ns
-
2.6
-
µC
D
G
S
Source to Drain Diode Voltage (Note 2)
Reverse Recovery Time
TC = 25oC, ISD = -4.0A, VGS = 0V, (Figure 13)
TJ = 150oC, ISD = -4.0A, dISD/dt = 100A/µs
TJ = 150oC, ISD = -4.0A, dISD/dt = 100A/µs
VSD
trr
Reverse Recovery Charge
QRR
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 46.9mH, RG = 25Ω, peak IAS = 4.0A (Figures 15, 16).
Typical Performance Curves
Unless Otherwise Specified
-5
ID, DRAIN CURRENT (A)
1.0
0.8
0.6
0.4
0.2
0
25
50
75
100
TC , CASE TEMPERATURE (oC)
125
-3
-2
-1
150
25
75
50
125
100
150
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
ZθJC, NORMALIZED
-4
0
0
TRANSIENT THERMAL IMPEDANCE
POWER DISSIPATION MULTIPLIER
1.2
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
1
0.5
0.2
0.1
PDM
0.1
0.05
t1
t2
0.02
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
0.01
SINGLE PULSE
0.01
10-5
10-4
10-3
10-2
10-1
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED TRANSIENT THERMAL IMPEDANCE
4-116
1
10
IRFF9230
Typical Performance Curves
Unless Otherwise Specified (Continued)
-100
-15
VGS = -10V
-10
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
OPERATION IN THIS AREA
IS LIMITED BY rDS(ON)
10µs
100µs
1ms
-1
10ms
100ms
TC = 25oC
TJ = MAX RATED
-0.1
-1
VGS = -8V
-12
VGS = -7V
-9
80µs PULSE TEST
VGS = -6V
-6
VGS = -5V
-3
VGS = -4V
DC
SINGLE PULSE
-10
-100
VDS, DRAIN TO SOURCE VOLTAGE (V)
0
-1000
0
-10
ID(ON), ON-STATE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
VGS = -10V
-9V
-8V
-9
-7V
-6
-6V
-3
-5V
-4V
-8
-4
-6
-2
VDS, DRAIN TO SOURCE VOLTAGE (V)
-12
TJ = 125oC
TJ = 25oC
-9
TJ = -55oC
-6
-3
0
-10
0
-2
-4
-6
-8
VGS, GATE TO SOURCE VOLTAGE (V)
2.5
VGS = -10V, ID = -2A
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 2µs
1.6
ON RESISTANCE (Ω)
-10
FIGURE 7. TRANSFER CHARACTERISTICS
2.0
rDS(ON), DRAIN TO SOURCE
-50
PULSE DURATION = 80µs
VDS ≥ I D(ON) x rDS(ON) MAX
FIGURE 6. SATURATION CHARACTERISTICS
1.2
VGS = - 10V
0.8
VGS = - 20V
0.4
0
-40
-15
PULSE DURATION = 80µs
0
-30
FIGURE 5. OUTPUT CHARACTERISTICS
-15
-12
-20
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
0
VGS = -9V
0
-5
-10
-15
-20
-25
ID, DRAIN CURRENT (A)
2.0
1.5
1.0
0.5
0
-40
0
40
80
120
TJ , JUNCTION TEMPERATURE (oC)
NOTE: Heating effect of 2µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
4-117
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
160
IRFF9230
Typical Performance Curves
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1.25
Unless Otherwise Specified (Continued)
2000
ID = -250µA
C, CAPACITANCE (pF)
1.15
1.05
0.95
0.85
0.75
-40
0
40
80
120
VGS = 0V, f = 1MHz
CISS = CGS + CGD
1600 CRSS = CGD
COSS ≈ CDS + CGD
1200
800
CISS
400
COSS
0
160
-10
0
TJ , JUNCTION TEMPERATURE (oC)
-30
-40
-50
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
7.0
-100
ISD, SOURCE TO DRAIN CURRENT (A)
PULSE DURATION = 80µs
5.6
TJ = -55oC
TJ = 25oC
4.2
TJ = 125oC
2.8
1.4
0
-3
-6
-9
-12
-15
-10
TJ = 150oC
TJ = 25oC
-1.0
-0.1
-0.4
-0.6
ID , DRAIN CURRENT (A)
-0.8
ID = -4A
-5
-10
VDS = -160V
VDS = -100V
VDS = -40V
-15
8
16
24
32
Qg(TOT), TOTAL GATE CHARGE (nC)
40
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
4-118
-1.2
-1.4
-1.6
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
0
0
-1.0
VSD, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
VGS, GATE TO SOURCE (V)
gfs, TRANSCONDUCTANCE (S)
-20
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
0
CRSS
-1.8
IRFF9230
Test Circuits and Waveforms
VDS
tAV
L
0
VARY tP TO OBTAIN
-
RG
REQUIRED PEAK IAS
+
VDD
DUT
0V
VDD
tP
VGS
IAS
IAS
VDS
tP
0.01Ω
BVDSS
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(OFF)
td(ON)
tr
0
RL
-
DUT
VGS
+
10%
10%
VDS
VDD
RG
tf
VGS
0
90%
90%
10%
50%
50%
PULSE WIDTH
90%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
-VDS
(ISOLATED
SUPPLY)
CURRENT
REGULATOR
0
VDS
DUT
12V
BATTERY
0.2µF
50kΩ
0.3µF
Qgs
Qg(TOT)
DUT
G
VGS
Qgd
D
VDD
0
S
IG(REF)
IG CURRENT
SAMPLING
RESISTOR
+VDS
ID CURRENT
SAMPLING
RESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
4-119
0
IG(REF)
FIGURE 20. GATE CHARGE WAVEFORMS
IRFF9230
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