Preliminary M61531FP 6ch Electronic Volume with 10 Input Selectors REJ03F0050-0110Z Rev.1.1 Jun.01.2004 Features Functions Features Electric volume 6 channel independent electric volume with high voltage transistor (0 to –99 dB/1 dB step, –∞ dB) Input selector L/R channel 10 input selector Multi channel input Tone Control All channel 2 input selector (1) Bass: –16 to +16 dB (2 dB step), Treble: –10 to +10 dB (2 dB step) (2) Tone block position is selectable (3) Tone input ATT (0/–6/–12/–18 dB) Loudness REC output Built-in loudness circuit of center tap type in L/Rch 4 Lines REC output (Both L and R channels) Input ATT Input gain control Input ATT (for ADC: 0/–6/–12/–18 dB) Input gain control (0/+6/+12/+18 dB) Output gain control Balance out Output gain control (0/+6/+12/+18 dB) Built-in balance out (for ADC) Bus control 3 wire control, 3 to 5V I/F support Application • Receiver, AV Amp, Mini Stereo etc. Recommended Operating Condition • Supply voltage range: AVCC = 7.0 V (Typ.), AVEE = –7.0 V (Typ.), DVDD = 2.7 to 5.5 V DGND 1 5 6 7 8 MCU I/F Tone 10 Input selector 4 Lch Multi Lin Tone Block Positionis selectable. Tone Input ATT 2 3 Multi Rin CLOCK DVDD AVEE AVCC REC OUTL LATCH DATA System Block Diagram Input Gain Control Bass&Treble Tone Output Gain Control Lout Bass&Treble Input Gain Control Output Gain Control Bass&Treble 9 Rout Bass&Treble 10 Tone Input ATT Input ATT (for ADC) 1 2 4 Rch 5 6 7 8 10 Input selector 3 Input ATT (for ADC) Loud L 9 10 Loud R REC OUTR Rev.1.1, Jun.01.2004, page 1 of 19 Multi SLin Balance Out L(+) Multi SR in Loud L / Balance Out L(-) Multi Cin Balance Out R(+) Multi Loud R / SWin Balance Out R(-) Input Gain Control Output Gain Control SLout Input Gain Control Output Gain Control SRout Input Gain Control Output Gain Control Cout Input Gain Control Output Gain Control SWout GND M61531FP Preliminary Cch SLOUT 41 SLch SROUT 42 SRch SRVIN 43 SWch Output Gain Control Cch VOL SWch VOL 23 SLIN2 LA TCH DATA CLK 22 SRIN2 Multi Input Selector 21 RIN2 SWch 20 LIN2 Input Gain Control Cch GND Rch Multi Input Selector Input Gain Control Output Gain Control Rch -1 SLch R2 SRch VOL TRE R 48 R2 Rch VOL Output Gain Control BASS L2 52 TRE L 53 R1 Rch Tone(Bass,Treble) BASS L1 51 Lch -1 L2 Loudness tap GND L/R VOL Input L3 Tone Input ATT L1 Output Gain Control Input Gain Control 16 GND LOUD L 15 /BALANCE L/− 14 BALANCE L/+ 13 GND 10 SLIN1 Input ATT Loudness tap LSELOUT 56 17 BALANCE R/+ 11 LIN1 Bypass/Tone L1 L3 L2 LOUD R 18 /BALANCE R/− 12 RIN1 Lch Bypass/Tone Lch VOL Loud /Balance 19 GND Rch R3 Tone Block Position Lch LVIN 55 GND Multi Input Selector L/R VOL Input Tone Input ATT Tone Block Position Loud /Balance Loudness tap SRch Input Gain Control Bypass/Tone Lch BASS R1 50 Multi Input Selector Input Gain Control Loudness tap BASS R2 49 25 SWIN2 26 DGND 27 CLOCK 28 DATA 29 LATCH 30 DVDD MCU I/F SLch VOL Output Gain Control RVIN 46 GND 57 24 CIN2 AVCC DVDD Input Gain Control RSELOUT 45 LOUT 54 31 AVCC GND Output Gain Control SRSELOUT 44 ROUT 47 32 GND 33 SWSELOUT 34 SWVIN 35 SWOUT 36 COUT 37 CVIN 38 CSELOUT 39 SLSELOUT 40 SLVIN Block Diagram and Pin Configuration (Top View) 9 SRIN1 Lch 8 SWIN1 GND R3 RECL1 58 R1 7 CIN1 Bypass/Tone Input ATT RECR1 59 GND 6 GND Rch 5 INR1/EXT INR RECL2 60 Bypass Selector RECR2 61 RECL3 62 4 INL1/EXT INL Rch Lch 3 INR2 2 INL2 RECR3 63 AVEE 1 INR3 Rev.1.1, Jun.01.2004, page 2 of 19 INL3 80 INR4 79 INL4 78 INR5 77 INL5 76 INR6 75 INL6 74 INR7 73 INL7 72 INR8 71 INL8 70 INR9 69 INL9 68 AVEE 67 INR10/RECR4 66 GND INL10/RECL4 65 GND 64 M61531FP Preliminary Pin Description Pin No. Pin Name Function 3, 1, 79, 77, 75, 73, 71, 69 INR2, 3, 4, 5, 6, 7, 8, 9 Input pin of R channel (Input Selector) 2, 80, 78, 76, 74, 72, 70, 68 4 INL2, 3, 4, 5, 6, 7, 8, 9 INL1/EXT INL Input pin of L channel (Input Selector) 5 6, 13, 16, 19, 32, 57, 64 INR1/EXT INR GND Input pin of L channel (Input Selector)/External Input pin(Rch) Analog Ground 7, 24 8, 25 CIN1/CIN2 SWIN1/SWIN2 Input pin of C channel (2 Input Selector) Input pin of SW channel (2 Input Selector) 9, 22 10, 23 SRIN1/SRIN2 SLIN1/SLIN2 Input pin of SR channel (2 Input Selector) Input pin of SL channel (2 Input Selector) 11, 20 12, 21 LIN1/LIN2 RIN1/RIN2 Input pin of L channel (2 Input Selector) Input pin of R channel (2 Input Selector) 14, 17 15, 18 BALANCE L/+, R/+ LOUD L/BALANCE L/–, LOUD R/BALANCE R/– Output pin of L/R channel Balance Output(+) Frequency characteristic setting pin of Loudness /Output pin of L/R channel Balance Output(–) 26 27, 28, 29 DGND CLOCK, DATA, LATCH Ground of internal logic circuit Input pin of control clock /data/ trigger 30 31 DVDD AVCC Power supply to internal logic circuit Positive power supply to internal analog circuit 33 34 SWSELOUT SWVIN Output pin of SW channel volume input selector Input pin of SW channel volume 35 36 SWOUT COUT Output pin of SW channel Output pin of C channel 37 38 CVIN CSELOUT Input pin of C channel volume Output pin of C channel volume input selector 39 40 SLSELOUT SLVIN Output pin of SL channel volume input selector Input pin of SL channel volume 41 42 SLOUT SROUT Output pin of SL channel Output pin of SR channel 43 44 SRVIN SRSELOUT Input pin of SR channel volume Output pin of SR channel volume input selector 45 46 RSELOUT RVIN Output pin of R channel volume input selector Input pin of R channel volume 47 51, 52, 50, 49 ROUT BASS L1, L2/BASS R1, R2 Output pin of R channel 53, 48 54 TRE L/TRE R LOUT Output pin of L channel 55 56 LVIN LSELOUT Input pin of L channel volume Output pin of L channel volume input selector 58, 60, 62/59, 61, 63 Output pin of REC (Lch and Rch) 65 REC L1, L2, L3 /REC R1, R2, R3 INL10/REC L4 66 67 INR10/REC R4 AVEE Rev.1.1, Jun.01.2004, page 3 of 19 Input pin of L channel (Input Selector)/External Input pin(Lch) Frequency characteristic setting pin of tone control (BASS) Frequency characteristic setting pin of tone control (TREBLE) Input pin of L channel (Input Selector)/Output pin of REC (Lch) Input pin of R channel (Input Selector)/Output pin of REC (Rch) Negative power supply to internal analog circuit M61531FP Preliminary Absolute Maximum Ratings Item Symbol Ratings Unit Test Condition Power supply Supply voltage ±8.0 V AVCC-AVEE Power dissipation Pd 6.0 1250 mW DVDD-GND Ta ≤ 25°C Thermal derating Operating temperature Kθ Topr 12.5 –20 to +55 mW/°C °C Storage temperature Tstg –40 to +125 °C Ta > 25°C Thermal Deratings (Maximum Rating) Power Dissipation Pd (W) 1.5 1.0 0.5 0 55 0 25 50 75 100 125 150 Ambient Temperature Ta (˚C) Recommended Operating Conditions (Ta = 25°C, unless otherwise noted) Item Symbol Min. Typ. Max. Unit Analog supply voltage (Positive) Analog supply voltage (Negative) AVCC AVEE 4.5 –7.5 7.0 –7.0 7.5 –4.5 V V Digital supply voltage Logic “H” level input voltage DVDD VIH 2.7 DVDD × 0.7 3.3 — 5.5 DVDD V V DGND reference Logic “L” level input voltage VIL DGND — DVDD × 0.2 V DGND reference Note: AVEE ≤ DGND < DVDD ≤ AVCC Rev.1.1, Jun.01.2004, page 4 of 19 Test Condition M61531FP Preliminary Relationship between Data and Clock LATCH SIGNAL H DATA D0 L D1 D21 D22 D23 D0 H CLOCK L H LATCH L DATA signal is read at the rising edge of CLOCK. Serial data (D0 – D23) is loaded at the rising edge of the LA TCH signal. Clock and Data Timings tSC tcr 75% CLOCK 25% 25% tr tf tWHC tWLC 75% DATA 25% tr tf tSD tHD tWHC tr tf tSL LATCH 75% 25% Timing Definition of Digital Block Item Symbol Min. Clock cycle time tcr 4 — — µs Clock pulse width (“H” level) Clock pulse width (“L” level) tWHC tWLC 1.6 1.6 — — — — µs µs Rising time of clock,data and latch Falling time of clock,data and latch tr tf — — — — 0.4 0.4 µs µs Data setup time Data hold time tSD tHD 0.8 0.8 — — — — µs µs Latch setup time Latch pulse width tSL tWHL 1 1.6 — — — — µs µs Clock setup time tSC 4 — — µs Rev.1.1, Jun.01.2004, page 5 of 19 Typ. Max. Unit Rev.1.1, Jun.01.2004, page 6 of 19 Slot3 Slot2 Slot1 Slot0 (3) (3) (3) (3) (4) (5) REC REC REC REC Multi L/R (2)Input ATT Output Output Output Output Input VOL 1 2 3 4 Selector Input (6) Input Gain Control (7) Output Gain Control (8) (9) INS10 All Ch /REC4 Output Selector Mute (10) (5) Multi L/R Input VOL Mute Input 0 0 1 0 (19)Rch Volume (19)Cch Volume 0 0 0 (19)SRch Volume (19)SWch Volume 0 0 1 (11)Tone Bass (11)Tone Treble (12) Tone Input ATT (13) (14) (15) (16) (17) Tone Loud/ Bypass Block Loud Balance L/R /Tone Position -ness Out Bypass 0 0 0 0 0 0 1 1 D0d D1d D2d D3d D4d D5d D6d D7d D8d D9d D10d D11d D12d D13d D14d D15d D16d D17d D18d D19d D20d D21d D22 D23 (19)SLch Volume D0c D1c D2c D3c D4c D5c D6c D7c D8c D9c D10c D11c D12c D13c D14c D15c D16c D17c D18c D19c D20c D21c D22 D23 (19)Lch Volume D0b D1b D2b D3b D4b D5b D6b D7b D8b D9b D10b D11b D12b D13b D14b D15b D16b D17b D18b D19b D20b D21b D22 D23 (1)Input Selector D0a D1a D2a D3a D4a D5a D6a D7a D8a D9a D10a D11a D12a D13a D14a D15a D16a D17a D18a D19a D20a D21a D22 D23 M61531FP Preliminary Data Control Specification Initialize all data of the 4 formats when digital power supply (DVDD) turn on. Prohibit using except specified data code as follows. M61531FP Preliminary Setting Code (1) Input Selector (2) Input ATT Setting D0a D1a D2a D3a Setting D4a D5a All off 0 0 0 IN1 0 0 0 0 0 dB 0 0 1 –6 dB 0 IN2 IN3 0 0 0 0 1 1 1 0 1 –12 dB –18 dB 1 1 0 1 IN4 IN5 0 0 1 1 0 0 0 1 IN6 (3) REC Output 0 1 1 0 REC Output REC1 REC2 REC3 REC4 IN7 0 1 1 1 Setting D6a D7a D8a D9a IN8 1 0 0 0 Off 0 0 0 0 IN9 1 0 0 1 On 1 1 1 1 IN10 1 0 1 0 (4) Multi Input Selector (Except for L/R) (5) L/R VOL Input (6) Input Gain Control Setting D10a Setting D11a D19a Setting D12a D13a Multi IN1 0 Bypass 0 ∗ 0 dB 0 0 Multi IN2 1 Multi IN1 1 0 +6 dB 0 1 Multi IN2 1 1 +12 dB 1 0 +18 dB 1 1 (7) Output Gain Control (8) IN10/REC4 Selector (9) All Ch Output Mute Setting D14a D15a Setting D16a Setting D17a 0 dB +6 dB 0 0 0 1 IN10 REC4 0 1 Mute off Mute on 0 1 +12 dB +18 dB 1 1 0 1 (10)Multi Input Mute (Except for L/R) (12)Tone Input ATT Setting D18a Setting D9d D10d Setting D11d Mute off Depend 0 0 dB 0 0 Bypass 0 –6 dB 0 1 Tone 1 –12 dB 1 0 –18 dB 1 1 on (4) Multi Input Mute on 1 Note: (//////) It’s initial setting when power is turned on. Rev.1.1, Jun.01.2004, page 7 of 19 (13)Bypass/Tone M61531FP Preliminary Setting Code (cont.) (11)Tone Control (Bass/Treble) ATT Setting (14)Tone Block Position Bass D0d Treble D1d D2d D3d D4d Setting D12d — D5d D6d D7d D8d Before VOL 0 +16 dB* 1 0 0 0 0 After VOL 1 +14 dB* +12 dB* 0 0 1 1 1 1 1 1 1 0 (15)Loudness +10 dB 0 1 1 0 1 Setting D13d +8 dB 0 1 1 0 0 Off 0 +6 dB 0 1 0 1 1 On 1 +4 dB +2 dB 0 0 1 1 0 0 1 0 0 1 (16)Loud/Balance 0 0 0 0 0 0 Setting D14d –2 dB 0 0 0 0 1 Balance output 0 –4 dB 0 0 0 1 0 Loudness 1 –6 dB 0 0 0 1 1 –8 dB 0 0 1 0 0 (17)L/R Bypass –10 dB 0 0 1 0 1 Setting D15d –12 dB* 0 0 1 1 0 Selector 0 –14 dB* 0 0 1 1 1 External IN 1 –16 dB* 0 1 0 0 0 Note: (//////) It’s initial setting when power is turned on. * Only bypass setting (18)6 channel Volume Lch ATT 0 dB D0b D1b D2b D3b D4b D5b D6b Lch D0b D1b D2b D3b D4b D5b D6b SLch D0c D1c D2c D3c D4c D5c D6c SLch D0c D1c D2c D3c D4c D5c D6c Rch D7b D8b D9b D10b D11b D12b D13b Rch D7b D8b D9b D10b D11b D12b D13b SRch D7c D8c D9c D10c D11c D12c D13c SRch D7c D8c D9c D10c D11c D12c D13c Cch D14b D15b D16b D17b D18b D19b D20b Cch D14b D15b D16b D17b D18b D19b D20b SWch D14c D15c D16c D17c D18c D19c D20c ATT SWch D14c D15c D16c D17c D18c D19c D20c 0 0 0 0 0 0 0 –16 dB 0 0 1 0 0 0 0 0 0 1 0 0 0 1 –1 dB 0 0 0 0 0 0 1 –17 dB –2 dB 0 0 0 0 0 1 0 –18 dB 0 0 1 0 0 1 0 –3 dB 0 0 0 0 0 1 1 –19 dB 0 0 1 0 0 1 1 0 0 1 0 1 0 0 –4 dB 0 0 0 0 1 0 0 –20 dB –5 dB 0 0 0 0 1 0 1 –21 dB 0 0 1 0 1 0 1 –6 dB 0 0 0 0 1 1 0 –22 dB 0 0 1 0 1 1 0 0 0 1 0 1 1 1 –7 dB 0 0 0 0 1 1 1 –23 dB –8 dB 0 0 0 1 0 0 0 –24 dB 0 0 1 1 0 0 0 0 0 1 1 0 0 1 –9 dB 0 0 0 1 0 0 1 –25 dB –10 dB 0 0 0 1 0 1 0 –26 dB 0 0 1 1 0 1 0 –11 dB 0 0 0 1 0 1 1 –27 dB 0 0 1 1 0 1 1 0 0 1 1 1 0 0 –12 dB 0 0 0 1 1 0 0 –28 dB –13 dB 0 0 0 1 1 0 1 –29 dB 0 0 1 1 1 0 1 –14 dB 0 0 0 1 1 1 0 –30 dB 0 0 1 1 1 1 0 1 –31 dB 0 0 1 1 1 1 1 –15 dB 0 0 0 1 Rev.1.1, Jun.01.2004, page 8 of 19 1 1 M61531FP Preliminary Setting Code (cont.) (18)6 channel Volume (cont.) Lch ATT D0b D1b D2b D3b D4b D5b D6b Lch D0b D1b D2b D3b D4b D5b D6b SLch D0c D1c D2c D3c D4c D5c D6c SLch D0c D1c D2c D3c D4c D5c D6c Rch D7b D8b D9b D10b D11b D12b D13b Rch D7b D8b D9b D10b D11b D12b D13b SRch D7c D8c D9c D10c D11c D12c D13c SRch D7c D8c D9c D10c D11c D12c D13c Cch D14b D15b D16b D17b D18b D19b D20b Cch D14b D15b D16b D17b D18b D19b D20b D14c D15c D16c D17c D18c D19c D20c ATT D14c D15c D16c D17c D18c D19c D20c –32 dB 0 1 0 0 0 0 0 –67 dB 1 0 0 0 0 1 1 –33 dB 0 1 0 0 0 0 1 –68 dB 1 0 0 0 1 0 0 –34 dB 0 1 0 0 0 1 0 –69 dB 1 0 0 0 1 0 1 –35 dB 0 1 0 0 0 1 1 –70 dB 1 0 0 0 1 1 0 –36 dB 0 1 0 0 1 0 0 –71 dB 1 0 0 0 1 1 1 –37 dB 0 1 0 0 1 0 1 –72 dB 1 0 0 1 0 0 0 –38 dB 0 1 0 0 1 1 0 –73 dB 1 0 0 1 0 0 1 –39 dB 0 1 0 0 1 1 1 –74 dB 1 0 0 1 0 1 0 –40 dB 0 1 0 1 0 0 0 –75 dB 1 0 0 1 0 1 1 –41 dB 0 1 0 1 0 0 1 –76 dB 1 0 0 1 1 0 0 –42 dB 0 1 0 1 0 1 0 –77 dB 1 0 0 1 1 0 1 –43 dB 0 1 0 1 0 1 1 –78 dB 1 0 0 1 1 1 0 –44 dB 0 1 0 1 1 0 0 –79 dB 1 0 0 1 1 1 1 –45 dB 0 1 0 1 1 0 1 –80 dB 1 0 1 0 0 0 0 –46 dB 0 1 0 1 1 1 0 –81 dB 1 0 1 0 0 0 1 –47 dB 0 1 0 1 1 1 1 –82 dB 1 0 1 0 0 1 0 –48 dB 0 1 1 0 0 0 0 –83 dB 1 0 1 0 0 1 1 –49 dB 0 1 1 0 0 0 1 –84 dB 1 0 1 0 1 0 0 –50 dB 0 1 1 0 0 1 0 –85 dB 1 0 1 0 1 0 1 –51 dB 0 1 1 0 0 1 1 –86 dB 1 0 1 0 1 1 0 –52 dB 0 1 1 0 1 0 0 –87 dB 1 0 1 0 1 1 1 –53 dB 0 1 1 0 1 0 1 –88 dB 1 0 1 1 0 0 0 –54 dB 0 1 1 0 1 1 0 –89 dB 1 0 1 1 0 0 1 –55 dB 0 1 1 0 1 1 1 –90 dB 1 0 1 1 0 1 0 –56 dB 0 1 1 1 0 0 0 –91 dB 1 0 1 1 0 1 1 –57 dB 0 1 1 1 0 0 1 –92 dB 1 0 1 1 1 0 0 –58 dB 0 1 1 1 0 1 0 –93 dB 1 0 1 1 1 0 1 –59 dB 0 1 1 1 0 1 1 –94 dB 1 0 1 1 1 1 0 –60 dB 0 1 1 1 1 0 0 –95 dB 1 0 1 1 1 1 1 –61 dB 0 1 1 1 1 0 1 –96 dB 1 1 0 0 0 0 0 –62 dB 0 1 1 1 1 1 0 –97 dB 1 1 0 0 0 0 1 –63 dB 0 1 1 1 1 1 1 –98 dB 1 1 0 0 0 1 0 –64 dB 1 0 0 0 0 0 0 –99 dB 1 1 0 0 0 1 1 –65 dB 1 0 0 0 0 0 1 –∞ dB 1 1 1 1 0 0 0 –66 dB 1 0 0 0 0 1 0 SWch Note: (//////) It’s initial setting when power is turned on. Rev.1.1, Jun.01.2004, page 9 of 19 SWch M61531FP Preliminary Electrical Characteristics Unless otherwise noted, Ta = 25°C, AVCC = 7 V, AVEE = –7 V, DVDD = 3.3 V, f = 1 kHz, Volume = 0 dB, Input Selector = IN1, Input ATT = 0 dB, Input Gain Control = 0 dB, Output Gain Control = 0 dB, L/R Volume Input = Bypass, Multi Input Selector = Multi IN1, Tone = 0 dB, Tone Input ATT = 0 dB, Bypass/Tone = Bypass, Tone Position = Before Vol, Loudness = OFF, Loud/Balance = Balance, L/R Bypass = Selector (1) Power supply characteristics Item Symbol Min. Typ. Max. Unit Test Condition Analog positive power circuit current AIcc — 50 70 mA With AVCC = 7 V and AVEE = –7 V, Pin31 pin current, when no signal is provided Analog negative power circuit current AIee –70 –50 — mA With AVCC = 7 V and AVEE = –7 V, Pin67 pin current, when no signal is provided Digital power circuit current DIdd — 3 6 mA With DVDD = 3.3 V, Pin30 pin current, when no signal is provided (2) Input/Output characteristics (Over all) Item Symbol Min. Typ. Max. Unit Test Condition Input resistance Rin 35 47 65 kΩ 1 to 5, 65, 66, 68 to 80pin When each selector chooses a terminal concerned. Maximum output voltage Pass gain VOM 3.6 4.2 — Vrms (4, 5, 7, 8, 9, 10)pin input, (54, 47, 36, 35, 42, 41) pin output, THD = 1%, RL = 10 kΩ, Output Gain Control = +12 dB setting Gv –2.0 0 2.0 dB (4, 5, 7, 8, 9, 10) pin input, (54, 47, 36, 35, 42, 41) pin output, Vi = 0.3 Vrms, FLAT Total harmonic distortion THD1 — 0.005 0.05 % (4, 5, 7, 8, 9, 10) pin input, (54, 47, 36, 35, 42, 41) pin output, BW:400 Hz to 30 kHz, f = 1kHz, Vo = 0.3 Vrms, RL = 10 kΩ THD2 — 0.03 0.1 CBAL –0.5 0 0.5 dB (4, 5) pin input, (54, 47) pin output, Vi = 0.3 Vrms, JIS-A Vono — 1.5 6 µVrms Output gain control = 0 dB — 9 20 JIS-A, (4, 5, 7, 8, 9, 10) pin:Rg = 0 Ω, (54, 47, 36, 35, 42, 41) pin output, Volume = –∞ dB setting — 2.5 8 Output gain control = 0 dB — 12 25 JIS-A, (4, 5, 7, 8, 9, 10) pin:Rg = 0 Ω, (54, 47, 36, 35, 42, 41) pin output, Volume = 0 dB setting — 5 10 JIS-A, (4, 5) pin:Rg = 0 Ω, (14, 15, 17, 18) pin output CS1 — –90 –70 CS2 — –90 –70 CT1 (L/R) — –90 –70 CT2 (Multi Input) — –90 –70 Balance of mutual channels Output noise voltage (4, 5, 7, 8, 9, 10) pin input, (54, 47, 36, 35, 42, 41) pin output, BW: 400 Hz to 30 kHz, f = 1 kHz, Vo = 2 Vrms, RL = 10 kΩ (VOL = –∞ dB) Vono (VOL = 0 dB) Vonobal Output gain control = +12 dB Output gain control = +12 dB (Balance out) Input/Multi selector channel separation Cross talk of mutual channels Rev.1.1, Jun.01.2004, page 10 of 19 dB <Input Selector> (54, 47) pin output, Vo = 1 Vrms, Rg = 0 Ω, RL = 10 kΩ, JIS-A <Multi Input Selector> (35, 36, 41, 42, 47, 54) pin output, Vo = 1 Vrms, Rg = 0 Ω, RL = 10 kΩ, JIS-A, L/R VOL Input = Multi input dB (4, 5) pin input, (47, 54) pin output, Vo = 1 Vrms, Rg = 0 Ω, RL = 10 kΩ, JIS-A (7, 8, 9, 10, 11, 12) pin input, (35, 36, 41, 42, 47, 54) pin output, Vo = 1 Vrms, Rg = 0 Ω, RL = 10 kΩ, JIS-A, L/R VOL Input = Multi input M61531FP Preliminary (3) 6 channel Volume characteristics Item Symbol Min. Typ. Max. Unit Test Condition Maximum attenuation ATTmax — –100 –95 dB (35, 36, 41, 42, 47, 54) pin output, Vi = 2 Vrms, JIS-A, VOL = –∞ Volume gain gang error of mutual channels Dvol –0.5 0 +0.5 dB (35, 36, 41, 42, 47, 54) pin output, Volume = 0 dB setting (4) Tone control characteristics Unless otherwise noted, Bypass/Tone = Tone, (1, 2) PIN Input, (56, 45) PIN Output Item Symbol Min. Typ. Max. Unit Test Condition Tone control voltage gain (Boost/Bass) Tone control voltage gain (Cut/Bass) G(BASS)B +14 +16 +18 dB f = 100 Hz, Bass +16 dB setting G(BASS)C –18 –16 –14 dB f = 100 Hz, Bass –16 dB setting Tone control voltage gain (Boost/Treble) Tone control voltage gain (Cut/Treble) Balance of mutual channels G(TRE)B +8 +10 +12 dB f = 10 kHz, Treble +10 dB setting G(TRE)C –12 –10 –8 dB f = 10 kHz, Treble –10 dB setting BALT –2 0 +2 dB Bass setting +16, –16 dB, Treble setting +10, –10 dB Rev.1.1, Jun.01.2004, page 11 of 19 Rev.1.1, Jun.01.2004, page 12 of 19 69 71 73 75 77 79 1 3 5 47k 47k 47k 6 13 19 32 57 64 18 SRIN2 22 SRIN1 9 SLIN2 23 SLIN1 10 LI N2 20 LI N1 11 − RIN2 21 RIN1 12 CIN2 24 CIN1 7 26 31 Input Gain Control Input Gain Control Input Gain Control Input Gain Control Input Gain Control Tone Input ATT 0/-6/-12/-18dB 44 R3 46 Tone Block Position Tone Bypass 48 49 50 Rch TONE BASS:-16~+16dB TREBLE:-10~+10dB 0~-99dB,mute Rch VOL 0~-99dB,mute 37 Cch VOL 0~-99dB,mute 34 SWch VOL Bypass 0~-99dB,mute 0~-99dB,mute 43 SRch VOL Loudness tap 0/+6/+12/+18dB 45 0/+6/+12/+18dB 38 0/+6/+12/+18dB 33 0/+6/+12/+18dB 51 Lch Tone VOL 0~-99dB,mute 40 SLch 0/+6/+12/+18dB VOL 39 L3 55 52 L2 Output Gain Control 54 LOUT LATCH DATA CLOCK SLOUT SROUT SWOUT COUT R2 Output Gain Control 0/+6/+12/+18dB 47 ROUT Output Gain Control 0/+6/+12/+18dB 36 Output Gain Control 0/+6/+12/+18dB 35 Output Gain Control 0/+6/+12/+18dB 42 Output Gain Control 0/+6/+12/+18dB 41 0/+6/+12/+18dB 29 28 27 Lch TONE BASS:-16~+16dB TREBLE:-10~+10dB 53 MCU I/F Loudness tap 0/+6/+12/+18dB 56 Tone Block Position 67 Tone Input ATT 0/-6/-12/-18dB Input Gain Control from R1 L/R VOL Input 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k L/R VOL Input from L1 R3 30 DVDD AV CC AV EE -7V DGND +3.3V +7V Loudness tap 17 + Rch Balance out SWIN2 25 SWIN1 8 L3 Bypass/Tone Multi Input Selector Input ATT 0/-6/-12/-18dB 16 GND Loud /Balance Loudness tap 15 14 + Bypass/Tone R1 L1 Loud /Balance − from R2 GND GND GND GND GND GND 47k 47k 47k RchBypass Selector REC SW from L2 Input ATT 0/-6/-12/-18dB REC SW 59 61 63 47k 47k 47k 47k 47k 47k 47k 47k Input Selector Input Selector Lch Bypass Selector 47k RECR3 RECR2 RECR1 66 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k INR10 /RECR4 INR9 INR8 INR7 INR6 INR5 INR4 INR3 INR2 INR1 /EXT INR INL10 /RECL4 65 INL9 68 INL8 70 INL7 72 INL6 74 INL5 76 INL4 78 INL3 80 INL2 2 INL1 4 /EXT INL RECL3 RECL2 RECL1 58 60 62 Lch Balance out M61531FP Preliminary Internal Block Diagram M61531FP Preliminary Application Block Diagram <TONE CONTROL> Tone Block Position is e slectable. Balance Output (for ADC) [1]Before VOL setting (D11d=1,D12d=0) Loudness Tap Input ATT (for ADC) Multi Input PIN Multi Selector Volume Input Selector Input Gain Control Tone Input ATT Output Gain Control Tone Bass&Treble REC Output •Rg=47k Ω (Incase of when more than3ch is used at the same time.) •Rg=10k Ω (Incase of when less than 2ch is used at the sa me time.) [2]Af ter VOL setting (D11d=1,D12d=1) Balance Output (for ADC) Loudness Tap Input ATT (for ADC) Multi Input PIN Multi Selector Volume Input Selector Input Gain Control Tone Input ATT Tone Bass&Treble REC Output •Rg=47kΩ (Incase of when more than3ch is used at the same time.) •Rg=10kΩ (Incase of when less than 2ch is used at the same time.) Rev.1.1, Jun.01.2004, page 13 of 19 Output Gain Control M61531FP Preliminary Balance Output (for ADC) [3] Bypass setting (D11d=0,D12d=*) Loudness Tap Input ATT (for ADC) Multi Input PIN Multi Selector Volume Input Selector Input Gain Control Tone Input ATT Tone Bass&Treble REC Output • Rg=47kΩ(In case of when more than 3ch is used at the same time.) • Rg=10kΩ(In case of when less than 2ch is used at the same time.) Rev.1.1, Jun.01.2004, page 14 of 19 Output Gain Control M61531FP Preliminary (1)Bass <Boost> IN OUT R3 R2 1 f0 = 2π R1(R2+R3)C1C2 (Hz) (R2+R3)R1C1C2 C1 Q= C2 R1(C1+C2)+R3C1 R1 Gv= 20 lo g R1(C1+C2)+(R2+R3)C1 R1(C1+C2)+R3C1 [Desig ned Para mete r ] R1=4 .7 kΩ, C1= 0. 22 µF, C2=0. 047µF Designed Parameter Gain Sett ing R3(kΩ ) R2(kΩ ) +16dB 3. 5 48.7 +14dB 5. 8 46.3 +12dB 8. 8 43.3 +10dB 12.6 39.5 +8dB 34.8 17.3 +6dB 28.8 23.3 +4dB 21.3 30.8 +2dB 11.9 40.2 (d B) <Cut> [Des igned Para meter ] R1=4.7 kΩ , C1=0. 22µF, C2=0.047µF Desi gned Parameter Gain Sett ing R3(kΩ ) R2(kΩ ) -1 6dB 3. 5 48.7 -1 4dB 5. 8 46.3 -1 2dB 8. 8 43.3 -1 0dB 12.6 39.5 -8 dB 34.8 17.3 28.8 -6 dB 23.3 21.3 -4 dB 30.8 11.9 -2 dB 40.2 IN OUT R2 C2 f0 = 1 2π R1(R2+R3)C1C2 (Hz) R1 (R2+R3)R1C1C2 Q= R1(C1+C2)+R3 C1 Gv= 20 log Rev.1.1, Jun.01.2004, page 15 of 19 R1(C1+C2)+R3C1 R1(C1+C2)+(R2+R3)C1 (d B) R3 C1 M61531FP Preliminary (2)Treble <Boost> IN OUT [Desig ned Para mete r ] RC =2200pF Gain Settin g R5 R4 (R4+R5)2 + RC2 Gv = 20log R4 2 +RC 2 (dB) RC +10dB +8dB +6dB +4dB +2dB Desi gned Parameter R4(kΩ ) R 5(kΩ ) 7. 6 24.7 11.0 21.3 14.9 17.4 19.6 12.7 7. 0 25.3 <Cut> IN Gv = 20log (R4+R5)2 + RC2 R5 OUT [Desig ned Para mete r ] RC =2200pF Desi gned Parameter Gain Setting R4(kΩ ) R 5(kΩ ) 7. 6 - 10dB 24.7 11.0 21.3 -8 dB 14.9 17.4 -6 dB 19.6 12.7 -4 dB 7. 0 25.3 -2 dB R4 RC <Curve of characteristics> +20dB Tone gain Gv (dB) +10dB 0dB -10dB -20dB 100 1k frequency f(Hz) Rev.1.1, Jun.01.2004, page 16 of 19 R4 2+RC 2 10k (dB) M61531FP Preliminary Balance Output/Loudness Can be chose “Balance output” for external A/D converter or “Loudness” function by MCU command. “Balance output” and “Loudness” function can not be used at the same time. (1) Balance output The M61531FP has Balance output (L/R channel) for external A/D converter. Loud/Balance = Balance Output setting Input gain control Tone amp To loudness tap in volume block B L Loud/Balance Balance output setting In this setting, Loudness function is not provided. A/D converter (2) Loudness The M61531FP has center tap type Loudness circuit in L/Rch volume block. Loud/Balance = Loudness setting L/RchVolume <A characteristic curve> (ATT=-16dB point) connect to loudness tap B L Loud/Balance Loudness setting Loudness capacitor the frequency establishment Loudness switch Tone output gain Gv (dB) 0 Output gain control -5dB -10 -20 -30 100 In this setting, Balance output function is not provided. Rev.1.1, Jun.01.2004, page 17 of 19 1k Frequency f(Hz) 10k M61531FP Preliminary Application Example AV CC DVDD 7V 3.3V C SW SWIN2 0.1u 0.1u MCU Output Gain Control 21 31 20 Input Gain Control Cch GND Rch Multi Input Selector Input Gain Control Output Gain Control Rch -1 Input Gain Control Loudness tap R2 Rch VOL Output Gain Control 50 R1 53 Tone Input ATT Tone Block Position Output Gain Control 16 -1 15 Loudness tap 14 + GND 13 L2 55 Lch VOL Input Gain Control 12 11 Bypass/Tone L1 10 L3 L2 Input ATT Loudness tap 56 Loud /Balance Lch Bypass/Tone 19 GND Loud /Balance L/R VOL Input L3 Lch 9 Lch 8 GND R3 58 R1 7 Bypass/Tone Input ATT 59 GND 5 60 Bypass Selector 61 4 Rch Lch 3 2 63 AVEE 1 Rev.1.1, Jun.01.2004, page 18 of 19 80 79 2.2u 2.2u INL3 2.2u INR4 78 77 2.2u INL4 2.2u INR5 76 75 2.2u INL5 2.2u INR6 74 73 2.2u INL6 2.2u INR7 2.2u 72 71 70 2.2u INL7 2.2u INR8 0.1u 100u 69 68 2.2u INL8 INR10 /RECR4 AV EE -7V INR9 2.2u INL9 2.2u INL10 /RECL4 65 64 2.2u RIN1 2.2u LI N1 2.2u SLIN1 2.2u SRIN1 2.2u SWIN1 2.2u CIN1 6 Rch 62 LI N2 Rch R3 Tone Input ATT 2.2u + Tone Block Position L1 RIN2 Lch Multi Input Selector L/R VOL Input Lch 52 Rch Tone(Bass,Treble) 51 Bypass/Tone SRIN2 2.2u 17 SRch Input Gain Control SLIN2 2.2u Loudness tap R2 Multi Input Selector CIN2 2.2u 18 SLch SRch VOL 49 25 22 SWch 46 57 23 LA TCH DATA CLK Multi Input Selector SLch VOL 45 54 MCU I/F 2.2u ADC 44 47 32 33 34 35 SWch VOL 67 4.7u 4.7u 36 37 38 Cch VOL 24 AVCC DVDD Input Gain Control 66 RECR3 43 GND Output Gain Control GND 4.7k 0.047u 0.22u 0.22u 0.047u 2200p RECL3 4.7u 4.7u RECR2 4.7u RECL2 4.7u RECR1 4.7u RECL1 42 SRch SWch - L 41 Output Gain Control 48 4.7u 4.7k 2200p R Cch SLch - 4.7u 4.7u 4.7u SR 39 40 4.7u 4.7u SL DGND 100u 100u 26 4.7u 27 4.7u 28 4.7u 29 4.7u 30 4.7u 2.2u 2.2u 2.2u 2.2u 2.2u INR1/ EXT INR INL1 / EXT INL INR2 INL2 INR3 y e b 40 x 41 24 65 64 25 HD D JEDEC Code — 1 80 EIAJ Package Code QFP80-P-1420-0.80 E M F Weight(g) 1.58 A Detail F Lead Material Alloy 42 L1 c L b2 I2 MD ME A A1 A2 b c D E e HD HE L L1 x y Dimension in Millimeters Min Nom Max 3.05 — — 0.1 0.2 0 2.8 — — 0.3 0.35 0.45 0.13 0.15 0.2 13.8 14.0 14.2 19.8 20.0 20.2 0.8 — — 16.5 16.8 17.1 22.5 22.8 23.1 0.4 0.6 0.8 1.4 — — — — 0.2 0.1 — — 0˚ 10˚ — 0.5 — — 1.3 — — 14.6 — — — — 20.6 Recommended Mount Pad Symbol I2 MD Plastic 80pin 14 × 20mm body QFP e b2 MMP A2 Rev.1.1, Jun.01.2004, page 19 of 19 A1 ME 80P6N-A M61531FP Preliminary Package Dimensions HE Sales Strategic Planning Div. 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