19-5621; Rev 0; 11/10 12V/5V Hot-Plug Switch The MAX34561 is a dual, self-contained, hot-plug switch intended to be used on +12V and +5V power rails to limit through current and to control the power-up output-voltage ramp. The device contains two on-board n-channel power MOSFETs that are actively closed-loop controlled to ensure that an adjustable current limit is not exceeded. The maximum allowable current through the device is adjusted by external resistors connected between the LOAD and ILIM pins. The device can control the power-up output-voltage ramp. Capacitors connected to the VRAMP pins set the desired voltage-ramp rate. The output voltages are unconditionally clamped to keep input overvoltage stresses from harming the load. The device also contains adjustable power-up timers. Capacitors connected to the TIMER pins determine how long after power-on reset (POR) the device should wait before starting to apply power to the loads. The TIMER pins can be driven with a digital logic output to create a device-enable function. The device contains an on-board temperature sensor with hysteresis. If operating conditions cause the device to exceed an internal thermal limit, the device either unconditionally shuts down and latches off awaiting a POR, or waits until the device has cooled by the hysteresis amount and then restarts. Features S Completely Integrated Hot-Plug Functionality for +12V and +5V Power Rails S Dual Version of the DS4560 S On-Board Power MOSFETs (68mI and 43mI) S No High-Power RSENSE Resistors Needed S Adjustable Current Limits S Adjustable Output-Voltage Slew Rates S Adjustable Power-Up Enable Timing S Output Overvoltage Limiting S On-Board Thermal Protection S On-Board Charge Pump S User-Selectable Latchoff or Automatic Retry Operation Ordering Information PART TEMP RANGE PIN-PACKAGE MAX34561T+ -40NC to +85NC 24 TQFN-EP* MAX34561T+T -40NC to +85NC 24 TQFN-EP* +Denotes a lead(Pb)-free/RoHS compliant package. T = Tape and reel. *EP = Exposed pad. Applications RAID/Hard Drives Servers/Routers PCI/PCI ExpressM InfiniBandTM/SM Base Stations PCI Express is a registered trademark of PCI-SIG Corp. InfiniBand is a trademark and service mark of InfiniBand Trade Association. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX34561 General Description MAX34561 12V/5V Hot-Plug Switch ABSOLUTE MAXIMUM RATINGS Voltage Range on VCC5 Relative to GND.............-0.3V to +6.5V Voltage Range on VCC12 Relative to GND............-0.3V to +18V Voltage Range on ILIM5, VRAMP5, TIMER5, ARD5 Relative to GND..........-0.3V to (VCC5 + 0.3V), not to exceed +6.5V Voltage Range on ILIM12, VRAMP12 Relative to GND................................. -0.3V to (VCC12 + 0.3V), not to exceed +18V Voltage Range on TIMER12, ARD12 Relative to GND........................................-0.3V to +5V (VREG) 5V Drain Current Continuous.............................................................................2A Peak.......................................................................................4A 12V Drain Current Continuous.............................................................................2A Peak.......................................................................................4A Continuous Power Dissipation (TA = +70NC) TQFN (derate 20.8mW/NC above +70NC)................1666.7mW Operating Junction Temperature Range.......... -40NC to +135NC Operating Temperature Range........................... -40NC to +85NC Storage Temperature Range ........................... -55NC to +135NC Lead Temperature (soldering, 10s).................................+300NC Soldering Temperature (reflow).......................................+260NC Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS (TJ = -40NC to +135NC) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 4.0 5.0 5.5 V 9 12 13.2 V 400 I 0.04 5 FF 0.04 5 FF VCC5 Voltage VCC5 (Notes 1, 2) VCC12 Voltage VCC12 (Notes 1, 2) RILIM_ Value RILIM_ 20 CVRAMP_ Value CVRAMP_ CTIMER_ Value CTIMER_ TIMER_ Turn-On Voltage VON TIMER_ Turn-Off Voltage VOFF TIMER5 2.1 TIMER12 2.6 VCC5 + 0.3 5.0 -0.3 +1.5 V V ELECTRICAL CHARACTERISTICS (VCC5 = +5V, VCC12 = +12V, TJ = +25NC, unless otherwise noted.) TYP MAX UNITS VCC5 Supply Current PARAMETER SYMBOL ICC5 (Note 3) CONDITIONS MIN 1.5 2 mA VCC12 Supply Current ICC12 (Note 3) 1.5 2.25 mA 5V UVLO: Rising VUR5 3.7 3.95 V 5V UVLO: Falling VUF5 5V UVLO: Hysteresis VUH5 0.5 12V UVLO: Rising VUR12 8 12V UVLO: Falling VUF12 12V UVLO: Hysteresis VUH12 1 5V On-Resistance RON5 43 56 mI 12V On-Resistance RON12 68 88 mI 5V Internal Voltage Reference VREF5 1.80 V 12V Internal Voltage Reference VREF12 2.35 V 2 2.7 6.5 3.2 V V 8.5 7 V V V 12V/5V Hot-Plug Switch MAX34561 ELECTRICAL CHARACTERISTICS (continued) (VCC5 = +5V, VCC12 = +12V, TJ = +25NC, unless otherwise noted.) PARAMETER SYMBOL 5V MOSFET Output Capacitance COUT (Note 4) 400 pF 12V MOSFET Output Capacitance COUT (Note 4) 400 pF 5V and 12V Delay Time from Enable to Beginning of Conduction tPOND CVRAMP_ = 1FF 8 ms 5V and 12V Gate-Charging Time from Conduction to 90% of VOUT tGCT Shutdown Junction Temperature Thermal Hysteresis CONDITIONS MIN TYP MAX UNITS CVRAMP_ = 1FF, CLOAD_ = 1000FF 48 64 80 ms TSHDN (Note 4) 120 135 150 NC THYS (Note 4) 40 NC TIMER_ Charging Current ITIMER 64 80 96 FA VRAMP_ Charging Current IVRAMP 64 80 96 FA 5V Overvoltage Clamp VOVC5 5.5 6.0 6.5 V 12V Overvoltage Clamp VOVC12 13.2 15 16.5 V 5V Power-On Short-Circuit Current Limit ISCL5 RILIM5 = 47I (Note 5) 0.6 1.0 1.5 A 12V Power-On Short-Circuit Current Limit ISCL12 RILIM12 = 47I (Note 5) 0.6 1.0 1.5 A 5V Operating Overload Current Limit IOVL5 RILIM5 = 47I (Notes 4, 6) 1.5 2.5 3.7 A 12V Operating Overload Current Limit IOVL12 RILIM12 = 47I (Notes 4, 6) 1.00 1.8 2.6 A 5V VRAMP5 Slew Rate SRVRAMP CVRAMP5 = 1FF 0.16 0.19 0.23 V/ms 12V VRAMP12 Slew Rate SRVRAMP CVRAMP12 = 1FF 0.13 0.15 0.18 V/ms ARD5 Pullup Resistor RPU5 ARD12 Pullup Resistor RPU12 100 kI kI Note 1: All voltages are referenced to ground. Currents entering the device are specified positive, and currents exiting the device are negative. Note 2: This supply range guarantees that the LOAD_ voltage is not clamped by the overvoltage limit. Note 3: Supply current specified with no load on the LOAD_ pin. Note 4: Guaranteed by design; not production tested. Note 5: ISCL_ is the current limit when conduction begins. Note 6: IOVL_ is the current limit after the on-board MOSFET is fully on. 3 Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) 1.0 0.8 5V OPERATION 0.4 0.2 0 40 60 CURRENT LIMIT (A) IOVL5 1.5 1.0 0 20 40 IOVL12 1.0 6.55 6.50 ISCL12 NO LOAD 6.45 6.40 6.35 5V OPERATION NOTE: 6.5V = VCC ABSOLUTE MAXIMUM VALUE 6.30 6.25 6.20 20Ω LOAD 6.15 60 0 80 100 120 6.05 -40 -20 0 20 40 60 80 100 120 -40 -20 TEMPERATURE (°C) NO LOAD 20 60 12V OPERATION 50 RON (mΩ) 15.8 15.6 15.4 15.2 40 30 5V OPERATION 20 20Ω LOAD 15.0 10 14.8 0 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) 4 40 ON-RESISTANCE vs. TEMPERATURE 70 MAX34561 toc07 12V OPERATION 16.0 0 60 80 100 120 TEMPERATURE (°C) OVERVOLTAGE CLAMP vs. TEMPERATURE OVERVOLTAGE CLAMP (V) OVERVOLTAGE CLAMP vs. TEMPERATURE 1.5 TEMPERATURE (°C) 16.2 150 6.10 0 -40 -20 12V OPERATION 0.5 ISCL5 100 RILIM (Ω) 2.0 2.5 0.5 50 0 150 CURRENT LIMIT vs. TEMPERATURE 2.5 MAX34561 toc04 5V OPERATION 3.0 MAX34561 toc03 0 100 RILIM (Ω) CURRENT LIMIT vs. TEMPERATURE 2.0 0.5 50 TEMPERATURE (°C) 3.5 1.0 ISCL12 0 80 100 120 1.5 MAX34561 toc06 20 ISCL5 IOVL12 MAX34561 toc08 0 2.0 OVERVOLTAGE CLAMP (V) -40 -20 IOVL5 MAX34561 toc05 0.6 2.5 12V CURRENT LIMIT (A) 12V OPERATION 1.2 ICC (mA) 5V CURRENT LIMIT (A) 1.4 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 MAX34561 toc02 MAX34561 toc01 1.6 12V CURRENT LIMIT vs. ILIM RESISTANCE 5V CURRENT LIMIT vs. ILIM RESISTANCE SUPPLY CURRENT vs. TEMPERATURE 1.8 CURRENT LIMIT (A) MAX34561 12V/5V Hot-Plug Switch -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) 12V/5V Hot-Plug Switch TYPICAL MAX34561 TURN-ON WAVEFORMS VCC = 5V, 20Ω RESISTIVE LOAD TURN-ON WAVEFORMS VCC = 5V, 20Ω RESISTIVE LOAD TYPICAL MAX34561 TURN-ON WAVEFORMS VCC = 12V, 20Ω RESISTIVE LOAD MAX34561 toc09 MAX34561 toc11 MAX34561 toc10 VCC5 VCC5 VCC12 TIMER5 2V/div 1V/div LOAD5 LOAD12 VRAMP5 LOAD5 2V/div VRAMP12 LOAD CURRENT TIMER12 500mA/div 2ms/div 5ms/div 5ms/div TURN-ON WAVEFORMS VCC = 12V, 20Ω RESISTIVE LOAD TURN-ON WAVEFORMS VCC = 5V, 3300µF CAPACITIVE LOAD TURN-ON WAVEFORMS VCC = 12V, 3300µF CAPACITIVE LOAD MAX34561 toc12 MAX34561 toc13 VCC12 MAX34561 toc14 VCC5 VCC12 LOAD5 LOAD12 5V/div LOAD CURRENT LOAD CURRENT LOAD CURRENT 500mA/div 500mA/div 500mA/div 5ms/div 5ms/div THERMAL SHUTDOWN WITH AUTORETRY ENABLED VCC = 5V, 2Ω RESISTIVE LOAD MAX34561 toc15 10ms/div THERMAL SHUTDOWN WITH AUTORETRY ENABLED VCC = 12V, 2Ω RESISTIVE LOAD MAX34561 toc16 VCC12 LOAD12 VCC5 2V/div LOAD12 5V/div 2V/div 5V/div LOAD5 LOAD CURRENT LOAD CURRENT 500mA/div 500mA/div 1s/div 500ms/div 5 MAX34561 Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) 12V/5V Hot-Plug Switch VCC12 VCC12 LOAD12 LOAD12 LOAD12 TOP VIEW VCC12 MAX34561 Pin Configuration 18 17 16 15 14 13 TIMER12 19 12 LOAD12 VRAMP12 20 11 ILIM12 ARD12 21 10 GND 9 DNC 8 ILIM5 7 LOAD5 MAX34561 ARD5 22 VRAMP5 23 EP + 1 2 3 4 5 6 VCC5 VCC5 VCC5 LOAD5 LOAD5 LOAD5 TIMER5 24 THIN QFN (4mm × 4mm) Pin Description PIN NAME FUNCTION 1, 2, 3 VCC5 5V Supply Input. Power-supply input and n-channel power MOSFET drain connection. If the 5V side is not used, connect this pin to GND. 4–7 LOAD5 8 ILIM5 5V Supply Current-Limit Adjust. A resistor from this pin to LOAD5 determines the current limit for the 5V pass connection. For better accuracy, dedicate one LOAD pin to connect to ILIM through RILIM. See the Applications Information section for more information. 9 DNC Do Not Connect. Do not connect any signal to this pin. 10 GND Ground Connection 11 ILIM12 12–15 LOAD12 16, 17, 18 VCC12 12V Supply Input. Power-supply input and n-channel power MOSFET drain connection. If the 12V side is not used, connect this pin to GND. 19 TIMER12 12V Enable Delay Control. A capacitor connected to this pin determines the enable delay according to the equation: Enable Delay = CTIMER12 x (VREF12/ITIMER). 20 VRAMP12 12V Voltage Ramp Control. A capacitor connected to this pin determines the voltage ramp of the LOAD12 output during turn-on according to the equation: dVLOAD12 = 2 x (IVRAMP/CVRAMP12). 21 6 ARD12 5V Load Output. n-channel power MOSFET source connection. 12V Supply Current-Limit Adjust. A resistor from this pin to LOAD12 determines the current limit for the 12V pass connection. For better accuracy, dedicate one LOAD pin to connect to ILIM through RILIM. See the Applications Information section for more information. 12V Load Output. n-channel power MOSFET source connection. 12V Autoretry Disable. Connect this pin to GND to disable automatic retry functionality; the device latches off during an overtemperature fault. Leave this pin open to enable automatic retry function. This pin contains a pullup (RPU12) to 5V. This pin is only sampled on device power-on. If the 12V side is not used, connect this pin to GND. 12V/5V Hot-Plug Switch PIN NAME FUNCTION 22 ARD5 5V Autoretry Disable. Connect this pin to GND to disable automatic retry functionality; the device latches off during an overtemperature fault. Leave this pin open to enable automatic retry function. This pin contains a pullup (RPU5) to VCC5. This pin is only sampled on device power-on. If the 5V side is not used, connect this pin to GND. 23 VRAMP5 5V Voltage Ramp Control. A capacitor connected to this pin determines the voltage ramp of the LOAD5 output during turn-on according to the equation: dVLOAD5 = 2.3332 x (IVRAMP/CVRAMP5). 24 TIMER5 5V Enable Delay Control. A capacitor connected to this pin determines the enable delay according to the equation: Enable Delay = CTIMER5 x (VREF5/ITIMER). — EP Exposed Pad. Connect to ground. The EP must be soldered to ground for proper thermal and electrical operation. Detailed Description The MAX34561 has hot-plug controls for both +12V and +5V power rails. The circuitry for the +12V and +5V controls are independent of each other and can be treated as two separate hot-plug switches, even though the GND pin is common between the two switches. The sections that follow are written from the +12V circuit perspective, but also apply for the +5V switch control. The device begins to operate when the supply voltage VCC12 (or VCC5) exceeds its undervoltage lockout level, VUR12 (or VUR5). At this level, the corresponding enable circuit and TIMER12 (TIMER5) become active. Once the device has been enabled, a gate voltage is applied to the corresponding power MOSFET, allowing current to begin flowing from VCC12 (VCC5) to LOAD12 (LOAD5). The speed of the output-voltage ramp is controlled by the capacitance placed at the VRAMP12 (VRAMP5) pin. The load current is continuously monitored during the initial conduction (ISCL12 or ISCL5) and after the corresponding MOSFET is fully on (IOVL12 or IOVL5). If the current exceeds the current limit that is set by the external resistance at ILIM12 (ILIM5), the gate voltage of the corresponding power MOSFET is decreased, reducing the output current to the set current limit. Current is limited by the device comparing the voltage difference between LOAD12 (LOAD5) and ILIM12 (ILIM5) to an internal reference voltage. If the output current exceeds the limit that is set by the RILIM12 (RILIM5) resistor, the gate voltage of the corresponding power MOSFET is decreased, which reduces the output current to the load. When the output power is initially ramping up, the current limit is ISCL12 (ISCL5). Once the corresponding MOSFET is fully on, the current limit is IOVL12 (IOVL5). The ISCL12 (ISCL5) current limit protects the source if there is a dead short on initial power-up. The device acts as a fuse and automatically disables the current flowing to the load when the temperature of the power corresponding MOSFET has exceeded the shutdown junction temperature, TSHDN. Enable/Timer The voltage level of TIMER12 (TIMER5) is compared to an internal source (see the Functional Diagram). When the level on the pin exceeds VON, the comparator outputs a low level. This then turns on the voltage ramp circuit, enabling the device’s output. TIMER12 (TIMER5) can be configured into one of four different modes of operation as listed in Table 1. TIMER12 (TIMER5) pin was designed to work with most logic families. TIMER12 (TIMER5) has at least 250mV of hysteresis between VON and VOFF. It is recommended that any logic gate used to drive TIMER12 (TIMER5) be tested to ensure proper operation. Table 1. TIMER_ Pin Modes OPERATION MODE Automatic Enable Delayed Automatic Enable Enable/Disable Enable with Delay/Disable TIMER PIN SETUP No connection to TIMER12 (TIMER5) Capacitor CTIMER_ connected to TIMER12 (TIMER5) Open-collector device Open-collector device and CTIMER_ 7 MAX34561 Pin Description (continued) MAX34561 12V/5V Hot-Plug Switch Functional Diagram 12V UVLO VCC12 +5V VREG RON12 LOAD12 CHARGE PUMP ILIM12 CURRENT LIMIT LOAD RILIM12 VCC12 12V THERMAL LIMIT R IVRAMP +5V VREG VRAMP12 ITIMER OVERVOLTAGE LIMIT CVRAMP12 R GND VREF12 +5V VREG TIMER12 CTIMER12 EXTERNAL DISABLE RPU12 12V AUTORETRY DISABLE ARD12 MAX34561 5V UVLO VCC5 RON5 LOAD5 CHARGE PUMP ILIM5 CURRENT LIMIT LOAD RILIM5 VCC5 IVRAMP R VCC5 5V THERMAL LIMIT VRAMP5 ITIMER OVERVOLTAGE LIMIT CVRAMP5 R GND VREF5 VCC5 TIMER5 CTIMER5 RPU5 ARD5 8 5V AUTORETRY DISABLE EXTERNAL DISABLE 12V/5V Hot-Plug Switch Automatic-Enable Mode When VCC12 (VCC5) exceeds VUR12 (VUR5), the gate holding the TIMER12 (TIMER5) node low is released. The internal current source brings the node to a level greater than VON, enabling the device. Delayed Automatic-Enable Mode When VCC12 (VCC5) exceeds VUR12 (VUR5), the gate holding the TIMER12 (TIMER5) node low is released. The internal current source (ITIMER) then begins charging CTIMER_. When CTIMER_ is charged to a level greater than VREF12 (VREF5), the device turns on. The equation for the delay time is: tDELAY = (CTIMER12 x VREF12)/ITIMER tDELAY = (CTIMER5 x VREF5)/ITIMER Enable/Disable Mode A logic gate or open-collector device can be connected to TIMER12 (TIMER5) to enable or disable the device. When TIMER12 (TIMER5) is held low, the device is disabled. When an open-collector device is used to drive TIMER12 (TIMER5), the device is enabled when the open collector is in its high-impedance state by the internal current source bringing the TIMER12 (TIMER5) node high. TIMER12 (TIMER5) is also compatible with most logic families if the output high voltage level of the gate exceeds the VON level, and the gate can sink the ITIMER current. Enable with Delay/Disable Mode An open-collector device is connected in parallel with CTIMER_. When the pin is held low, the device is disabled. When the open-collector driver is high impedance, the internal current source begins to charge CTIMER_ as in the delayed mode. Output-Voltage Ramp The voltage ramp circuit uses an operational amplifier to control the gate bias of the corresponding n-channel power MOSFET. When the timer/enable circuit is disabled, a FET is used to keep CVRAMP_ discharged, which forces the output voltage to GND. Once the enable/timer circuit has been enabled, an internal current source, IVRAMP, begins to charge the external capacitor, CVRAMP_, connected to VRAMP12 (VRAMP5). The amplifier controls the gate of the corresponding power MOSFET so that the LOAD12 (LOAD5) output voltage divided by two tracks the rising voltage level of CVRAMP_. The output voltage continues to ramp until it reaches either the input VCC12 (VCC5) level or the overvoltage clamp limits. The equation for the output-voltage ramp function is: dVLOAD/dt = 2 x (IVRAMP/CVRAMP12) for +12V circuit dVLOAD/dt = 2.3332 x (IVRAMP/CVRAMP5) for +5V circuit Thermal Shutdown The device enters a thermal shutdown state when the temperature of the corresponding power MOSFET reaches or exceeds TSHDN, approximately +135NC. When TSHDN is exceeded, the thermal-limiting circuitry disables the device using the enable circuitry. Depending on the state of ARD12 (ARD5), the device attempts to autoretry once the device has cooled, or it latches off. Autoretry If ARD12 (ARD5) is unconnected or connected high, the device continually monitors the temperature once it has entered thermal shutdown. If the junction temperature falls below approximately +95NC (TSHDN - THYS), the corresponding power MOSFET is re-enabled. See the Thermal Shutdown with Autoretry Enabled typical operating curves for details. Latchoff If ARD12 (ARD5) is pulled low and the device has entered thermal shutdown, it does not attempt to turn back on. The only way to turn the device back on is to cycle the power to the device. When power is reapplied to VCC12 (VCC5), the junction temperature needs to be less than TSHDN for the device to be enabled. Overvoltage Limit The overvoltage-limiting clamp monitors the VRAMP12 (VRAMP5) level compared to an internal voltage reference. When the voltage on VRAMP12 (VRAMP5) exceeds VOVC12/2 (or VOVC5/2.3332), the gate voltage of the corresponding n-channel power MOSFET is reduced, limiting the voltage on LOAD12 (LOAD5) to VOVC12 (VOVC5) even as VCC12 (VCC5) increases. If the device is in overvoltage for an extended period of time, the device could overheat and enter thermal shutdown. This is caused by the power created by the voltage 9 MAX34561 Once the device has been enabled, there is a delay (tPOND) until conduction begins from VCC12 (VCC5) to LOAD12 (LOAD5). This delay is the time required for the charge pump to bring the gate voltage of the corresponding power MOSFET above its threshold level. Once the gate is above the threshold level, conduction begins and the output voltage begins ramping. MAX34561 12V/5V Hot-Plug Switch drop across the corresponding power MOSFET and the load current. See the Thermal Shutdown with Autoretry Enabled typical operating curves for details. Applications Information Exposed Pad The exposed pad is also a heatsink for the device. The exposed pad should be connected to a large trace or plane capable of dissipating heat from the device. Decoupling Capacitors It is of utmost importance to properly bypass the device's supply pins. A decoupling capacitor absorbs the energy stored in the supply and board parasitic inductance when the FET is turned off, thereby reducing the magnitude of overshoot at VCC. This can be accomplished by using a high-quality (low ESR, low ESL) ceramic capacitor connected directly between the VCC and GND pins. Any series resistance with this bypass capacitor lowers its effectiveness and is not recommended. A minimum 0.5µF ceramic capacitor is required. However, depending on the parasitic inductances present in the end application, a larger capacitor could be necessary. MAX34561 LOAD LOAD LOAD LOAD TO APPLICATION RILIM ILIM Figure 1. LOAD and ILIM Connections 10 Unused Pins If only one side (5V or 12V) of the device is being used, it is required that the unused VCC, AR, CTIMER, and VRAMP pins be connected to GND. Leaving these input pins unconnected can result in interference of the proper operation of the active portion of the device. LOAD and ILIM Connections Small parasitic resistances in the bond wires of the LOAD pins and in the traces connected to the LOAD pins can result in a voltage offset while current is flowing. Since the voltage drop across RILIM is used to set the ISCL and IOVL limits, this induced offset can increase the value of ISCL and IOVL from the specified values for any given RILIM. To greatly reduce this offset, it is recommended that one of the LOAD pins have a dedicated connection to ILIM though RILIM, and not be used to pass the LOAD current (Figure 1). This would leave three LOAD pins to pass ILOAD, which should be sufficient. Because there is only a small amount of current passed from this lone LOAD pin to ILIM, there is a negligible voltage offset applied to the internal comparator. This method is the best way to attain an accurate current limit for ILOAD. Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 24 TQFN-EP T2444+4 21-0139 90-0022 12V/5V Hot-Plug Switch REVISION NUMBER REVISION DATE 0 11/10 DESCRIPTION Initial release PAGES CHANGED — Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2010 Maxim Integrated Products 11 Maxim is a registered trademark of Maxim Integrated Products, Inc. MAX34561 Revision History