NX9415 5A SYNCHRONOUS BUCK SWITCHING REGULATOR PRODUCTION DATA SHEET Pb Free Product FEATURES DESCRIPTION The NX9415 is synchronous buck switching converter in multi chip module designed for step down DC to DC converter applications. It is optimized to convert bus voltages from 8V to 22V to as low as 0.8V output voltage. The output current can be up to 5A. An internal regulator converts bus voltage to 5V, which provides voltage supply to internal logic and driver circuit. The NX9415 operates from 200kHz to 2.2MHz and employs loss-less current limiting by sensing the Rdson of synchronous MOSFET followed by hiccup feature.Feedback under voltage protection triggers hiccup. Other features of the device are: internal schottky diode, thermal shutdown, 5V gate drive, adaptive deadband control, internal digital soft start, 5VREG undervoltage lock out and shutdown capability via the comp pin. NX9415 is available in 4x4 MCM package. n n n n n n n n Single supply voltage from 8V to 22V Internal 5V regulator Programmable frequency up to 2.2MHz Internal Digital Soft Start Function Internal boost schottky diode Prebias Startup Less than 50 nS adaptive deadband Current limit triggers hiccup by sensing Rdson of Synchronous MOSFET n Pb-free and RoHS compliant APPLICATIONS n n n n Low Profile On board DC to DC Application LCD TV Hard Disk Drive ADSL Modem TYPICAL APPLICATION 0.1uF Vin +12V BST VIN D1 2*(10uF/16V/X5R) 5VREG 4.7uF VCC 1uF 0.56uH Vout1 +5V,5A 22uF/6.3V/X5R 5k NX9415 10 0.1uF S1 D2 SW 768 OCP 15.8k 220p FB 330p 15k 10p 3.01k 4.22k RT COMP GND S2 Figure 1 - Typical application of 9415 ORDERING INFORMATION Device NX9415CMTR Rev.1.2 12/28/09 Temperature 0 to 70oC Package 4X4 MCM-24L Frequency 200kHz to 2.2MHz Pb-Free Yes 1 NX9415 ABSOLUTE MAXIMUM RATINGS 5VREG,VCC to GND & BST to SW voltage ........ -0.3V to 6.5V VIN to GND Voltage ......................................... 25V S1 to GND ...................................................... -2V to 30V D1 to S1,D2 to S2 ............................................ 30V All other pins ................................................... -0.3V to VCC+0.3V or 6.5V Storage Temperature Range ............................... -65oC to 150oC Operating Junction Temperature Range ............... -40oC to 125oC ESD Susceptibility ........................................... 2kV Power Dissipation ............................................. Internally Limited by OTP CAUTION: Stresses above those listed in "ABSOLUTE MAXIMUM RATINGS", may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. PACKAGE INFORMATION S1 D1 D1 D2 S2 S2 24-LEAD PLASTIC MCM 4 x 4 24 23 22 21 20 19 S2 1 D2 2 18 S1 PAD2 PAD1 17 S1 D2 3 16 D1 NC 15 NC 4 PAD3 5VREG 5 VCC 6 OCP 13 BST NC FB COMP RT 9 10 11 12 GND 8 VIN Rev.1.2 12/28/09 7 14 2 NX9415 ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over Vin = 12V, and T A = 0 to 70oC. Followings are bypass capacitors:CVIN=1uF, C5VREG=4.7uF, all X5R ceramic capacitors. Typical values refer to T A = 25oC. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. PARAMETER Reference Voltage SYM Ref Voltage Ref Voltage line regulation VREF Input Voltage Current(Static) Input Voltage Current (Dynamic) Vin UVLO Vin-Threshold Vin-Hysteresis Under Voltage Lockout VCC-Threshold Min TYP MAX 0.8 0.4 Vin=9V to 22V 5VREG 5VREG Voltage range 5VREG Line Regulation 5VREG Max Current Supply Voltage(Vin) Vin Voltage Range Test Condition 4.75 VIN=9V to 22V 5 10 V % 5.25 50 Vin 9 Units V mV mA 22 V No switching Rt=4.22k 4.8 mA mA Vin_UVLO Vin Rising 6.5 V Vin_Hyst Vin Falling 0.6 V VCC _UVLO VCC Rising 3.9 V 10 VCC-Hysteresis VCC _Hyst VCC Falling 0.2 V SS Soft Start time Tss FS=2.2MHz 400 uS Oscillator (Rt) Frequency FS 2250 kHz 1.5 V 71 % Ramp-Amplitude Voltage VRAMP Max Duty Cycle Min Controlable On Time Error Amplifiers Transconductance Input Bias Current Comp SD Threshold FBUVLO Feedback UVLO threshold Over temperature Threshold Hysteresis OCP OCP current Internal Schottky Diode Forward voltage drop Ouput Stage High Side MOSFET RDSON Rt=4.22k FS=2.2MHz 150 Ib nS 2000 10 0.3 umho nA V 0.6 V 150 20 o C C o 37 uA 350 mV 31 mohm Low Side MOSFET RDSON 31 mohm Output Current 5 A Rev.1.2 12/28/09 forward current=20mA 3 NX9415 PIN DESCRIPTIONS PIN # PIN SYMBOL 17-19 S1 PIN DESCRIPTION Source of high side MOSFET and provides return path for the high side driver. 2-3,22,PAD2 D2 Drain of low side MOSFET. 23-24,1 S2 Source of low side MOSFET and needs to be connected to power ground. 21-20,16,PAD1 D1 Drain of high side MOSFET. 5 5VREG 6 VCC Voltage supply for internal analog circuit and driver 7 VIN Voltage supply for the internal 5V regulator. 8 RT Oscillator's frequency can be set by using an external resistor from this pin to GND. 9 GND 10 COMP This pin is the output of the error amplifier and is used to compensate the voltage control feedback loop. This pin is also used as a shut down pin. When this pin is pulled below 0.3V, both drivers are turned off and internal soft start is reset. 11 FB This pin is the error amplifier inverting input. This pin is connected via resistor divider to the output of the switching regulator to set the output DC voltage. 13 BST This pin supplies voltage to the high side driver. A high frequency ceramic capacitor of 0.1 to 1uF must be connected from this pin to SW pin. 14 OCP This pin is connected to the D2 of the low side MOSFET and is the input of the over current protection(OCP) comparator. An fixed internal current flows to the external resistor which sets the OCP voltage across the Rdson of the low side MOSFET. Current limit point is this voltage divided by the Rds-on. 4,12,15, PAD3 NC Rev.1.2 12/28/09 An internal 5V regulator. A high frequency 4.7uF/X5R ceramic capacitor must be connected from this pin to the GND pin as close as possible. Ground. Not used pin. Connecting these pins to ground is recommended. 4 NX9415 BLOCK DIAGRAM BST 5VREG VIN D1 5V Regulator VCC 1.25V Bias Generator 0.8V UVLO POR START COMP 0.3V S1 RT OC PWM OSC Digital start Up SW Control Logic START 0.8V PVCC D2 ramp S R Q Thermal Shutdown S2 Hiccup Logic FB 0.6V CLAMP COMP SS_done 70%*Vp 1.3V CLAMP FB START OCP GND START VCC Figure 2 - Simplified block diagram of the NX9415 Rev.1.2 12/28/09 5 NX9415 TYPICAL APPLICATION Input Voltage=12V Output Voltage=5V@5A Working Frequency=2.2MHz C2 0.1uF U1 CIN 2*(10uF/16V/X5R) C4 4.7uF D1 VIN BST 5VREG S1 D2 SW R1 10 C1 1uF VCC NX9415 Vin +12V C3 0.1uF L1 0.56uH COUT 22uF/6.3V/X5R R7 5k R4 768 OCP C5 220p R5 15.8k FB C6 330p 10p R2 4.22k Vout1 +5V,5A R6 3.01k R3 15k RT COMP GND S2 Figure 3- Demo board schematic Rev.1.2 12/28/09 6 NX9415 Bill of Materials Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Rev.1.2 12/28/09 Quantity 1 2 1 1 1 2 1 1 1 1 1 1 1 1 1 1 Reference C1 C2,C3 C4 C5 C6 CIN COUT L1 R1 R2 R3 R4 R5 R6 R7 U1 Value 1u 0.1u 4.7u/6.3V/X5R 220p 330p 10u/16V/X5R 22u/6.3V/X5R DO1813P-561HC 10 4.22k 15k 768 15.8k 3.01k 5k NX9415CMTR Manufacturer Coilcraft NEXSEM INC. 7 NX9415 Demoboard waveforms Figure 4 - Output ripple (CH1 SW 10V/DIV, CH2 VOUT AC 50mV/DIV, CH4 OUTPUT CURRENT 5A/DIV) Figure 5 - Output voltage transient response ( CH2 VOUT AC 50mV/DIV, CH4 OUTPUT CURRENT 5A/DIV) Figure 6 - Over current protection(CH4 OUTPUT CURRENT 5A/DIV) Figure 7 - Startup(CH2 VOUT 2V/DIV, CH4 OUTPUT CURRENT 2A/DIV) Figure 8 - Output Efficiency @VOUT=5V,VIN=12V Rev.1.2 12/28/09 8 NX9415 APPLICATION INFORMATION Symbol Used In Application Information: Compensator Design Due to the double pole generated by LC filter of the VIN - Input voltage power stage, the power system has 180o phase shift , VOUT - Output voltage and therefore, is unstable by itself. In order to achieve IOUT - Output current accurate output voltage and fast transient response, DVRIPPLE - Output voltage ripple compensator is employed to provide highest possible FS bandwidth and enough phase margin.Ideally,the Bode - Working frequency plot of the closed loop system has crossover frequency DIRIPPLE - Inductor current ripple between1/10 and 1/5 of the switching frequency, phase margin greater than 50o and the gain crossing 0dB with - Output Inductor Selection The selection of inductor value is based on inductor ripple current, power rating, working frequency and efficiency. Larger inductor value normally means smaller ripple current. However if the inductance is chosen too large, it brings slow response and lower efficiency. Usually the ripple current ranges from 20% to 40% of the output current. This is a design freedom which can be decided by design engineer according to various application requirements. The inductor value can be calculated by using the following equations: V -V V 1 L OUT = IN OUT × OUT × VIN FS ∆IRIPPLE IRIPPLE =k × IOUTPUT 20dB/decade. Power stage output capacitors usually decide the compensator type. If electrolytic capacitors are chosen as output capacitors, type II compensator can be used to compensate the system, because the zero caused by output capacitor ESR is lower than crossover frequency. Otherwise type III compensator should be chosen. A. Type III compensator design For low ESR output capacitors, typically such as Sanyo oscap and poscap, the frequency of ESR zero caused by output capacitors is higher than the cross- ...(1) over frequency. In this case, it is necessary to compensate the system with type III compensator. The follow- where k is between 0.2 to 0.4. ing figures and equations show how to realize the type III compensator by transconductance amplifier. Output Capacitor Selection Output capacitor is basically decided by the amount of the output voltage ripple allowed during steady state(DC) load condition as well as specification for the load transient. The optimum design may require a couple of iterations to satisfy both condition. FZ1 = 1 2 × π × R 4 × C2 ...(3) FZ2 = 1 2 × π × (R 2 + R 3 ) × C 3 ...(4) FP1 = 1 2 × π × R 3 × C3 ...(5) The amount of voltage ripple during the DC load condition is determined by equation(2). ∆VRIPPLE = ESR × ∆IRIPPLE ∆IRIPPLE + 8 × FS × COUT ...(2) FP2 = 1 2 × π × R4 × C1 × C 2 C1 + C 2 ...(6) Where ESR is the output capacitors' equivalent where FZ1,FZ2,FP1 and FP2 are poles and zeros in series resistance,COUT is the value of output capacitors. the compensator. Their locations are shown in figure 10. Typically when ceramic capacitors are selected as The transfer function of type III compensator for output capacitors, DC ripple spec is easy to be met, but transconductance amplifier is given by: mutiple ceramic capacitors are required at the output to Ve 1 − gm × Z f = VOUT 1 + gm × Zin + Z in / R1 meet transient requirement. Rev.1.2 12/28/09 9 NX9415 For the voltage amplifier, the transfer function of B. Type II compensator design Type II compensator can be realized by simple RC compensator is circuit without feedback as shown in figure 12. R3 and C1 Ve −Z f = VOUT Zin introduce a zero to cancel the double pole effect. C2 introduces a pole to suppress the switching noise. The To achieve the same effect as voltage amplifier, the compensator of transconductance amplifier must following equations show the compensator pole zero location and constant gain. satisfythiscondition:R4>>2/gm. And it would be desirable if R 1||R2||R3>>1/gm can be met at the same time. Zin Zf C1 Vout R3 R2 C3 C2 Gain=gm × Fz = R1 × R3 R1 +R 2 1 2 × π × R 3 × C1 Fp ≈ ... (7) ... (8) 1 2 × π × R3 × C2 ... (9) R4 For this type of compensator, FO has to satisfy FLC<FESR<<FO<=1/10~1/5Fs. Fb gm Ve R1 power stage Figure 9 - Type III compensator using transconductance amplifier Gain(db) Vref 40dB/decade loop gain 20dB/decade Gain(db) power stage FLC 40dB/decade compensator Gain loop gain 20dB/decade FZ FLC FESR FO FP FESR FO Figure 11 - Bode plot of Type II compensator compensator FZ1 FZ2 FP2 FP1 F S Figure 10 - Bode plot of Type III compensator Rev.1.2 12/28/09 10 NX9415 Over Current Protection Over current protection is achieved by sensing cur- Vout rent through the low side MOSFET. A typical internal R2 current source of 37uA flowing through an external resis- Fb tor connected from OCP pin to SW node sets the over Ve gm current protection threshold. When synchronous FET is R1 R3 Vref on, the voltage at node SW is given as C2 VSW =-IL × RDSON C1 The voltage at pin OCP is given as IOCP × ROCP +VSW When the voltage is below zero, the over current Figure 12 - Type II compensator with occurs. transconductance amplifier vbus I OCP Output Voltage Calculation OCP Output voltage is set by reference voltage and ex- SW R OCP ternal voltage divider. The reference voltage is fixed at OCP comparator 0.8V. The divider consists of two ratioed resistors so that the output voltage applied at the Fb pin is 0.8V when the output voltage is at the desired value. The following Figure 14 - Over current protection equation and picture show the relationship between The over current limit can be set by the following VOUT , VREF and voltage divider.. R 1= R 2 × VR E F V O U T -V R E F equation ISET = ...(10) IOCP × ROCP K × RDSON where R2 is part of the compensator, and the value of R1 value can be set by voltage divider. Frequency Selection The frequency can be set by external Rt resistor. See compensator design for R1 and R2 selection. The relationship between frequency and RT pin is shown as follows. Vout NX9415 Frequency vs Rt R2 Fb R1 Vref Voltage divider Figure 13 - Voltage divider Frequency(kHz) 2500 2000 1500 1000 500 0 3 13 23 33 Rt(kohm) Figure 15 - Frequency versus Rt resistor Rev.1.2 12/28/09 11 NX9415 MCM 24 PIN 4 x 4 PACKAGE OUTLINE DIMENSIONS NOTE: ALL DIMENSIONS ARE DISPLAYED IN MILLIMETERS. Rev.1.2 12/28/09 12