PJ2306 30V N-Channel Enhancement Mode MOSFET - ESD Protected FEATURES • RDS(ON), VGS@10V,[email protected]=65mΩ • RDS(ON), [email protected],[email protected]=85mΩ • Advanced Trench Process Technology • High Density Cell Design For Ultra Low On-Resistance • Very Low Leakage Current In Off Condition • Specially Designed for Load Switch, PWM Applications • ESD Protected • Component are in compliance with EU RoHS 2002/95/EC directives MECHANICALDATA • Case: SOT-23 Package • Terminals : Solderable per MIL-STD-750,Method 2026 • Marking : 06 D 3 Top View 1 2 G S Maximum RATINGS and Thermal Characteristics (TA=25OC unless otherwise noted ) PA RA ME TE R S ym b o l L i mi t Uni ts D r a i n-S o urc e Vo lta g e V DS 30 V Ga te -S o urc e Vo lta g e V GS +2 0 V ID 3 .2 A ID M 16 A PD 1 .2 5 0 .7 5 W T J ,T S TG -5 5 to + 1 5 0 R θJ A 100 C o nti nuo us D ra i n C urre nt P uls e d D ra i n C ur re nt 1) M a xi m um P o we r D i s s i p a ti o n T A =2 5 O C T A =7 5 O C Op e ra ti ng J unc ti o n a nd S to ra g e Te m p e ra ture Ra ng e Junction-to Ambient Thermal Resistance(PCB mounted) 2 O O C C /W Note: 1. Maximum DC current limited by the package 2. Surface mounted on FR4 board, t < 5 sec PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE June 03, 2010-REV.00 PAGE . 1 PJ2306 ELECTRICALCHARACTERISTICS P a r a m e te r S ym b o l Te s t C o nd i ti o n Mi n. Typ . M a x. Uni t s D r a i n- S o ur c e B r e a k d o wn Vo lt a g e B V DSS V GS = 0 V, ID = 2 5 0 uA 30 G a t e Thr e s ho ld Vo lt a g e V GS ( t h) V D S = V G S , ID = 2 5 0 uA 1 R D S ( o n) VGS=4.5V, I D=2.8A 72 85 R D S ( o n) VGS=10V, I D=3.2A 55 65 Ze r o G a t e Vo lt a g e D r a i n C ur r e nt ID S S VDS=24V, VGS=0V 1 uA Gate Body Leakage IGS S V G S = + 1 6 V, V D S = 0 V +10 uA Forward Transconductance g fS V D S = 4 . 5 V, ID = 2 . 8 A D i o d e F o r wa r d Vo lt a g e V SD I S = 2 . 8 A , V GS = 0 V 0.88 1.2 V D S =1 5 V, I D = 3 . 2 A , VGS=5V 2.8 3.5 5.0 6.5 S ta t i c D r a i n- S o ur c e O n- S t a t e Re s i s t a nc e V 2.5 V mΩ 3 S V Dynamic To t a l G a t e C ha r g e Qg nC V D S = 1 5 V, ID = 3 . 2 A VGS=10V G a t e - S o ur c e C ha r g e Qgs G a t e - G r a i n C ha r g e Q gd 1.1 Tur n- On D e la y Ti m e t d ( o n) 8.6 11.2 12.8 16.8 18.6 26 tf 1.9 2.6 Inp ut C a p a c i ta nc e C iss 270 O utp ut C a p a c i t a nc e C oss Re ve r s e Tr a ns f e r C a p a c i t a nc e C rss Ri s e Ti m e tr Tur n- Of f D e la y Ti m e VDD=15V , RL=15Ω ID=1A , VGEN=10V RG=6Ω t d ( o ff ) F a ll Ti m e 0.5 ns V D S = 1 5 V, V GS = 0 V f= 1 . 0 M H Z 45 pF 30 NOTE : Plus Test : Pluse Width < 300us, Duty Cycle < 2%. V DD Switching Test Circuit V IN V DD Gate Charge Test Circuit RL V GS RL V OUT RG 1mA RG June 03, 2010-REV.00 PAGE . 2 PJ2306 20 20 VGS=10V ID - Drain Source Current (A) ID - Drain-to-Source Current (A) Typical Characteristics Curves ( Ta=25℃ ℃, unless otherwise noted) 5.0V 16 4.0V 12 3.5V 8 3.0V 4 2.5V 0 VDS =10V 16 12 8 TJ = 125oC -55oC 0 0 1 2 3 4 VDS - Drain-to-Source Voltage (V) 5 1 300 RDS(ON) - On Resistance(mΩ Ω) RDS(ON) - On Resistance(mΩ Ω) 300 ID =3.2A 250 250 200 200 150 150 VGS=4.5V 100 TJ =125oC 100 50 VGS = 10V 50 TJ =25oC 0 0 0 5 10 15 ID - Drain Current (A) 0 20 Fig.3 On Resistance vs Drain Current 2 4 6 8 VGS - Gate-to-Source Voltage (V) 10 Fig.4 On Resistance vs Gate to Source Voltage 500 1.8 VGS =10 V ID =3.2A 1.4 1.2 1 0.8 0.6 C - Capacitance (pF) RDS(ON) - On-Resistance(Normalized) 2 3 4 5 VGS - Gate-to-Source Voltage (V) Fig.2 Transfer Characteristric Fig.1 Output Characteristric 1.6 25oC 4 f = 1MHz VGS = 0V 400 Ciss 300 C 200 Coss 100 Fig.5 On Resistance vs Junction Temperature June 03, 2010-REV.00 C Crss 0 -50 -25 0 25 50 75 100 125 150 TJ - Junction Temperature (oC) C 0 5 10 15 20 25 30 VDS - Drain-to-Source Voltage (V) Fig.6 Capacitance PAGE. 3 PJ2306 10 VDS=15V ID =3.2A 8 IS - Source Current (A) VGS - Gate-to-Source Voltage (V) Typical Characteristics Curves ( Ta=25℃ ℃, unless otherwise noted) 6 4 2 0 1 VGS = 0V TJ = 125oC 25oC 0.1 -55oC 0.01 0 1 2 3 4 5 Qg - Gate Charge (nC) 6 Fig. 7 Gate Charge Waveform Vth - G-S Threshold Voltage(Normalized) 10 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 VSD - Source-to-Drain Voltage (V) Fig.8 Source-Drain Diode Forward Voltage 1.2 ID = 250µA 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 -25 0 25 50 75 100 125 150 TJ - Junction Temperature (oC) Fig.9 Breakdown Voltage vs Junction Temperature June 03, 2010-REV.00 PAGE. 4 PJ2306 MOUNTING PAD LAYOUT Unit: inch (mm) 0.078(2.0) 0.035(0.9) SOT-23 0.031(0.8) 0.037(0.95) ORDER INFORMATION • Packing information T/R - 3K per 7" plastic Reel LEGALSTATEMENT Copyright PanJit International, Inc 2010 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. June 03, 2010-REV.00 PAGE . 5