RENESAS 2SK3210

2SK3210(L), 2SK3210(S)
Silicon N Channel MOS FET
High Speed Power Switching
REJ03G0414-0300
(Previous ADE-208-760A (Z))
Rev.3.00
Sep. 30, 2004
Features
• Low on-resistance
RDS = 40 mΩ typ.
• High speed switching
• 4 V gate drive device can be driven from 5 V source
Outline
LDPAK
D
4
4
1. Gate
2. Drain
3. Source
4. Drain
G
1
1
2
2
3
3
S
Absolute Maximum Ratings
(Ta = 25°C)
Item
Symbol
Ratings
Unit
Drain to source voltage
VDSS
150
V
Gate to source voltage
VGSS
±20
V
Drain current
Drain peak current
Body-drain diode reverse drain current
ID
30
A
ID (pulse)Note1
120
A
IDR
30
A
30
A
Note3
Avalanche current
IAP
Avalanche energy
EARNote3
Note2
Channel dissipation
Pch
67
mJ
100
W
Channel temperature
Tch
150
°C
Storage temperature
Tstg
–55 to +150
°C
Notes: 1. PW ≤ 10ms, duty cycle ≤ 1 %
2. Value at Tc = 25°C
3. Value at Tch = 25°C, Rg ≥ 50 Ω
Rev.3.00 Sep. 30, 2004 page 1 of 8
2SK3210(L), 2SK3210(S)
Electrical Characteristics
(Ta = 25°C)
Symbol
Min
Typ
Max
Unit
Drain to source breakdown voltage
Item
V(BR)DSS
150
—
—
V
ID = 10 mA, VGS = 0
Test Conditions
Gate to source breakdown voltage
V(BR)GSS
±20
—
—
V
IG = ±100 µA, VDS = 0
Gate to source leak current
IGSS
—
—
±10
µA
VGS = ±16 V, VDS = 0
Zero gate voltage drain current
IDSS
—
—
10
µA
VDS = 150 V, VGS = 0
Gate to source cutoff voltage
VGS(off)
1.0
—
2.5
V
VDS = 10 V, ID = 1 mA
Static drain to source on state
resistance
RDS(on)
—
40
45
mΩ
ID = 15 A, VGS = 10 V Note4
RDS(on)
—
45
63
mΩ
ID = 15 A, VGS = 4 VNote4
|yfs|
18
30
—
S
ID = 15 A, VDS = 10 VNote4
Input capacitance
Ciss
—
2600
—
pF
Output capacitance
Coss
—
820
—
pF
VDS = 10 V, VGS = 0
f = 1MHz
Reverse transfer capacitance
Crss
—
350
—
pF
Turn-on delay time
td(on)
—
25
—
ns
Forward transfer admittance
Rise time
Turn-off delay time
Fall time
Body–drain diode forward voltage
Body–drain diode reverse recovery
time
Notes: 4. Pulse test
Rev.3.00 Sep. 30, 2004 page 2 of 8
tr
—
180
—
ns
td(off)
—
600
—
ns
VGS = 10 V, ID= 15 A
RL = 2 Ω
tf
—
280
—
ns
VDF
—
0.91
—
V
IF = 30 A, VGS = 0
trr
—
110
—
ns
IF = 30 A, VGS = 0
diF/dt = 50 A/µs
2SK3210(L), 2SK3210(S)
Main Characteristics
Maximum Safe Operation Area
Power vs. Temperature Derating
500
300
ID (A)
C
10
0
50
100
150
Case Temperature
1
0.1
Ta = 25°C
0.05
0.1 0.3
1
3
200
25 n
°C
)
ho
t)
10
100 300 1000
30
VDS (V)
VDS = 10 V
Pulse Test
ID (A)
40
4V
Drain Current
3V
20
10
Tc = –25°C
1.6
1.2
ID = 20 A
10 A
0.4
5A
4
8
12
Gate to Source Voltage
Rev.3.00 Sep. 30, 2004 page 3 of 8
0
8
10
VDS (V)
Pulse Test
0.8
25°C
10
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
2.0
75°C
20
VGS = 2.5 V
2
4
6
Drain to Source Voltage
40
30
16
VGS (V)
20
1
2
3
Gate to Source Voltage
4
5
VGS (V)
Static Drain to Source on State Resistance
vs. Drain Current
1000
Pulse Test
500
Drain to Source On State Resistance
RDS(on) (mΩ)
ID (A)
=
1s
tio
Typical Transfer Characteristics
Pulse Test
5V
30
Drain Current
s(
ra
50
10 V
Drain to Source Voltage VDS(on) (V)
m
pe
Drain to Source Voltage
Tc (°C)
Typical Output Characteristics
0
10
Operation in
this area is
0.3
limited by RDS(on)
50
0
O
Tc
3
=
s
40
D
m
80
PW
30
Drain Current
120
10 µs
100 µs
100
1
Channel Dissipation
Pch (W)
160
200
100
VGS = 4 V
50
10 V
20
10
1
2
5
10
Drain Current
20
ID (A)
50
100
200
150
ID = 20 A 5, 10 A
100
VGS = 4 V
50
5, 10 A
20 A
10 V
0
–40
0
40
80
Case Temperature
120
Tc
25°C
3
1
0.3
VDS = 10 V
Pulse Test
0.1
Drain Current
ID (A)
Capacitance C (pF)
50 100
Typical Capacitance vs.
Drain to Source Voltage
Ciss
1000
Coss
300
100
30
20
Crss
VGS = 0
f = 1 MHz
10
0.3
1
3
10
30
0
100
VDD = 100 V
50 V
25 V
12
200
8
VDS
100
4
VDD = 100 V
50 V
25 V
40
80
Gate Charge
Rev.3.00 Sep. 30, 2004 page 4 of 8
120
160
Qg (nc)
20
30
40
50
0
200
Switching Characteristics
VGS = 10 V, VDD = 30 V
PW = 5 µs, duty < 1 %
2000
Switching Time t (ns)
16
VGS (V)
400
Gate to Source Voltage
VGS
300
5000
20
ID = 30A
10
Drain to Source Voltage VDS (V)
IDR (A)
Dynamic Input Characteristics
0
10 20
3000
50
500
5
2
0.5 1
10000
100
Reverse Drain Current
VDS (V)
75°C
10
(°C)
200
10
0.1
Drain to Source Voltage
Tc = –25°C
30
0.1 0.2
di / dt = 50 A / µs
VGS = 0, Ta = 25°C
500
100
160
Body-Drain Diode Reverse
Recovery Time
1000
Reverse Recovery Time trr (ns)
Forward Transfer Admittance vs.
Drain Current
Static Drain to Source on State Resistance
vs. Temperature
250
Pulse Test
Forward Transfer Admittance |yfs| (S)
Drain to Source On State Resistance
RDS(on) (mΩ)
2SK3210(L), 2SK3210(S)
td(off)
1000
500
tf
200
tr
100
50
td(on)
20
10
0.1 0.2
0.5
1
2
Drain Current
5 10 20
ID (A)
50
2SK3210(L), 2SK3210(S)
Reverse Drain Current vs.
Source to Drain Voltage
Repetitive Avalanche Energy EAR (mJ)
Reverse Drain Current IDR (A)
50
Maximum Avalanche Energy vs.
Channel Temperature Derating
Pulse Test
40
30
VGS = 10 V
20
10
0, –5 V
5V
0
0.4
0.8
1.2
1.6
Source to Drain Voltage
100
2.0
IAP = 30 A
VDD = 50 V
duty < 0.1 %
Rg > 50 Ω
80
60
40
20
0
25
50
75
100
125
150
Channel Temperature Tch (°C)
VSD (V)
Normalized Transient Thermal Impedance vs. Pulse Width
Normalized Transient Thermal Impedance
γs (t)
3
Tc = 25°C
1
D=1
0.5
0.3
0.2
0.1
θch – c(t) = γs (t) × θch – c
θch – c = 1.25°C/W, Tc = 25°C
0.1
0.05
PDM
0.02
1
lse
0.0 t pu
o
h
1s
0.03
0.01
10 µ
PW
T
PW
T
100 µ
1m
10 m
100 m
Pulse Width PW (s)
Avalanche Test Circuit
V DS
Monitor
D=
1
10
Avalanche Waveform
EAR =
L
VDSS
1
× L × IAP2 ×
VDSS – V DD
2
I AP
Monitor
V (BR)DSS
I AP
Rg
D. U. T
V DS
VDD
ID
Vin
15 V
50Ω
0
Rev.3.00 Sep. 30, 2004 page 5 of 8
VDD
2SK3210(L), 2SK3210(S)
Switching Time Test Circuit
Switching Time Waveform
Vout
Monitor
Vin Monitor
90%
D.U.T.
RL
Vin
Vin
10 V
50Ω
V DD
= 30 V
Vout
10%
10%
90%
td(on)
Rev.3.00 Sep. 30, 2004 page 6 of 8
tr
10%
90%
td(off)
tf
2SK3210(L), 2SK3210(S)
Package Dimensions
• 2SK3210(L)
As of January, 2003
Unit: mm
8.6 ± 0.3
11.3 ± 0.5
0.3
10.0 +– 0.5
(1.4)
4.44 ± 0.2
10.2 ± 0.3
1.3 ± 0.15
1.3 ± 0.2
1.37 ± 0.2
0.76 ± 0.1
2.54 ± 0.5
2.54 ± 0.5
2.49 ± 0.2
11.0 ± 0.5
0.2
0.86 +– 0.1
0.4 ± 0.1
Package Code
JEDEC
JEITA
Mass (reference value)
LDPAK (L)
—
—
1.40 g
• 2SK3210(S)
As of January, 2003
Unit: mm
(1.5)
2.49 ± 0.2
0.2
0.1 +– 0.1
7.8
7.0
0.3
10.0 +– 0.5
8.6 ± 0.3
(1.5)
7.8
6.6
1.3 ± 0.15
1.7
(1.4)
4.44 ± 0.2
10.2 ± 0.3
2.2
1.37 ± 0.2
2.54 ± 0.5
0.2
0.86 +– 0.1
2.54 ± 0.5
0.4 ± 0.1
0.3
3.0 +– 0.5
1.3 ± 0.2
Package Code
JEDEC
JEITA
Mass (reference value)
Rev.3.00 Sep. 30, 2004 page 7 of 8
LDPAK (S)-(1)
—
—
1.30 g
2SK3210(L), 2SK3210(S)
Ordering Information
Part Name
Quantity
Shipping Container
2SK3210L
50 pcs.
Loose packing
2SK3210STL
1000 pcs.
Taping
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of
production before ordering the product.
Rev.3.00 Sep. 30, 2004 page 8 of 8
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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