PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 30-W, 48-V INPUT DC/DC CONVERTERS WITH AUTO-TRACK™ SEQUENCING FEATURES • • • • • • • • • • • • • • • • Input Voltage: 36 V to 75 V 30-W Total Output Power Output Voltages: 3.3 V, 5 V, and 12 V Wide-Output Adjust/Trim Up To 88% Efficiency Overcurrent Protection Overtemperature Shutdown Undervoltage Lockout Input Overvoltage Protection Auto-Track™ Power-Up Sequencing (Includes Sequenced Output with PTB48560B) Smart-Sense Remote Sensing (PTB48560B) Dual-Logic Enable Control Space-Saving 1×2 Footprint Surface Mount Package 1500-Vdc Isolation Agency Approvals (Pending): UL/cUL 60950, EN 60950 APPLICATIONS • • • Intermediate Bus Architectures Telecom, High-End Computing Platforms Multi-Rail Power Systems with Power-Up Sequencing DESCRIPTION The PTB48560x is a series of 30–W rated isolated dc/dc converters, designed to operate from a standard -48–V telecom central office (CO) supply. Housed in a 1×2 package, each model has a wide-adjust output voltage that can be set to one of the common intermediate bus voltages of 3.3 V, 5 V, or 12 V. The PTB48560 series incorporates Auto-Track™, a feature that simplifies the power-up sequencing of multiple power modules and operates from the same intermediate bus. During a power-up cycle, modules with this feature have the capability of following a common ramp voltage applied to an input called Track. The PTB48560 series is specifically designed to control the Track voltage of any number of nonisolated downstream modules powered from its output. This ensures that the outputs of the downstream modules all rise simultaneously during power up. The PTB48560B (3.3 V) has an additional sequenced output, VO Seq, which also rises with the Track voltage. This allows the VO Seq output to power up simultaneously with the outputs from other power modules under the control of Auto-Track. Whether used to facilitate power-up sequencing, or operated as a stand-alone module, the PTB48560 series includes many other features expected of high-performance dc/dc converter modules. Precise output voltage regulation is ensured with a differential remote sense. Operational features include an input undervoltage lockout (UVLO) and a dual-logic output enable control. Overcurrent and overtemperature protection ensure survival against load faults.Typical applications include distributed power architectures in both telecom and computing environments, particularly complex digital systems requiring power sequencing of multiple power supply rails. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Auto-Track is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005, Texas Instruments Incorporated PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Typical Circuit Track 5 PTB48560x +VI 1 +VI +Sense* 9 VOSeq (3.3 V) # See Note (*) 11 VOSeq # 10 VOBus 2 PEN VOAdjust 3 4 VI CO ‡ (Required) 8 NEN VOCOM -VI Track -VI - Sense GND Adjust CO CI ‡ RSET 6 7 VPOL1 Auto-Track V POL Module O RSET† Track Simultaneous Power-Up VI VOSeq # VPOL2 Auto-Track V POL Module O GND Adjust VPOL1 CI ‡ VPOL2 † CO RSET To Other POL Modules # Sequenced output is only available with the PTB48560B. * The +Sense can be connected to either the VOSeq or VOBus output of the PTB48560B. † R SET is required to set the output voltage higher than the minimum value; see the Application Information for values. ‡ The PTB48560x modules require a minimum total output capacitance for proper operation; see the Electrical Characterisitics for the value required by each model. 2 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 ORDERING INFORMATION PTB48560 (Base Pt. Number) Output Voltage Range Part Number PTB48560AAH 3.6 V to 5.5 V PTB48560AAS PTB48560AAZ 1.8 V to 3.6 V PTB48560BAH (4) PTB48560BAS (4) PTB48560BAZ (4) PTB48560CAH 9 V to o13.2 V (1) (2) (3) (4) DESCRIPTION Pb – free and RoHS Compatible Horizontal T/H Yes ERW No ERY Standard SMD (2) Optional SMD (3) Horizontal T/H Standard SMD (2) Optional SMD (3) Horizontal T/H (1) Package Ref. Yes Yes ERW No ERY Yes Yes ERW ERY PTB48560CAS Standard SMD (2) No PTB48560CAZ Optional SMD (3) Yes See the applicable package reference drawing for the dimensions and PC board layout. Standard option specifies 63/37, Sn/Pb pin solder material. Lead (Pb) – free option specifies Sn/Ag pin solder material. Includes an Auto-Track compatible output, VO Seq, which sequences with the Track control during power up. ABSOLUTE MAXIMUM RATINGS PTB48560x Continuous VI Input Voltage V(Track) Track input voltage I(Track) max Track input current TA 1 Operating temperature range Over VI range Overtemperature protection PCB temperature (near pin 1) Wave solder temperature Surface temperature of module or pins (5 seconds) PTB48560xAH 260 (3) T(REFLOW) Solder reflow temperature Surface temperature of module or pins PTB48560xAS 235 (3) PTB48560xAZ 260 (3) Tstg Storage temperature T(WAVE) (1) (2) (3) Surge, 1 s max UNIT 75 100 (1) V 0 to VO Bus + 0.3 From external source 10 (2) mA –40 to 85 115 °C –40 to 125 The converter's internal protection circuitry may cause the output to turn off when the applied input voltage is greater than 75 V. When the Track input is fed from an external voltage source, the input current must be limited. A 2.74-kΩ value series resistor is recommended. During solder reflow of SMD package version, do not elevate the module PCB, pins, or internal component temperatures this peak temperature. PACKAGE SPECIFICATIONS PTB48560x (Suffixes AH and AS) Weight 13.6 grams Flammability Meets UL94V-O Mechanical shock Per Mil-STD-883D, Method 2002.3, 1 ms, 1/2 Sine, mounted Mechanical vibration (1) Mil-STD-883D, Method 2007.2, 20-2000 Hz, PCB mounted Horizontal T/H (Suffix AH) 500 Gs Horizontal SMD (Suffix AS) 250 G Horizontal T/H (Suffix AH) 20 G Horizontal SMD (Suffix AS) 5G (1) (1) (1) (1) Qualification limit. 3 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 PTB48560B ELECTRICAL CHARACTERISTICS (Unless otherwise stated, TA = 25°C, VI = 48 V, VO = 3.3 V, CO = 220 µF, and IO = IOmax) PARAMETER Input voltage range IO Seq 0 4 (3) Sum total, (IO Bus + IO Seq) 0.25 Over IO range 36 Load regulation Over IO range ±13 Total output voltage variation Includes set-point, line, load, –40°C ≤ TA ≤ 85°C Adjust range Over VI range Track input (pin 5) ±2 1.8 82% RSET = 40.2 kΩ, VO = 2.5 V 79% RSET = open , VO = 1.8 V 74% Recovery time Output enable inputs (pins 2, 3) (2) (3) (4) (5) (6) 4 mVpp 100 µs mV 0 0.1 Input high voltage (VIH) 2 Input low voltage (VIL) -0.2 Shutdown, followed by autorecovery VO Bus (5) 1 Open (6) 0.8 0.48 8 34 VI decreasing 33 500 V/ms V mA 16 12 VI increasing mA A V Over VI range 400 External output capacitance Between both outputs and VO COM 220 Isolation voltage Input-output Isolation capacitance Input-output Isolation resistance Input-output 10 MΩ Reliability Telcordia SR-332 50% stress, TA = 40°C, ground benign 3.6 106 Hr Internal input capacitance (1) 50 mA Overcurrent threshold Switching frequency V ±150 Input low current (IIL) ƒS mV %VO -0.13 Pins 2 and 3 open Undervoltage lockout (4) VO over/undershoot Standby input current UVLO ±33 ±3 mV Track connected to -Sense Open-circuit voltage Referenced to -VI ±33 3.6 RSET = 5.36 kΩ, VO = 3.3 V Input slew rate limits MTBF %VO ±7 0.1 A/µs load step, 50% to 100% IOmax V %VO Over VI range Transient response 75 ±0.5 Line regulation 20-MHz bandwidth A (4) ±1 Input current IO (tot) 48 -40°C ≤ TA ≤ 85°C VO Ripple (peak-to-peak) UNIT 8 Temperature variation Efficiency η MAX (2) 0.25 Set-point voltage tolerance VO TYP 8 IO Bus Output current VI MIN (1) Over VI range IO PTB48560B TEST CONDITIONS 600 kHz 5,000 µF 1 1,500 µF Vdc 2,000 pF The converter requires a minimum load current at either the VO Seq or VO Bus output for proper operation. The converter is not damaged when operated under a no-load condition. See temperature derating curves for safe operating area (SOA), to determine output current derating at elevated ambient temperatures. When load current is supplied from the VO Seq output, the module exhibits higher power dissipation and slightly lower operating efficiency. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1%, with 100 ppm/°C temperature stability. When controlling the Track input from an external source, the slew rate of the applied signal must be greater than the minimum limit. Failure to allow the voltage to completely rise to the voltage at the VO (bus) output, at no less than the minimum specified rate, may thermally overstress the converter. The PEN and NEN inputs each have an internal pullup resistor. If the enable feature is not used, the PEN input (pin 2) should be left open circuit and the NEN input (pin 3) permanently connected to –VI. A discrete MOSFET or bipolar transistor is recommended for the enable control. The open-circuit voltage is less than 10 V. See the Application Information for a more detailed description. PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 PTB48560A ELECTRICAL CHARACTERISTICS (Unless otherwise stated, TA = 25°C, VI = 48 V, VO = 5 V, CO = 220 µF, and IO = IOmax) PARAMETER PTB48560A TEST CONDITIONS IO Output current Over VI range VI Input voltage range Over IO range MIN IO Bus 0.25 (1) %VO Over VI range ±0.2 ±1 %VO Load regulation Over IO range ±0.4 ±1 %VO Total output voltage variation Includes set-point, line, load, –40°C ≤ TA ≤ 85°C (3) %VO Adjust range Over VI range VO Ripple (peak-to-peak) 20-MHz bandwidth Transient response 0.1 A/µs load step, 50% to 100% IOmax Input current ±2 3.6 5.5 Recovery time 100 µs VO over/undershoot ±150 mV Track connected to -Sense –0.2 mA 1 Open-circuit voltage 0 Input high voltage (VIH) 2 Input low voltage (VIL) -0.2 VO Bus 0.48 8 9 VI increasing 34 VI decreasing 33 Over VI range (4) 0.8 Shutdown, followed by autorecovery Switching frequency %VO Open Pins 2 and 3 open ƒS V 84% Standby input current Undervoltage lockout ±3 RSET = 14.3 kΩ, VO =5 V Overcurrent threshold UVLO 400 Internal input capacitance (4) %VO Line regulation Input low current (IIL) (2) (3) V (3) ±0.5 Output enable inputs (pins 2, 3) (1) 75 A -40°C ≤ TA ≤ 85°C Referenced to -VI MTBF (2) UNIT Temperature variation Track input (pin 5) IO Bus 48 ±1 Efficiency η MAX 6 36 Set-point voltage tolerance VO TYP 500 mA 16 mA A V 600 1 220 V kHz µF External output capacitance Between both outputs and VO COM Isolation voltage Input-output 5,000 Isolation capacitance Input-output Isolation resistance Input-output 10 MΩ Reliability Telcordia SR-332 50% stress, TA = 40°C, ground benign 3.6 106 Hr 1,500 µF Vdc 2,000 pF The converter requires a minimum load current for proper operation. The converter is not damaged when operated under a no-load condition. See temperature derating curves for safe operating area (SOA), to determine output current derating at elevated ambient temperatures. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1%, with 100 ppm/°C temperature stability. The PEN and NEN inputs each have an internal pullup resistor. If the enable feature is not used, the PEN input (pin 2) should be left open circuit and the NEN input (pin 3) permanently connected to –VI. A discrete MOSFET or bipolar transistor is recommended for the enable control. The open-circuit voltage is less than 10 V. See the Application Information for a more detailed description. 5 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 PTB48560C ELECTRICAL CHARACTERISTICS (Unless otherwise stated, TA = 25°C, VI = 48 V, VO = 12 V, CO = 100 µF, and IO = IOmax) PARAMETER PTB48560C TEST CONDITIONS IO Output current Over VI range VI Input voltage range Over IO range MIN IO Bus 0.1 (1) %VO Over VI range ±0.2 ±1 %VO Load regulation Over IO range ±0.4 ±1 %VO Total output voltage variation Includes set-point, line, load, –40°C ≤ TA ≤ 85°C (3) %VO Adjust range Over VI range VO Ripple (peak-to-peak) 20-MHz bandwidth Transient Response 0.1 A/µs load step, 50% to 100% IOmax Input current ±2 9 88% RSET = open, VO = 9 V 86% 1 V %VO Recovery time 100 µs VO over/undershoot ±150 mV Track connected to -Sense Open-circuit voltage 0.48 0 Input high voltage (VIH) 2 Input low voltage (VIL) -0.2 Input low current (IIL) IO Bus Overcurrent threshold Shutdown, followed by autorecovery UVLO Undervoltage lockout ƒS Switching frequency mA VO Bus Open (4) 0.8 –0.48 8 VI increasing 34 VI decreasing 33 Over VI range 400 Between both outputs and VO COM 100 500 mA A V 600 kHz 1,500 µF 1 1,500 V mA 16 3.75 Internal input capacitance External output capacitance ±3 13.2 RSET = 9.09 kΩ, VO =12 V Pins 2 and 3 open 6 %VO Line regulation Standby input current (4) V (3) ±0.5 Output enable inputs (pins 2, 3) (2) (3) 75 A -40°C ≤ TA ≤ 85°C Referenced to -VI (1) (2) UNIT Temperature variation Track input (pin 5) MTBF 48 ±1 Efficiency η MAX 2.5 36 Set-point voltage tolerance VO TYP µF Isolation voltage Input-output Isolation capacitance Input-output Vdc Isolation resistance Input-output 10 MΩ Reliability Telcordia SR-332 50% stress, TA = 40°C, ground benign 3.4 106 Hrs 2,000 pF The converter requires a minimum load current for proper operation. The converter is not damaged when operated under a no-load condition. See temperature derating curves for safe operating area (SOA), to determine output current derating at elevated ambient temperatures. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1%, with 100 ppm/°C temperature stability. The PEN and NEN enable inputs each have an internal pullup resistor. If the enable feature is not used, the PEN input (pin 2) should be left open circuit and the NEN input (pin 3) permanently connected to –VI. A discrete MOSFET or bipolar transistor is recommended for the enable control. The open-circuit voltage is less than 10 V. See the Application Information for a more detailed description. PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 TERMINAL FUNCTIONS TERMINAL NAME NO. DESCRIPTION +VI (1) 1 The positive input for the module with respect to -VI. When powering the module from a negative input voltage, this input is connected to the input source ground. -VI (1) 4 The negative input supply for the module, and the 0-V reference for the PEN and NEN enable inputs. When powering the module from a positive source, this input is connected to the input source return. PEN (1) 2 An open-collector (open-drain) positive logic input that is referenced to -VI. When this input is pulled to -VI potential the converter output is disabled. This input must be open circuit for the converter to operate. The converter then produces an output whenever a valid input source is applied. NEN (1) (2) 3 An open-collector (open-drain) negative logic input that is referenced to -VI. This input must be pulled to -VI potential to enable the converter. When the input is open circuit, the converter output is disabled. If the enable feature is not used, this input should be permanently connected to -VI. The module then produces an output whenever a valid input source is applied. VO Bus 10 This is the positive power output with respect to VO COM, and the main output from the converter. It is dc isolated from the input power pins and produces a valid output voltage approximately 20 ms before the voltage at the Track terminal is allowed to rise. This provides the required standby power source to any downstream nonisolated modules in power-up sequencing applications. VO Seq 11 This is a sequenced output voltage from the converter that is controlled by the Track terminal during power-up transitions. It is only available to the PTB48560B, and used with the output voltage set to 3.3 V (an I/O supply voltage). During power up, the voltage at VO Seq rises with the Track terminal, typically 20 ms after the VO Bus output has reached regulation. VO COM 6 This is the output power return for both the VO Bus and VO Seq output voltages. This terminal should be connected to the common of the load circuit. Track 5 This terminal is used in power-up sequencing applications to control the output voltage of Auto-Track compatible modules, powered from the converter VOBus output. This includes the converter VOSeq output on the PTB48560B. The converter Track control has an internal transistor, which holds the voltage close to VOCOM potential for approximately 20 ms (40 ms with the PTB48560C) after the VOBus output is in regulation. Following this delay, the Track voltage and VOSeq rises simultaneously with the output voltage of all other modules controlled by Auto-Track. –Sense 7 Provides the converter with a remote sense capability when used with +Sense. For optimum output voltage accuracy, this pin should always be connected to VOCOM, close to the load circuit. This terminal is also the reference connection for both the output voltage set-point resistor and Track control. VO Adjust 8 A resistor must be connected between this terminal and -Sense to set the converter output voltage. A 0.05-W rated resistor may be used, with tolerance and temperature stability of 1% and 100 ppm/°C, respectively. If left open circuit, the converter output voltage defaults to its lowest value. The specification table gives the standard resistor values for the most common output voltages. +Sense 9 The +Sense pin can be connected to VOBus (or VOSeq) output. When connected to VOSeq, remote sense compensation is delayed until the converter's power-up sequence is complete. The voltage at VOBus is also raised slightly. The +Sense input may be left open circuit, but connecting it to one of the output terminals improves load regulation of that output. (1) (2) These functions indicate signals electrically common with the input. Denotes negative logic: Low (–VI) = Normal operation, Open = Output off 7 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS PTB48560B Characteristic Data (VO = 3.3 V) (1) (2) EFFICIENCY vs OUTPUT CURRENT OUTPUT VOLTAGE RIPPLE vs OUTPUT CURRENT 60 90 VO - Output Voltage Ripple - mVPP VI = 36 V Efficiency - % 80 VI = 75 V 70 VI = 60 V 60 VI = 48 V 50 40 50 VI = 75 V 40 VI = 60 V 30 20 0 30 0 1 2 3 4 5 6 7 VI = 48 V VI = 36 V 10 8 IO - Output Current - A 0 1 2 3 4 5 6 7 8 IO - Output Current - A Figure 1. Figure 2. POWER DISSIPATION vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT 90 7 400 LFM 5 Ambient Temperature − 5 C PD- Power Dissipation - W 80 VI = 75 V 6 VI = 60 V 4 VI = 48 V 3 VI = 36 V 2 1 0 0 1 2 3 4 5 6 IO - Output Current - A Figure 3. (1) (2) 8 7 8 70 200 LFM 60 100 LFM 50 40 Nat conv 30 20 0 2 4 6 IO − Output Current − A 8 Figure 4. All data listed in Figure 1, Figure 2, and Figure 3 have been developed from actual products tested at 25°C. This data is considered typical data for the dc-dc converter. The temperature derating curves represent operating conditions at which internal components are at or below manufacturer's maximum rated operating temperature. Derating limits apply to modules soldered directly to a 100–mm × 100–mm, double-sided PCB with 2 oz. copper. For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to Figure 4. PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS (continued) PTB48560A Characteristic Data (VO = 5 V) (3) (4) EFFICIENCY vs OUTPUT CURRENT OUTPUT VOLTAGE RIPPLE vs OUTPUT CURRENT 100 VO- Output Voltage Ripple - mVPP 100 90 Efficiency - % VI = 36 V 80 VI = 48 V 70 VI = 60 V 60 80 VI = 75 V 60 VI = 60 V VI = 48 V 40 VI = 36 V 20 VI = 75 V 0 50 0 1 2 3 4 5 6 0 1 5 POWER DISSIPATION vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT 6 90 VI = 75 V 5 80 Ambient Temperature - oC PD - Power Dissipation - W 4 Figure 6. 6 VI = 60 V VI = 48 V 4 3 VI = 36 V 2 1 100 LFM 70 200 LFM 60 400 LFM 50 Nat conv 40 30 0 0 1 2 3 4 IO - Output Current - A Figure 7. (4) 3 Figure 5. 7 (3) 2 IO - Output Current - A IO - Output Current - A 5 6 20 0 1 2 3 4 IO - Output Current - A 5 6 Figure 8. All data listed in Figure 5, Figure 6, and Figure 7 have been developed from actual products tested at 25°C. This data is considered typical data for the dc-dc converter. The temperature derating curves represent operating conditions at which internal components are at or below manufacturer's maximum rated operating temperature. Derating limits apply to modules soldered directly to a 100–mm × 100–mm, double-sided PCB with 2 oz. copper. For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to Figure 8. 9 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS (continued) PTB48560C Characteristic Data (VO = 12 V) (5) (6) EFFICIENCY vs OUTPUT CURRENT OUTPUT VOLTAGE RIPPLE vs OUTPUT CURRENT 100 VO - Output Voltage Ripple - mVPP 100 VI = 36 V 90 Efficiency - % VI = 48 V 80 VI = 60 V 70 VI = 75 V 60 VI = 60 V 60 0 0.5 1 1.5 2 VI = 48 V 40 20 VI = 36 V 0 50 VI = 75 V 80 2.5 0 POWER DISSIPATION vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT 2.5 80 5 VI = 75 V 4 Ambient Temperature - oC PD - Power Dissipation - W 2 90 VI = 60 V VI = 48 V 3 2 VI = 36 V 1 100 LFM 200 LFM 70 400 LFM Nat conv 60 50 40 30 0 0.5 1 1.5 IO - Output Current - A Figure 11. 10 1.5 Figure 10. 0 (6) 1 Figure 9. 6 (5) 0.5 IO - Output Current - A IO - Output Current - A 2 2.5 20 0 0.5 1 1.5 2 IO - Output Current - A 2.5 Figure 12. All data listed in Figure 9, Figure 10, and Figure 11 have been developed from actual products tested at 25°C. This data is considered typical data for the dc-dc converter. The temperature derating curves represent operating conditions at which internal components are at or below manufacturer's maximum rated operating temperature. Derating limits apply to modules soldered directly to a 100–mm × 100–mm, double-sided PCB with 2 oz. copper. For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to Figure 12. PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 APPLICATION INFORMATION Operating Features and System Considerations for the PTB48560x DC/DC Converters Primary-Secondary Isolation These converters incorporate electrical isolation between the input terminals (primary) and the output terminals (secondary). All converters are tested to a withstand voltage of 1500 VDC. This complies with UL/cUL 60950 and EN 60950 and the requirements for functional isolation. It allows the converter to be configured for either a positive or negative input voltage source. The data sheet Terminal Functions table provides guidance as to the correct reference that must be used for the external control signals. Undervoltage Lockout The undervoltage lockout (UVLO) is designed to prevent the operation of the converter until the input voltage is close to the minimum operating voltage. The converter is held off when the input voltage is below the UVLO threshold, and turns on when the input voltage rises above the threshold. This prevents high start-up current during normal power up of the converter, and minimizes the current drain from the input source during low input voltage conditions. The converter meets full specifications when the minimum specified input voltage is reached. The UVLO circuitry also overrides the operation of the PEN and NEN enable controls. Only when the input voltage is above the UVLO threshold do these inputs become functional. Soft-Start Power Up When the converter is first powered, the internal soft-start circuit limits how fast the output voltage can rise. The soft-start circuit functions whenever the converter output is enabled from the PEN and NEN inputs, or when a valid input source is first applied with the output enabled. It also functions on a recovery from a load fault, overtemperature, or input overvoltage condition. The purpose of the soft-start feature is to limit the surge of current drawn from the input source when the converter begins to operate. By limiting the rate at which the output voltage rises, the magnitude of current required to charge up the load circuit capacitance is significantly reduced. Figure 13 shows the power-up characteristic of a PTB48560C converter. The output voltage is set to 12 V. The soft-start circuit introduces a short time delay (typically 5-10 ms) before allowing the output to rise. The output then progressively rises to the voltage set-point. The waveforms were recorded with a resistive load of 2.5 A. UVLO Threshold VI (20 V/div) VO (5 V/div) II (0.5 A/div) tdelay t - Time = 5 ms/div Figure 13. Soft-Start Waveform Overcurrent Protection To protect against load faults, these converters incorporate output overcurrent protection. Applying a load to the 11 PTB48560A, PTB48560B PTB48560C SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 www.ti.com APPLICATION INFORMATION (continued) output that exceeds the converter overcurrent threshold (see applicable specification) causes the output voltage to momentarily fold back, and then shut down. Following shutdown, the module periodically attempts to automatically recover by initiating a soft-start power up. This is often described as a hiccup mode of operation, whereby the module continues in the cycle of successive shutdown and power up until the load fault is removed. Once the fault is removed, the converter automatically recovers and returns to normal operation. Input Overvoltage Protection The converter protects itself against input voltage surges and transients of up to 100 V. This is above the maximum continuous operating input voltage of 75 V. In order to protect itself, the converter output is disabled at some voltage above 75 V. This is to ensure that the converter internal components are not exposed to voltages above their stress ratings. The converter output remains off for some of the period that the input voltage is above the maximum continuous rating. Once the overvoltage event has passed, the output from the converter automatically restarts by executing a soft-start power up. Differential Output Voltage Sense A differential remote sense allows a converter regulation circuitry to compensate for limited amounts of IR drop, that may be incurred between the converter and load, in either the positive or return PCB traces. Connecting the +Sense and –Sense pins to the respective positive and ground reference of the load terminals improves the load regulation of the converter output voltage at that connection point. The –Sense pin should always be connected to the VO COM. The +Sense pin may be connected to either the +VO Bus or +VO Seq outputs. When the +Sense pin is connected to the VO Seq output, the voltage at VO Bus voltage regulates slightly higher. Depending on the load conditions on the VO Seq output, the voltage at VO Bus may be up to 100 mV higher than the converter set-point voltage. In addition, the Smart-Sense feature (incorporated into the converter) only engages sense compensation to the VO Seq output when that output voltage is close to the set-point. During a power-up sequencing event, the sense circuit automatically defaults to sensing the VO Bus voltage, internal to the converter. Leaving the +Sense and –Sense pins open does not damage the converter or load circuit. The converter includes default circuitry that keeps the output voltage in regulation. However, if the remote sense feature is not used, the –Sense pin should still be connected to VOCOM. Note: The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency-dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the sense pin connections, they are effectively placed inside the regulation control loop, which can adversely affect the stability of the converter. Overtemperature Protection Overtemperature protection is provided by an internal temperature sensor, which monitors the temperature of the converter PCB (close to pin 1). If the PCB temperature exceeds a nominal 115°C, the converter shuts down. The converter then automatically restarts when the sensed temperature falls to approximately 105°C. When operated outside its recommended thermal derating envelope (see data sheet derating curves), the converter typcially cycles on and off at intervals from a few seconds to one or two minutes. This is to ensure that the internal components are not permanently damaged from excessive thermal stress. Output Voltage Adjustment An external resistor is required to set the nominal output voltage(s) of the converter to a voltage higher than its minimum value. The resistor, RSET, must be connected directly between the VO Adjust (pin 8) and –Sense (pin 7) terminals. A 0.05-W rated resistor can be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C (or better). Place the resistor close to the converter and connect it using dedicated PCB traces (see Figure 14). Table 1 gives the nearest standard value of external resistor for the common voltages within each model's adjust range. The actual output voltage that the resistor value provides is also provided. 12 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 Table 1. Standard Values of RSET for Common Output Voltages PTB48560A PTB48560B PTB48560C VO (Required) RSET VO (Actual) RSET VO (Actual) RSET VO (Actual) 1.8 V – – Open 1.802 V – – 2V – – 200 kΩ 2.004 V – – 2.5 V – – 40.2 kΩ 2.498 V – – 3.3 V – – 5.36 kΩ 3.300 V – – 3.6 V Open 3.611 V 309 Ω 3.600 V – – 5V 14.3 kΩ 5.005 V – – – – 9V – – – – Open 9.015 V 10 V – – – – 73.2 kΩ 9.993 V 12 V – – – – 9.09 kΩ 12 V 13.2 V – – – – 0Ω 13.23 V For other output voltages, the value of the required adjust resistor may be calculated using Equation 1. RSET = RO x VR - RP ( VO - Vmin) (1) Table 2 gives the output voltage adjust range and the required equation constants for the converter model selected. To calculate the required value of RSET, simply locate the applicable constants and substitute these into the formula along with the desired output voltage. Table 2. Adjust Ranges and Equation Constants Model # PTB48560A PTB48560B VR 1.24 V 1.24 V PTB48560C 2.5 V RO 49.91 kΩ 36.55 kΩ 37.27 kΩ RP 30.1 kΩ 24.9 kΩ 22.1 kΩ VMIN 3.61 V 1.8 V 9.02 V VMAX 5.5 V 3.6 V 13.2 V Track 5 PTB48560A +VI 1 +VI +Sense VOBus 2 PEN VOAdjust 3 NEN VOCOM -VI 4 9 VO 10 8 6 CO 220 mF RSET 7 -VI -Sense Figure 14. Output Voltage Adjustment 13 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 Input Current Limiting The converter is not internally fused. For safety and overall system protection, the maximum input current to the converter must be limited. Active or passive current limiting can be used. Passive current limiting can be a fast-acting fuse. A 125-V fuse, rated no more than 5 A, is recommended. Active current limiting can be implemented with a current limited Hot-Swap controller. Thermal Considerations Airflow may be necessary to ensure that the module can supply the desired load current in environments with elevated ambient temperatures. The required airflow rate is determined from the safe operating area (SOA). The SOA is the area beneath the applicable airflow rate curve on the graph of temperature derating vs output current. (See the Typical Characteristics.) Operating the converter within the SOA limits ensures that all the internal components are at or below their stated maximum operating temperatures. Using the On/Off Enable Controls on the PTB48560x Auto-Track Compatible DC/DC Converters The converter incorporates two output enable controls. PEN (pin 2) is the positive enable input, and NEN (pin 3) is the negative enable input. Both inputs are electrically referenced to -VI (pin 4) on the primary or input side of the converter. The enable pins are ideally controlled with an open-collector (or open-drain) discrete transistor. Each input has an internal pullup resistor to a reference. There is no benefit to adding pullup resistors external to the module. If they are added, the maximum input voltage for these inputs must be limited to a maximum of 60 V. Automatic (UVLO) Power Up Connecting NEN (pin 3) to -VI (pin 4) and leaving PEN (pin 2) open-circuit, configures the converter for automatic power up. The converter control circuitry incorporates an undervoltage lockout (UVLO) function, which disables the converter until the minimum specified input voltage is present at ±VI (see the Electrical Characteristics table). The UVLO circuitry ensures a clean transition during power up and power down, allowing the converter to tolerate a slow rising input voltage. For most applications, the PEN and NEN enable controls can be configured for automatic power up. Positive Output Enable (Negative Inhibit) To configure the converter for a positive enable function, connect NEN (pin 3) to -VI (pin 4), and apply the system On/Off control signal to PEN (pin 2). In this configuration, applying less than 0.8 V (with respect to -VI potential) to pin 2 disables the converter output. Figure 15 gives an example circuit that uses a MOSFET transistor. +VI 1 2 3 1 = Outputs Off −VI Q1 BSS138 4 +VI DC/DC Module PEN NEN −VI Figure 15. Positive Enable Configuration Negative Output Enable (Positive Inhibit) To configure the converter for a negative enable function, PEN (pin 2) is left open circuit, and the system On/Off control signal is applied to NEN (pin 3). A low-level control signal (less than 0.8 V) must then be applied to pin 3 to enable an output from the converter. An example of this configuration is detailed in Figure 16. 14 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 +VI 1 +VI DC/DC Module 2 3 Q1 BSS138 PEN NEN 1 = Outputs On -VI 4 -VI Figure 16. Negative Enable Configuration On/Off Enable Turn-On Time Once enabled, the converter executes a soft-start power up. The converter exibits a short delay of approximately 7 ms, measured from the transition of the enable signal to the instance the VO Bus output begins to rise. The output is in regulation within 20 ms. VOBus (5 V/div) II (1 A/div) Q1 VDS (5 V/div) t − 5 ms/div Figure 17. Output Enable Power-Up Characteristic 15 PTB48560A, PTB48560B PTB48560C SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 www.ti.com Sequenced Power Up with POL Modules Overview The main output from the PTB48560x converters is VOBus. In power sequencing applications, VOBus is used as the intermediate supply voltage for powering one or more downstream nonisolated power modules that incorporate Auto-Track™1. The output voltage from Auto-Track compliant modules can be sequenced using a control input called Track. The Track input directly controls the output of a module from zero to its set-point voltage. The control is on a volt-for-volt basis, and allows multiple modules to follow a common analog signal during power-up events. The Track signal attempts to start rising when the nonisolated modules are first powered from VOBus. However, for proper sequencing, the voltage must be held at ground potential for at least 20 ms (40 ms for 12-V input modules) after VOBus is in regulation. This is necessary to allow time for the nonisolated modules to complete their power-up initialization. The Track pin of each PTB48560x converter has an internal open-drain transistor that automatically holds the Track signal at ground potential to comply with this requirement. The PTB48560B (1.8 V to 3.6 V) has a VOSeq output. VOSeq is internally derived from VOBus and regulated to the same set-point voltage. It has the added feature of being controlled by the Track input. During power up, this output can sequence with the outputs of the nonisolated modules powered from VOBus. Auto-Track Features Figure 18 shows a block diagram of the converter Auto-Track features. The components shaded are only present in the PTB48560B. During power up, VOBus rises promptly, after the converter is connected to a valid input source and its output is enabled. VOSeq (PTB48560B) is the Auto-Track compatible output that is controlled by the voltage presented at the Track terminal. The control is active from 0 V up to a voltage just below the VOBus output. Between these limits, the voltage at VOSeq follows that at the Track terminal. Once the Track voltage is at the VOBus voltage, raising it higher has no further effect. The voltage at VOSeq cannot go higher than VOBus, and if connected to +Sense, it regulates at the set-point voltage.2 The Track input to the PTB48560x series of converters include a pullup resistor (RTRK) to VOBus, and a 1-µF capacitor (CTRK) to -Sense. These components are standard on all Auto-Track compatible modules. They form an R–C time constant that cause the Track voltage to rise when the internal MOSFET is turned off. The unity-gain relationship between VOSeq and the Track input is the same as all other Auto-Track compliant outputs.3 The VOSeq output also follows a compatible external ramp waveform applied to the Track pin.4, 5 The internal MOSFET is designed to hold the Track voltage at ground potential for the required period after the VOBus output is in regulation. 16 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 VOBus Smart Sense To Internal Error Amplifier +Sense VOSeq R(TRK) 24.9 kW Track Supply Supervisor 20-mS Delay C(TRK) 1 mF VOCom Note: The shaded functions are only available with the PTB48560B (3.3-V output). Figure 18. Block Diagram of Auto-Track Features Notes: 1. Auto-Track compatible modules incorporate a Track input that can take direct control of the output voltage during power-up transistions. The control relationship is on a volt-for-volt basis and is active between the 0 V and the module set-point voltage. Once the Track input is above the set-point voltage, the module remains at its set-point. Connecting the Track input of a number of such modules together allows their outputs to follow a common control voltage during power up. 2. When +Sense is connected to the VOSeq output of the PTB48560B, the VOSeq output is tightly regulated to the set-point voltage. In this configuration, the voltage at the VOBus output is up to 100 mV higher. 3. The VOSeq output on the PTB48560B cannot sink load current. This constraint does not allow the module to coordinate a sequenced power down. 4. The slew rate for the Track input signal must be between 0.1 V/ms and 1 V/ms. Above this range, the VOSeq output may no longer accurately follow the Track input voltage. A slew rate below this range may thermally stress the converter. These slew rate limits are automatically met whenever the Track voltage is controlled by the internal R-C time constant of the modules being sequenced. 5. If an external voltage is used to control the Track terminal, the source current must be limited. A resistance value of 2.74-kΩ is recommended for this purpose. This is necessary to protect the internal transistor to the converter. This transistor holds the track control voltage at ground potential for 20 ms after the VOBus output is in regulation. 17 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 Power-Up Sequencing With A VO SEQ Output (PTB48560B) Figure 19 shows the PTB48560B converter (U1) providing two 3.3-V sources. This allows it to both power and sequence with one or more downstream nonisolated modules. The example shows two 3.3-V input PTH03050W modules (U2 and U3), each rated for up to 6 A of output current. The selection and current rating of the nonisolated modules depends on the requirements of a specific application. The number of modules, their respective output voltage, and load current rating combine with the load required at the VOSeq output. The total must be supplied by the PTB48560B, and cannot exceed that available at the VOBus output. U1 5 Track VOSEQ (3.3 V) PTB48560B +Sense +VI 1 +VI VOSeq VOBus 2 PEN 3 4 Track 10 3 8 -Sense 6 R1 5.36 kW VI PTH03050W VO 6 Inhibit GND Adjust 4 1 5 C1 47 mF NEN -V I 2 U2 11 VOAdjust VOCOM -V I 9 R2 2.21 kW C2 100 mF V(POL)1 (2.5 V) C3 100 mF 7 2 U3 Track 3 VI PTH03050W VO 6 V(POL)2 (1.8 V) Inhibit GND Adjust 4 1 5 C4 100 mF R3 5.49 kW C5 100 mF Figure 19. Power-Up Sequencing With Nonisolated POL Modules The output voltage adjust range of the PTB48560B is 1.8 V to 3.6 V. In these applications, the output voltage must always be set to 3.3 V (R1 = 5.36 kΩ). This sets the output voltage of both the VOBus and VOSeq outputs. The output voltage of the 3.3-V input (nonisolated) modules, U2 and U3, can be set to any voltage over the range, 0.8 V to 2.5 V. In this example, they are set to 2.5 V (R2 = 2.21 kΩ) and 1.8 V (R3 = 5.49 kΩ), respectively. Figure 20 shows the power-up waveforms from Figure 19 when the Track input to all three modules are simply connected together. The converter provides input power to the downstream nonisolated modules via the VOBus output. This output rises first to allow the nonisolated modules to complete their power-up initialization. The VOSeq (3.3 V), V(POL)1 (2.5 V) and V(POL)2 (1.8 V), outputs supply the load circuit, and rise simultaneously when the converter removes the internal ground signal to its own Track input. The VOSeq output rises with the outputs from the nonisolated modules, until it reaches its set-point voltage. 18 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 VOBus (1 V/div) VOSeq (1 V/div) V(POL)1 (1 V/div) V(POL)2 (1 V/div) td = 20 ms t − 20 ms/div Figure 20. Power-Up Waveforms with POL Modules Power-Up Sequencing Without A VOSEQ Output (PTB48560A/C) Although the PTB48560A or PTB48560C do not have a VOSeq output, they can provide the input power and coordinate the power-up sequencing to two or more nonisolated, Auto-Track compliant power modules. Figure 21 shows the PTB48560A (5 V) converter (U1) configured to provide both the input source and the power-up sequence timing to two 5-V input nonisolated modules. The example shows two PTH05050W modules (U2 and U3), each rated for up to 6 A of output current. In this case, the number of downstream modules, and their respective output voltage and load current rating, is only limited by the amount of current available at the VOBus output. 19 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 U1 5 Track VOBUS (5 V) PTB48560A +Sense +VI 1 +VI PEN VOBus 4 10 -Sense 6 R1 14.3 kW VI PTH05050W VO 6 Inhibit GND Adjust 4 1 5 C1 47 mF NEN -V I 3 8 VOAdjust VOCOM -V I 2 U2 Track 2 3 9 R2 698 W C2 100 mF V(POL)1 (3.3 V) C3 100 mF 7 2 U3 Track 3 VI PTH05050W VO 6 V(POL)2 (1.5 V) Inhibit GND Adjust 4 1 5 C4 100 mF R3 8.87 kW C5 100 mF Figure 21. Power-Up Sequencing With Nonisolated POL Modules The output voltage of the PTB48560 must be set to a valid intermediate supply voltage. This depends on the input voltage requirements of the downstream modules. For 5-V input modules, the PTB48560A is selected and adjusted for an output of 5 V. For 12-V input modules, the PTB48560C is used and adjusted for an output of 12 V. U2 and U3, can be set to any voltage over their applicable adjustment range. In this example, they are set to 3.3 V (R2 = 698 Ω) and 1.5 V (R3 = 8.87 kΩ), respectively. Figure 22 shows the power-up waveforms from Figure 21 when the Track control of all three modules are simply connected together. The PTB48560 converter (U1) provides the required intermediate voltage from the VOBus output to power the downstream modules, while holding the common Track control at ground potential. After allowing times for U2 and U3 to initialize, U1 removes the ground from the Track control, allowing this voltage to rise. The outputs from the two nonisolated modules then rise simultaneously to their respective set-point voltages. 20 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 VOBus (1 V/div) V(POL)1 (1 V/div) V(POL)2 (1 V/div) td = 20 ms t − 10 ms/div Figure 22. Power-Up Waveform 21 PTB48560A, PTB48560B PTB48560C www.ti.com SLTS236A – MARCH 2005 – REVISED OCTOBER 2005 Stand-Alone Operation The wide output voltage adjust range makes either model of the PTB48560 series of converters an attractive product as a stand-alone dc/dc converter. In these applications, it is not required to power up or sequence with any nonisolated POL modules. The output voltage can be adjusted to any value within the applicable adjust range. The Auto-Track features are simply not used. Figure 23 shows the recommended configuration when these converters are used as a stand-alone regulator. The main output (VO Bus) can be used to supply the load directly. Both the Track pin and the VO Seq output (PTB48560B) are simply left open circuit. The +Sense pin should be connected to the VO Bus output for improved load regulation. When the converter is operated in this mode, the output from VO Bus rises promptly on power up. Track 5 PTB48560x +Sense +VI 1 2 3 −VI 4 +VI PEN VOSeq VOBus VOAdjust 9 11 10 8 NEN RSet VOCOM −VI C1 220 mF −Sense 6 7 Figure 23. Stand-Alone Configuration 22 L O A D PACKAGE OPTION ADDENDUM www.ti.com 18-Jul-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty PTB48560AAH ACTIVE DIP MOD ULE ERW 11 12 TBD Call TI Level-1-235C-UNLIM PTB48560AAS ACTIVE DIP MOD ULE ERY 11 12 TBD Call TI Level-1-235C-UNLIM PTB48560AAZ ACTIVE DIP MOD ULE ERY 11 12 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTB48560BAH ACTIVE DIP MOD ULE ERW 11 12 TBD Call TI Level-1-235C-UNLIM PTB48560BAS ACTIVE DIP MOD ULE ERY 11 12 TBD Call TI Level-1-235C-UNLIM PTB48560BAZ ACTIVE DIP MOD ULE ERY 11 12 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTB48560CAH ACTIVE DIP MOD ULE ERW 11 12 TBD Call TI Level-1-235C-UNLIM PTB48560CAS ACTIVE DIP MOD ULE ERY 11 12 TBD Call TI Level-1-235C-UNLIM PTB48560CAZ ACTIVE DIP MOD ULE ERY 11 12 Pb-Free (RoHS) Call TI Level-3-260C-168 HR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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