New Product Si4056DY Vishay Siliconix N-Channel 100 V (D-S) MOSFET FEATURES PRODUCT SUMMARY VDS (V) RDS(on) () Max. ID (A)a 0.023 at VGS = 10 V 11.1 100 0.024 at VGS = 7.5 V 10.8 0.031 at VGS = 4.5 V 9.5 • TrenchFET® Power MOSFET • 100 % Rg and UIS Tested • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 Qg (Typ.) 9.7 nC APPLICATIONS SO-8 S 1 8 D S 2 7 D S 3 6 D G 4 5 D • • • • D DC/DC Primary Side Switch Telecom/Server Industrial Synchronous Rectification G Top View S Ordering Information: Si4056DY-T1-GE3 (Lead (Pb)-free and Halogen-free) N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) Parameter Symbol Limit Drain-Source Voltage VDS 100 Gate-Source Voltage VGS ± 20 TC = 25 °C Continuous Drain Current (TJ = 150 °C) 8.8 ID TA = 25 °C 7.3b, c 5.8b, c TA = 70 °C IDM Continuous Source-Drain Diode Current Single Pulse Avalanche Current Avalanche Energy TC = 25 °C 5.1 2.2b, c IAS 15 EAS 11.2 TC = 25 °C Maximum Power Dissipation mJ 5.7 TC = 70 °C 3.6 PD TA = 25 °C W 2.5b, c 1.6b, c TA = 70 °C Operating Junction and Storage Temperature Range A 70 IS TA = 25 °C L = 0.1 mH V 11.1 TC = 70 °C Pulsed Drain Current (t = 300 µs) Unit TJ, Tstg °C - 55 to 150 THERMAL RESISTANCE RATINGS Parameter Maximum Junction-to-Ambientb, d t 10 s Maximum Junction-to-Foot (Drain) Steady State Notes: a. Based on TC = 25 °C. b. Surface mounted on 1" x 1" FR4 board. c. t = 10 s. d. Maximum under steady state conditions is 85 °C/W. Document Number: 62662 S12-1136-Rev. A, 21-May-12 Symbol Typical Maximum RthJA 35 50 RthJF 18 22 For technical questions, contact: [email protected] Unit °C/W www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 New Product Si4056DY Vishay Siliconix SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) Parameter Symbol Test Conditions Min. VDS VGS = 0 V, ID = 250 µA 100 Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS/TJ VDS Temperature Coefficient VGS(th) Temperature Coefficient VGS(th)/TJ Gate-Source Threshold Voltage V 67 ID = 250 µA mV/°C -5 VGS(th) VDS = VGS , ID = 250 µA 2.8 V Gate-Source Leakage IGSS VDS = 0 V, VGS = ± 20 V ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 100 V, VGS = 0 V 1 VDS = 100 V, VGS = 0 V, TJ = 55 °C 10 On-State Drain Currenta ID(on) VDS 5 V, VGS = 10 V VGS 10 V, ID = 15 A 0.017 0.023 RDS(on) VGS 7.5 V, ID = 12 A 0.018 0.024 VGS 4.5 V, ID = 10 A 0.022 0.031 VDS = 15 V, ID = 15 A 26 Drain-Source On-State Resistancea Forward Transconductancea gfs 1.5 30 µA A S Dynamicb Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss 900 VDS = 50 V, VGS = 0 V, f = 1 MHz 340 VDS = 50 V, VGS = 10 V, ID = 10 A 19.6 29.5 9.7 15 31 Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Output Charge Qoss VDS = 50 V, VGS = 0 V Rg f = 1 MHz Gate Resistance tr Rise Time td(off) Turn-Off Delay Time Fall Time Turn-On Delay Time VDD = 50 V, RL = 5 ID 10 A, VGEN = 7.5 V, Rg = 1 26.2 40 0.85 1.7 13 26 14 28 19 38 20 td(on) 11 22 10 20 VDD = 50 V, RL = 5 ID 10 A, VGEN = 10 V, Rg = 1 tf Fall Time 0.2 10 td(off) Turn-Off Delay Time nC 4.3 tf tr Rise Time 2.8 VDS = 50 V, VGS = 4.5 V, ID = 10 A td(on) Turn-On Delay Time pF 20 40 9 18 ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulse Diode Forward Currenta IS TC = 25 °C 5.1 ISM VSD Body Diode Voltage 70 IS = 4 A 0.77 1.1 A V Body Diode Reverse Recovery Time trr 34 65 ns Body Diode Reverse Recovery Charge Qrr 34 65 nC Reverse Recovery Fall Time ta Reverse Recovery Rise Time tb IF = 5 A, di/dt = 100 A/µs, TJ = 25 °C 20 14 ns Notes: a. Pulse test; pulse width 300 µs, duty cycle 2 % b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com 2 For technical questions, contact: [email protected] Document Number: 62662 S12-1136-Rev. A, 21-May-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 New Product Si4056DY Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 70 50 VGS = 10 V thru 5 V 40 ID - Drain Current (A) ID - Drain Current (A) 56 42 VGS = 4 V 28 14 30 TC = 25 °C 20 10 TC = 125 °C VGS = 3 V 0 TC = - 55 °C 0 0 1 2 3 4 VDS - Drain-to-Source Voltage (V) 5 0.0 1.5 0.05 1500 0.04 1200 VGS = 4.5 V VGS = 7.5 V 0.02 4.5 6.0 7.5 Transfer Characteristics C - Capacitance (pF) RDS(on) - On-Resistance (Ω) Output Characteristics 0.03 3.0 VGS - Gate-to-Source Voltage (V) VGS = 10 V Ciss 900 Coss 600 300 0.01 Crss 0 0.00 0 10 20 30 ID - Drain Current (A) 40 0 50 20 40 60 80 VDS - Drain-to-Source Voltage (V) On-Resistance vs. Drain Current Capacitance 10 2.1 ID = 15 A 8 RDS(on) - On-Resistance (Normalized) ID = 10 A VGS - Gate-to-Source Voltage (V) 100 VDS = 50 V 6 VDS = 25 V VDS = 75 V 4 2 0 0.0 4.4 8.8 13.2 17.6 Qg - Total Gate Charge (nC) Gate Charge Document Number: 62662 S12-1136-Rev. A, 21-May-12 22 VGS = 10 V 1.8 1.5 VGS = 4.5 V 1.2 0.9 0.6 - 50 - 25 0 25 50 75 100 125 150 TJ - Junction Temperature (°C) On-Resistance vs. Junction Temperature For technical questions, contact: [email protected] www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 New Product Si4056DY Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 100 0.15 ID = 15 A 0.12 TJ = 150 °C RDS(on) - On-Resistance (Ω) IS - Source Current (A) 10 TJ = 25 °C 1 0.1 0.09 0.06 0.01 0.03 0.001 0.00 TJ = 125 °C TJ = 25 °C 0.0 0.2 0.4 0.6 0.8 1.0 VSD - Source-to-Drain Voltage (V) 1.2 0 4 6 8 10 VGS - Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 0.5 200 0.2 160 - 0.1 120 Power (W) VGS(th) (V) 2 ID = 5 mA - 0.4 80 ID = 250 μA - 0.7 - 1.0 - 50 40 - 25 0 25 50 75 100 TJ - Temperature (°C) 125 150 Threshold Voltage 0 0.001 0.01 0.1 Time (s) 1 10 Single Pulse Power, Junction-to-Ambient 100 IDM Limited ID - Drain Current (A) 10 ID Limited 1 ms 1 Limited by RDS(on)* 10 ms 100 ms 0.1 1s TA = 25 °C Single Pulse 0.01 0.01 10 s BVDSS Limited DC 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Safe Operating Area, Junction-to-Ambient www.vishay.com 4 For technical questions, contact: [email protected] Document Number: 62662 S12-1136-Rev. A, 21-May-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 New Product Si4056DY Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 15 ID - Drain Current (A) 12 9 6 3 0 0 25 50 75 100 125 150 TC - Case Temperature (°C) 7.0 2.0 5.6 1.6 4.2 1.2 Power (W) Power (W) Current Derating* 2.8 1.4 0.8 0.4 0.0 0.0 0 25 50 75 100 TC - Case Temperature (°C) Power, Junction-to-Foot 125 150 0 25 50 75 100 125 150 TA - Ambient Temperature (°C) Power, Junction-to-Ambient * The power dissipation PD is based on TJ(max.) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. Document Number: 62662 S12-1136-Rev. A, 21-May-12 For technical questions, contact: [email protected] www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 New Product Si4056DY Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 Notes: 0.1 PDM 0.05 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = R thJA = 85 °C/W 0.02 3. T JM - TA = PDMZthJA(t) Single Pulse 0.01 0.0001 0.001 0.01 4. Surface Mounted 0.1 1 10 100 1000 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 10 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Foot Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?62662. www.vishay.com 6 For technical questions, contact: [email protected] Document Number: 62662 S12-1136-Rev. A, 21-May-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix SOIC (NARROW): 8-LEAD JEDEC Part Number: MS-012 8 6 7 5 E 1 3 2 H 4 S h x 45 D C 0.25 mm (Gage Plane) A e B All Leads q A1 L 0.004" MILLIMETERS INCHES DIM Min Max Min Max A 1.35 1.75 0.053 0.069 A1 0.10 0.20 0.004 0.008 B 0.35 0.51 0.014 0.020 C 0.19 0.25 0.0075 0.010 D 4.80 5.00 0.189 0.196 E 3.80 4.00 0.150 e 0.101 mm 1.27 BSC 0.157 0.050 BSC H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.50 0.93 0.020 0.037 q 0° 8° 0° 8° S 0.44 0.64 0.018 0.026 ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498 Document Number: 71192 11-Sep-06 www.vishay.com 1 VISHAY SILICONIX TrenchFET® Power MOSFETs Application Note 808 Mounting LITTLE FOOT®, SO-8 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/ppg?72286), for the basis of the pad design for a LITTLE FOOT SO-8 power MOSFET. In converting this recommended minimum pad to the pad set for a power MOSFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. 0.288 7.3 0.050 1.27 0.196 5.0 0.027 0.69 0.078 1.98 0.2 5.07 Figure 1. Single MOSFET SO-8 Pad Pattern With Copper Spreading Document Number: 70740 Revision: 18-Jun-07 0.050 1.27 0.088 2.25 0.088 2.25 0.027 0.69 0.078 1.98 0.2 5.07 Figure 2. Dual MOSFET SO-8 Pad Pattern With Copper Spreading The minimum recommended pad patterns for the single-MOSFET SO-8 with copper spreading (Figure 1) and dual-MOSFET SO-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose. Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. www.vishay.com 1 APPLICATION NOTE In the case of the SO-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOSFET for a single MOSFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. 0.288 7.3 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SO-8 0.172 (4.369) 0.028 0.022 0.050 (0.559) (1.270) 0.152 (3.861) 0.047 (1.194) 0.246 (6.248) (0.711) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 22 Document Number: 72606 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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Material Category Policy Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Revision: 12-Mar-12 1 Document Number: 91000