STD30PF30L P-CHANNEL 30V - 0.025 Ω - 24A IPAK/DPAK STripFET™ II POWER MOSFET TYPE STD30PF30L ■ ■ ■ ■ ■ ■ VDSS RDS(on) ID 30 V <0.028 Ω 24 TYPICAL RDS(on) = 0.025Ω STANDARD OUTLINE FOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY LOW TRESHOLD DEVICE LOW GATE CHARGE THROUGH-HOLE IPAK (TO-251) POWER PACKAGE IN TUBE (SUFFIX “-1") SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX “T4") 3 3 1 2 1 IPAK TO-251 (Suffix “-1”) DPAK TO-252 (Suffix “T4”) DESCRIPTION This MOSFET is the latest development of STMicroelectronics unique “Single Feature Size™” stripbased process The resulting transistor shows extremely high packing density for low on-resistance and low gate charge. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ DC-DC CONVERTERS Ordering Information SALES TYPE STD30PF03LT4 STD30PF03L-1 MARKING D30PF30L D30PF30L PACKAGE TO-252 TO-251 PACKAGING TAPE & REEL TUBE ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID(#) ID(#) IDM(•) Ptot EAS(1) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Single Pulse Avalanche Energy Storage Temperature Operating Junction Temperature (•) Pulse width limited by safe operating area. (#) Current limited by wire bonding (1) Starting T j = 25 oC, ID =12 A, VDD = 15V May 2003 . Value 30 30 ± 16 24 24 96 70 0.47 850 Unit V V V A A A W W/°C mJ -55 to 175 °C Note: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed 1/10 STD30PF30L THERMAL DATA Rthj-case Rthj-amb Rthj-pcb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient (*)Thermal Resistance Junction-pcb Maximum Lead Temperature For Soldering Purpose Max Max Max 2.14 100 50 275 °C/W °C/W °C/W °C (*) When Mounted on 1 inch2 FR-4 board, 2 oz of Cu ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating TC = 100°C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 16 V V(BR)DSS Min. Typ. Max. 30 Unit V 1 10 µA µA ±100 nA Max. Unit ON (*) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS RDS(on) Static Drain-source On Resistance VGS = 10 V VGS = 5 V ID = 250 µA Min. Typ. 1 ID = 12 A ID = 12 A V 0.025 0.032 0.028 0.040 Ω Ω Typ. Max. Unit DYNAMIC Symbol 2/10 Parameter Test Conditions gfs (*) Forward Transconductance VDS = 15 V Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 ID = 12 A Min. 23 S 1670 345 120 pF pF pF STD30PF30L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time ID = 24 A VDD = 25 V RG = 4.7 Ω VGS = 5 V (Resistive Load, Figure 3) 64 122 Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 15V ID = 24A VGS= 5V 21 5.5 11 28 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions Min. ID = 24 A VDD = 25 V RG = 4.7Ω, VGS = 5 V (Resistive Load, Figure 3) 36 26 ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) VSD (*) Forward On Voltage ISD = 12 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current di/dt = 100A/µs ISD = 24 A VDD = 24 V Tj = 150°C (see test circuit, Figure 5) trr Qrr IRRM Test Conditions Min. Typ. VGS = 0 40 52 2.6 Max. Unit 24 96 A A 1.3 V ns nC A (*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (•)Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/10 STD30PF30L Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/10 STD30PF30L Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature . . 5/10 STD30PF30L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/10 STD30PF30L TO-251 (IPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 B5 0.033 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A1 C2 A3 A C H B B3 = 1 = 2 G = = = E B2 = 3 B5 L D B6 L2 L1 0068771-E 7/10 STD30PF30L TO-252 (DPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.9 0.025 0.035 B2 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 9.35 10.1 0.368 0.397 L2 0.8 L4 0.031 0.6 1 0.023 0.039 A1 C2 A H A2 C DETAIL "A" L2 D = 1 = G 2 = = = E = B2 3 B DETAIL "A" L4 0068772-B 8/10 STD30PF30L *on sales type 9/10 STD30PF30L Information furnished is believed to be accurate and reliable. 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