TC7126/A
3-1/2 Digit Analog-to-Digital Converters
Features
General Description
• Internal Reference with Low Temperature Drift
- TC7126: 80ppm/°C Typical
- TC7126A: 35ppm/°C Typical
• Zero Reading with Zero Input
• Low Noise: 15µVP-P
• High Resolution: 0.05%
• Low Input Leakage Current: 1pA Typ., 10pA Max.
• Precision Null Detectors with True Polarity at Zero
• High-Impedance Differential Input
• Convenient 9V Battery Operation with Low Power
Dissipation: 500µW Typ., 900µW Max.
The TC7126A is a 3-1/2 digit CMOS analog-to-digital
converter (ADC) containing all the active components
necessary to construct a 0.05% resolution measurement system. Seven-segment decoders, digit and
polarity drivers, voltage reference, and clock circuit are
integrated on-chip. The TC7126A directly drives a liquid crystal display (LCD), and includes a backplane
driver.
Applications
• Thermometry
• Bridge Readouts: Strain Gauges, Load Cells,
Null Detectors
• Digital Meters and Panel Meters:
- Voltage/Current/Ohms/Power, pH
• Digital Scales, Process Monitors
Device Selection Table
Package
Code
Package
Temperature
Range
CPL
40-Pin PDIP
0°C to +70°C
IPL
40-Pin PDIP (TC7126 Only)
-25°C to +85°C
CKW
44-Pin PQFP
0°C to +70°C
CLW
44-Pin PLCC
0°C to +70°C
2002 Microchip Technology Inc.
A low cost, high resolution indicating meter requires
only a display, four resistors, and four capacitors. The
TC7126A's extremely low power drain and 9V battery
operation make it ideal for portable applications.
The TC7126A reduces linearity error to less than 1
count. Rollover error (the difference in readings for
equal magnitude, but opposite polarity input signals) is
below ±1 count. High-impedance differential inputs
offer 1pA leakage current and a 1012Ω input impedance. The 15µVP-P noise performance ensures a "rock
solid" reading, and the auto-zero cycle ensures a zero
display reading with a 0V input.
The TC7126A features a precision, low drift internal
voltage reference and is functionally identical to the
TC7126. A low drift external reference is not normally
required with the TC7126A.
DS21458B-page 1
TC7126/A
Package Type
39 VREF-
G1 8
38 CREF+
27 POL
32 CAZ
V+ 8
26 AB4
31 VBUFF
D1 9
25 E3
C1 10
24 F3
B1 11
23 B3
A1
G2
A3
C3
G3
BP
NC
POL
AB4
F3
E3
B3
12 13 14 15 16 17 18 19 20 21 22
44-Pin PDIP (Reverse)
40 OSC1
OSC1
1
OSC2
OSC2
2
38 OSC3
OSC3
3
38 C1
37 TEST
TEST
4
37 B1
5
36 VREF+
VREF+ 5
36 A1
6
35 VREF-
VREF-
6
35
34 CREF+
CREF+
7
33 CREF32 ANALOG
COMMON
31 VIN+
CREF-
8
1
2
C1
3
B1
4
A1
F1
G1
7
E1
8
D2
9
C2 10
Normal Pin
Configuration
TC7126CPL
TC7126ACPL
TC7126IPL
TC7126AIPL
ANALOG 9
COMMON
VIN+ 10
Reverse Pin
Configuration
TC7126RCPL
TC7126ARCPL
TC7126RIPL
TC7126ARIPL
40 V+
39 D1
34 G1
33 E1
32 D2
31 C2
30 VIN-
VIN- 11
30 B2
12
29 CAZ
CAZ
29 A2
A2
F2 13
14
12
VBUFF 13
28 VBUFF
27 VINT
28
27 E2
26 V-
V-
15
26 D3
B3
16
25 G2
G2 16
25 B3
F3 17
24 C3
C3
17
24
18
23 A3
A3
18
23 E3
E3
AB4
19
POL 20
(Minus Sign)
100's
G3 19
22 G3
21 BP
(Backplane)
BP 20
(Backplane)
10's
F2
VINT 14
D3 15
100's
1's
F1
B2 11
E2
1000's
28 BP
39
V+
D1
V-
OSC1 7
29 G3
TC7126CKW
TC7126ACKW
40-Pin PDIP (Normal)
100's
VINT
33 VIN-
NC 5
18 19 20 21 22 23 24 25 26 27 28
10's
VBUFF
34 NC
OSC2 6
29 V-
1's
CAZ
30 A3
30 VINT
D3 17
VIN-
OSC3 4
E2
E2 16
31 C3
D3
F2 15
37 CREF36 ANALOG
COMMON
35 VIN+
F2
B2 13
A2 14
32 G2
A2
NC 12
NC 2
TEST 3
B2
TC7126CLW
TC7126ACLW
33 NC
C2
C2 11
NC 1
D2
D2 10
ANALOG
COMMON
VIN+
44 43 42 41 40 39 38 37 36 35 34
F1 7
E1 9
CREF-
44 43 42 41 40
E1
1
VREF-
2
CREF+
OSC1
3
F1
NC
4
G1
V+
5
VREF+
D1
VREF+
C1
6
TEST
B1
OSC3
44-Pin PQFP
A1
OSC2
44-Pin PLCC
F3
22 AB4
100's
1000's
21 POL
(Minus Sign)
NC = No Internal Connection
DS21458B-page 2
2002 Microchip Technology Inc.
TC7126/A
Typical Application
0.1µF
1MΩ
+
Analog
Input
–
31
34
33
CREF+
CREF-
TC7126
TC7126A
LCD
2–19 Segment
22–25 Drive
VIN+
0.01µF
30 VIN-
POL
BP
32 ANALOG
COMMON
V+
28
180kΩ
0.15µF
0.33
µF
29
20
21
Minus Sign
Backplane
1
VBUFF
240kΩ
+
9V
VREF+ 36
CAZ
OSC2
VREFVOSC3 OSC1
39
38 COSC 40
27 V
INT
10kΩ
35
26
ROSC 50pF
1 Conversion/Sec
To Analog Common (Pin 32)
560kΩ
Note: Pin numbers refer to 40-pin DIP.
2002 Microchip Technology Inc.
DS21458B-page 3
DS21458B-page 4
VIN-
Analog
Common
VIN+
32
31
INT
INT
10
µA
CREF+
34
DE (–)
DE
(+)
–
+
+
–
ZI
V+ – 2.8V
33
CREF- VBUFF
26
V-
ZI &
AZ
35
VREF-
AZ & DE (±)
DE (+)
DE
(–)
ZI & AZ
36
VREF+
CREF
TC7126A
1
Low
Temp Co
VREF
28
V+
RINT
CINT
ROSC
39
OSC2
Clock
–
+
27
VINT
Comparator
40
OSC1
AZ
+
–
Integrator
29
CAZ
2mA
0.5mA
V+
COSC
38
OSC3
4
LCD
Hundreds
7-Segment
Decode
VTH = 1V
Control Logic
Tens
Data Latch
7-Segment
Decode
LCD Segment Drivers
Internal Digital Ground
FOSC
To Switch Drivers From
Comparator Output
Thousands
To Digital
Section
Segment
Output
Typical Segment Output
Units
7-Segment
Decode
BP
500Ω
6.2V
÷ 200
21
26
1
V-
TEST
V+
TC7126/A
Functional Block Diagram
2002 Microchip Technology Inc.
TC7126/A
1.0
ELECTRICAL
CHARACTERISTICS
*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
Absolute Maximum Ratings*
Supply Voltage (V+ to V-)....................................... 15V
Analog Input Voltage (either Input) (Note 1) ... V+ to VReference Input Voltage (either Input) ............ V+ to VClock Input ................................................... Test to V+
Package Power Dissipation (TA ≤ 70°C) (Note 2):
44-Pin PQFP............................................... 1.00W
40-Pin PLCC ............................................... 1.23W
44-Pin PDIP ................................................ 1.23W
Operating Temperature Range:
C (Commercial) Devices .................. 0°C to +70°C
I (Industrial) Devices .................... -25°C to +85°C
Storage Temperature Range .............. -65°C to +150°C
TC7126/A ELECTRICAL SPECIFICATIONS
Electrical Characteristics: VS = +9V, fCLK – 16kHz, and TA = +25°C, unless otherwise noted.
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
Input
ZIR
Zero Input Reading
-000.0
±000.0
+000.0
Digital
Reading
ZRD
Zero Reading Drift
—
0.2
1
µV/°C
VIN = 0V, 0°C ≤ TA ≤ +70°C
999
999/1000
1000
Digital
Reading
VIN = VREF, VREF = 100mV
-1
±0.2
1
Count
Full Scale = 200mV or 2V
Max Deviation From Best Fit
Straight Line
Ratiometric Reading
NL
Linearity Error
VIN = 0V
Full Scale = 200mV
Rollover Error
-1
±0.2
1
Count
VIN- = VIN+ ≈ 200mV
eN
Noise
—
15
—
µVP-P
VIN = 0V, Full Scale = 200mV
IL
Input Leakage Current
—
1
10
pA
CMRR
Common Mode Rejection Ratio
—
50
—
µV/V
Scale Factor Temperature
Coefficient
—
1
5
ppm/°C
VIN = 199mV, 0°C ≤ TA ≤ +70°C
Ext. Ref. Temp Coeff. = 0ppm/°C
—
—
—
—
250kΩ Between Common and V+
—
—
—
—
0°C ≤ TA ≤ +70°C ("C" Devices)
—
80
—
ppm/°C
TC7126
—
35
75
ppm/°C
TC7126A
—
35
100
ppm/°C
-25°C ≤ TA ≤ +85°C ("I" Device)
(TC7126A)
2.7
3.05
3.35
V
VIN = 0V
VCM = ±1V, VIN = 0V
Full Scale = 200mV
Analog Common
Analog Common Temperature
Coefficient
VCTC
Analog Common Voltage
VC
250kΩ Between Common and V+
Note 1:
2:
3:
4:
Input voltages may exceed the supply voltages, provided the input current is limited to ±100µA.
Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
Refer to “Differential Input” discussion.
Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is
20 times conversion rate. Average DC component is less than 50mV.
5: See “Typical Application”.
6: During Auto-Zero phase, current is 10-20µA higher. A 48kHz ocillator increases current by 8µA (Typical). Common
current is not included.
2002 Microchip Technology Inc.
DS21458B-page 5
TC7126/A
TC7126/A ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: VS = +9V, fCLK – 16kHz, and TA = +25°C, unless otherwise noted.
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
LCD Drive
V SD
LCD Segment Drive Voltage
4
5
6
VP-P
V+ to V- = 9V
V BD
LCD Backplane Drive Voltage
4
5
6
VP-P
V+ to V- = 9V
—
55
100
µA
Power Supply
IS
Power Supply Current
VIN = 0V, V+ to V- = 9V (Note 6)
Note 1:
2:
3:
4:
Input voltages may exceed the supply voltages, provided the input current is limited to ±100µA.
Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
Refer to “Differential Input” discussion.
Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is
20 times conversion rate. Average DC component is less than 50mV.
5: See “Typical Application”.
6: During Auto-Zero phase, current is 10-20µA higher. A 48kHz ocillator increases current by 8µA (Typical). Common
current is not included.
DS21458B-page 6
2002 Microchip Technology Inc.
TC7126/A
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
Pin Number
(40-Pin PDIP)
Normal
PIN FUNCTION TABLE
(Reversed)
Symbol
Description
1
(40)
V+
Positive supply voltage.
2
(39)
D1
Activates the D section of the units display.
3
(38)
C1
Activates the C section of the units display.
4
(37)
B1
Activates the B section of the units display.
5
(36)
A1
Activates the A section of the units display.
6
(35)
F1
Activates the F section of the units display.
7
(34)
G1
Activates the G section of the units display.
8
(33)
E1
Activates the E section of the units display.
9
(32)
D2
Activates the D section of the tens display.
10
(31)
C2
Activates the C section of the tens display.
11
(30)
B2
Activates the B section of the tens display.
12
(29)
A2
Activates the A section of the tens display.
13
(28)
F2
Activates the F section of the tens display.
14
(27)
E2
Activates the E section of the tens display.
15
(26)
D3
Activates the D section of the hundreds display.
16
(25)
B3
Activates the B section of the hundreds display.
17
(24)
F3
Activates the F section of the hundreds display.
18
(23)
E3
Activates the E section of the hundreds display.
19
(22)
AB4
20
(21)
POL
21
(20)
BP
LCD Backplane drive output (TC7106A). Digital Ground (TC7107A).
22
(19)
G3
Activates the G section of the hundreds display.
23
(18)
A3
Activates the A section of the hundreds display.
24
(17)
C3
Activates the C section of the hundreds display.
25
(16)
G2
Activates the G section of the tens display.
26
(15)
V-
Negative power supply voltage.
27
(14)
VINT
28
(13)
VBUFF
29
(12)
CAZ
The size of the auto-zero capacitor influences system noise. Use a 0.33µF capacitor
for 200mV full scale, and a 0.033µF capacitor for 2V full scale. See Section 6.1,
Auto-Zero Capacitor for additional details.
30
(11)
VIN-
The analog LOW input is connected to this pin.
VIN +
The analog HIGH input signal is connected to this pin.
31
(10)
32
(9)
33
(8)
2002 Microchip Technology Inc.
Activates both halves of the 1 in the thousands display.
Activates the negative polarity display.
The integrating capacitor should be selected to give the maximum voltage swing that
ensures component tolerance buildup will not allow the integrator output to saturate.
When analog common is used as a reference and the conversion rate is 3 readings
per second, a 0.047µF capacitor may be used. The capacitor must have a low
dielectric constant to prevent rollover errors. See Section 6.3, Integrating Capacitor
for additional details.
Integration resistor connection. Use a 180kΩ resistor for a 200mV full-scale range
and a 1.8MΩ resistor for a 2V full scale range.
ANALOG This pin is primarily used to set the Analog Common mode voltage for battery operaCOMMON tion, or in systems where the input signal is referenced to the power supply. It also
acts as a reference voltage source. See Section 7.3, Analog Common for additional
details.
CREF-
See Pin 34.
DS21458B-page 7
TC7126/A
TABLE 2-1:
PIN FUNCTION TABLE (CONTINUED)
Pin Number
(40-Pin PDIP)
Normal
(Reversed)
Symbol
34
(7)
CREF+
A 0.1µF capacitor is used in most applications. If a large Common mode voltage
exists (for example, the VIN - pin is not at analog common) and a 200mV scale is
used, a 1µF capacitor is recommended and will hold the rollover error to 0.5 count.
35
(6)
VREF-
See Pin 36.
36
(5)
VREF+
The analog input required to generate a full scale output (1999 counts). Place 100mV
between Pins 35 and 36 for 199.9mV full scale. Place 1V between Pins 35 and 36 for
2V full scale. See Section 6.6, Reference Voltage for additional information.
37
(4)
TEST
Lamp test. When pulled HIGH (to V+), all segments will be turned on and the display
should read -1888. It may also be used as a negative supply for externally
generated decimal points. See Section 7.4, TEST for additional information.
38
(3)
OSC3
See Pin 40.
39
(2)
OSC2
See Pin 40.
40
(1)
OSC1
Pins 40, 39 and 38 make up the oscillator section. For a 48kHz clock (3 readings,
39 per second), connect Pin 40 to the junction of a 180kΩ resistor and a 50pF
capacitor. The 180kΩ resistor is tied to Pin 39 and the 50pF capacitor is tied to
Pin 38.
DS21458B-page 8
Description
2002 Microchip Technology Inc.
TC7126/A
3.0
DETAILED DESCRIPTION
A simple mathematical equation relates the input signal, reference voltage and integration time:
(All Pin Designations Refer to 40-Pin PDIP.)
EQUATION 3-1:
Dual Slope Conversion Principles
The TC7126A is a dual slope, integrating analog-todigital converter. An understanding of the dual slope
conversion technique will aid in following the detailed
TC7126/A operation theory.
The conventional dual slope converter measurement
cycle has two distinct phases:
• Input Signal Integration
• Reference Voltage Integration (De-integration)
The input signal being converted is integrated for a fixed
time period (TSI). Time is measured by counting clock
pulses. An opposite polarity constant reference voltage
is then integrated until the integrator output voltage
returns to zero. The reference integration time is directly
proportional to the input signal (TRI) (see Figure 3-1).
FIGURE 3-1:
Analog
Input
Signal
BASIC DUAL SLOPE
CONVERTER
Integrator
–
+
Comparator
–
+
Switch
Driver
Integrator
Output
REF
Voltage
Fixed
Signal
Integrate
Time
Phase
Control
Polarity Control
Clock
Control
Logic
VRTRI
1 TSI
RC ∫0 VIN(t)dt = RC
Where:
VR = Reference voltage
TSI = Signal integration time (fixed)
TRI = Reference voltage integration time (variable)
For a constant VIN:
EQUATION 3-2:
T
V
FIGURE 3-2:
VIN ≈ VREF
VIN ≈ 1.2 VREF
Variable
Reference
Integrate
Time
In a simple dual slope converter, a complete conversion requires the integrator output to “ramp-up” and
“ramp-down.”
RI
------
RT
SI
NORMAL MODE
REJECTION OF DUAL
SLOPE CONVERTER
20
10
t = Measurement Period
0
0.1/t
2002 Microchip Technology Inc.
V
30
Counter
Display
IN
=
The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values, as long as
they are stable during a measurement cycle. Noise
immunity is an inherent benefit. Noise spikes are integrated or averaged to zero during integration periods.
Integrating ADCs are immune to the large conversion
errors that plague successive approximation converters
in high noise environments. Interfering signals with frequency components at multiples of the averaging period
will be attenuated. Integrating ADCs commonly operate
with the signal integration period set to a multiple of the
50Hz/60Hz power line period (see Figure 3-2).
Normal Mode Rejection (dB)
3.1
1/t
Input Frequency
10/t
DS21458B-page 9
TC7126/A
4.0
ANALOG SECTION
In addition to the basic integrate and de-integrate dual
slope cycles discussed above, the TC7126A design
incorporates an auto-zero cycle. This cycle removes
buffer amplifier, integrator and comparator offset voltage error terms from the conversion. A true digital zero
reading results without external adjusting potentiometers. A complete conversion consists of three phases:
1.
2.
3.
4.1
Auto-Zero phase
Signal Integrate phase
Reference Integrate phase
Reference Integrate Phase
The third phase is reference integrate or de-integrate.
VIN- is internally connected to analog common and VIN+
is connected across the previously charged reference
capacitor. Circuitry within the chip ensures that the
capacitor will be connected with the correct polarity to
cause the integrator output to return to zero. The time
required for the output to return to zero is proportional to
the input signal and is between 0 and 2000 counts. The
digital reading displayed is:
EQUATION 4-2:
VIN
1000 V
REF
Auto-Zero Phase
During the auto-zero phase, the differential input signal
is disconnected from the circuit by opening internal
analog gates. The internal nodes are shorted to analog
common (ground) to establish a zero input condition.
Additional analog gates close a feedback loop around
the integrator and comparator. This loop permits comparator offset voltage error compensation. The voltage
level established on CAZ compensates for device offset
voltages. The auto-zero phase residual is typically
10µV to 15µV. The auto-zero cycle length is 1000 to
3000 clock periods.
4.2
4.3
Signal Integrate Phase
The auto-zero loop is entered and the internal differential inputs connect to VIN+ and VIN-. The differential
input signal is integrated for a fixed time period. The
TC7126/A signal integration period is 1000 clock
periods or counts. The externally set clock frequency is
divided by four before clocking the internal counters.
The integration time period is:
4
FOSC x 1000
Where: FOSC = external clock frequency.
The differential input voltage must be within the device
Common mode range when the converter and measured system share the same power supply common
(ground). If the converter and measured system do not
share the same power supply common, VIN- should be
tied to analog common.
Polarity is determined at the end of signal integrate
phase. The sign bit is a true polarity indication, in that
signals less than 1LSB are correctly determined. This
allows precision null detection limited only by device
noise and auto-zero residual offsets.
DS21458B-page 10
DIGITAL SECTION
The TC7126A contains all the segment drivers necessary to directly drive a 3-1/2 digit LCD, including an
LCD backplane driver. The backplane frequency is the
external clock frequency divided by 800. For 3 conversions per second, the backplane frequency is 60Hz
with a 5V nominal amplitude. When a segment driver is
in phase with the backplane signal, the segment is
OFF. An out of phase segment drive signal causes the
segment to be ON (visible). This AC drive configuration
results in negligible DC voltage across each LCD segment, ensuring long LCD life. The polarity segment
driver is ON for negative analog inputs. If VIN+ and VINare reversed, this indicator reverses.
On the TC7126A, when the TEST pin is pulled to V+, all
segments are turned ON and the display reads -1888.
During this mode, LCD segments have a constant DC
voltage impressed.
Note:
EQUATION 4-1:
TSI =
5.0
Do not leave the display in this mode for
more than several minutes. LCDs may be
destroyed if operated with DC levels for
extended periods.
The display font and segment drive assignment are
shown in Figure 5-1.
FIGURE 5-1:
DISPLAY FONT AND
SEGMENT ASSIGNMENT
Display Font
1000's
100's
10's
1's
2002 Microchip Technology Inc.
TC7126/A
5.1
System Timing
6.3
The oscillator frequency is divided by four prior to
clocking the internal decade counters. The four-phase
measurement cycle takes a total of 4000 counts
(16,000 clock pulses). The 4000-count cycle is independent of input signal magnitude.
Each phase of the measurement cycle has the following
length:
1.
Auto-Zero Phase: 1000 to 3000 counts
(4000 to 12,000 clock pulses).
For signals less than full scale, the auto-zero
phase is assigned the unused reference integrate
time period.
2.
Signal Integrate: 1000 counts
(4000 clock pulses).
Integrating Capacitor (CINT)
CINT should be selected to maximize integrator output
voltage swing without causing output saturation. Due to
the TC7126A's superior analog common temperature
coefficient specification, analog common will normally
supply the differential voltage reference. For this case,
a ±2V full scale integrator output swing is satisfactory.
For 3 readings per second (FOSC = 48kHz), a 0.047µF
value is suggested. For 1 reading per second, 0.15µF
is recommended. If a different oscillator frequency is
used, CINT must be changed in inverse proportion to
maintain the nominal ±2V integrator swing.
An exact expression for CINT is:
EQUATION 6-1:
This time period is fixed. The integration period is:
CINT =
(4000) F
1
FOSC
Where: FOSC is the externally set clock frequency.
3.
Reference Integrate: 0 to 2000 counts
(0 to 8000 clock pulses).
The TC7126A is a drop-in replacement for the TC7126
and ICL7126, which offer a greatly improved internal
reference temperature coefficient. No external component value changes are required to upgrade existing
designs.
6.0
COMPONENT VALUE
SELECTION
6.1
Auto-Zero Capacitor (C AZ)
The CAZ capacitor size has some influence on system
noise. A 0.47µF capacitor is recommended for 200mV
full scale applications where 1LSB is 100µV. A 0.033µF
capacitor is adequate for 2.0V full scale applications. A
mylar type dielectric capacitor is adequate.
6.2
Reference Voltage Capacitor (CREF)
The reference voltage, used to ramp the integrator output voltage back to zero during the reference integrate
phase, is stored on CREF. A 0.1µF capacitor is acceptable when VREF- is tied to analog common. If a large
Common mode voltage exists (VREF- – analog common) and the application requires a 200mV full scale,
increase CREF to 1µF. Rollover error will be held to less
than 0.5 count. A Mylar type dielectric capacitor is
adequate.
2002 Microchip Technology Inc.
Where:
FOSC =
VFS =
RINT =
VINT =
VFS
OSC RINT
VINT
EQUATION 5-1:
TSI = 4000
1
Clock frequency at Pin 38
Full scale input voltage
Integrating resistor
Desired full scale integrator output swing
At 3 readings per second, a 750Ω resistor should be
placed in series with CINT. This increases accuracy by
compensating for comparator delay. CINT must have
low dielectric absorption to minimize rollover error. A
polypropylene capacitor is recommended.
6.4
Integrating Resistor (RINT)
The input buffer amplifier and integrator are designed
with Class A output stages. The output stage idling current is 6µA. The integrator and buffer can supply 1µA
drive current with negligible linearity errors. RINT is chosen to remain in the output stage linear drive region, but
not so large that PC board leakage currents induce
errors. For a 200mV full scale, RINT is 180kΩ. A 2V full
scale requires 1.8MΩ.
Component
Value
Nominal Full Scale Voltage
200mV
2V
CAZ
0.33µF
0.033µF
RINT
180kΩ
1.8MΩ
CINT
0.047µF
0.047µF
Note:
FOSC = 48kHz (3 readings per sec).
DS21458B-page 11
TC7126/A
6.5
7.0
Oscillator Components
COSC should be 50pF; R OSC is selected from the
equation:
EQUATION 6-2:
For a 48kHz clock (3 conversions per second),
R = 180kΩ.
Note that FOSC is 44 to generate the TC7126A's internal clock. The backplane drive signal is derived by
dividing FOSC by 800.
To achieve maximum rejection of 60Hz noise pickup,
the signal integrate period should be a multiple of
60Hz. Oscillator frequencies of 24kHz, 12kHz, 80kHz,
60kHz, 40kHz, etc. should be selected. For 50Hz rejection, oscillator frequencies of 20kHz, 100kHz,
66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note
that 40kHz (2.5 readings per second) will reject both
50Hz and 60Hz.
6.6
Reference Voltage Selection
A full scale reading (2000 counts) requires the input
signal be twice the reference voltage.
Required Full Scale Voltage*
VREF
20mV
100mV
2V
1V
Note:
(Pin Numbers Refer to the 40-Pin PDIP.)
7.1
FOSC = 0.45
RC
DEVICE PIN FUNCTIONAL
DESCRIPTION
Differential Signal Inputs
VIN+ (Pin 31), VIN- (Pin 30)
The TC7126A is designed with true differential inputs
and accepts input signals within the input stage
Common mode voltage range (VCM). Typical range is
V+ – 1V to V- + 1V. Common mode voltages are
removed from the system when the TC7126A operates
from a battery or floating power source (isolated from
measured system), and VIN- is connected to analog
common (VCOM) (see Figure 7-2).
In systems where Common mode voltages exist, the
TC7126A's 86 dB Common mode rejection ratio minimizes error. Common mode voltages do, however,
affect the integrator output level. A worst case condition
exists if a large positive VCM exists in conjunction with
a full scale negative differential signal. The negative
signal drives the integrator output positive along with
VCM (see Figure 7-1). For such applications, the integrator output swing can be reduced below the recommended 2V full scale swing. The integrator output
will swing within 0.3V of V+ or V- without increased
linearity error.
FIGURE 7-1:
COMMON MODE
VOLTAGE REDUCES
AVAILABLE INTEGRATOR
SWING (VCOM ≠ VIN)
VFS = 2VREF.
In some applications, a scale factor other than unity
may exist between a transducer output voltage and the
required digital reading. Assume, for example, a pressure transducer output for 2000lb/in2 is 400mV. Rather
than dividing the input voltage by two, the reference
voltage should be set to 200mV. This permits the transducer input to be used directly.
The differential reference can also be used where a
digital zero reading is required when VIN is not equal to
zero. This is common in temperature measuring instrumentation. A compensating offset voltage can be
applied between analog common and VIN-. The transducer output is connected between VIN+ and analog
common.
DS21458B-page 12
+
+
Input
Buffer
CI
RI
–
VIN
–
VI
+
Integrator
–
VCM
tI
VI =
VCM – VIN
RI CI
Where:
4000
tI = Integration time =
FOSC
CI = Integration capacitor
RI = Integration resistor
[
[
2002 Microchip Technology Inc.
TC7126/A
7.2
Differential Reference
VREF+ (Pin 36), VREF- (Pin 35)
The reference voltage can be generated anywhere
within the V+ to V- power supply range.
To prevent rollover type errors being induced by large
Common mode voltages, CREF should be large compared to stray node capacitance.
FIGURE 7-2:
The TC7126A offers a significantly improved analog
common temperature coefficient. This potential provides a very stable voltage, suitable for use as a reference. The temperature coefficient of analog common is
typically 35ppm/°C for the TC7126A and 80 ppm/°C for
the TC7126.
COMMON MODE VOLTAGE REMOVED IN BATTERY OPERATION WITH
VIN = ANALOG COMMON
Segment
Drive
Measured
System
V+
V-
VBUFF
VINGND
CAZ
VINT
POL BP
OSC1
TC7126A
OSC3
VIN+
LCD
OSC2
V-
ANALOG
COMMON VREF- VREF+ V+
V+ V-
GND
Power
Source
7.3
Analog Common (Pin 32)
The analog common pin is set at a voltage potential
approximately 3V below V+. The potential is between
2.7V and 3.35V below V+. Analog common is tied internally to an N-channel FET capable of sinking 100µA.
This FET will hold the common line at 3V should an
external load attempt to pull the common line toward
V+. Analog common source current is limited to 1µA.
Therefore, analog common is easily pulled to a more
negative voltage (i.e., below V+ – 3V).
The TC7126A connects the internal VIN+ and VINinputs to analog common during the auto-zero phase.
During the reference integrate phase, VIN- is connected to analog common. If VIN- is not externally connected to analog common, a Common mode voltage
exists, but is rejected by the converter's 86dB Common mode rejection ratio. In battery operation, analog
common and VIN- are usually connected, removing
Common mode voltage concerns. In systems where
VIN- is connected to power supply ground or to a given
voltage, analog common should be connected to VIN-.
The analog common pin serves to set the analog section reference, or common point. The TC7126A is specifically designed to operate from a battery, or in any
measurement system where input signals are not referenced (float) with respect to the TC7126A's power
source. The analog common potential of V+ – 3V gives
a 7V end of battery life voltage. The common potential
has a 0.001%/% voltage coefficient and a 15Ω output
impedance.
2002 Microchip Technology Inc.
+
9V
With sufficiently high total supply voltage (V+ – V- > 7V),
analog common is a very stable potential with excellent
temperature stability (typically 35ppm/°C). This potential can be used to generate the TC7126A's reference
voltage. An external voltage reference will be unnecessary in most cases because of the 35ppm/°C temperature coefficient. See Section 7.5, TC7126A Internal
Voltage Reference discussion.
7.4
TEST (Pin 37)
The TEST pin potential is 5V less than V+. TEST may
be used as the negative power supply connection for
external CMOS logic. The TEST pin is tied to the internally generated negative logic supply through a 500Ω
resistor. The TEST pin load should be no more than
1mA. See Section 5.0, Digital Section for additional
information on using TEST as a negative digital logic
supply.
If TEST is pulled HIGH (to V+), all segments plus the
minus sign will be activated. DO NOT OPERATE IN
THIS MODE FOR MORE THAN SEVERAL MINUTES.
With TEST = V+, the LCD segments are impressed
with a DC voltage which will destroy the LCD.
DS21458B-page 13
TC7126/A
7.5
TC7126A Internal Voltage
Reference
The TC7126A's analog common voltage temperature
stability has been significantly improved (Figure 7-3).
The "A" version of the industry standard TC7126
device allows users to upgrade old systems and design
new systems, without external voltage references.
External R and C values do not need to be changed.
Figure 7-4 shows analog common supplying the
necessary voltage reference for the TC7126A.
FIGURE 7-3:
ANALOG COMMON TEMP.
COEFFICIENT
8.0
TYPICAL APPLICATIONS
8.1
Liquid Crystal Display Sources
Several manufacturers supply standard LCDs to interface with the TC7126A, 3-1/2 digit analog-to-digital
converter.
Manufacturer
Crystaloid
Electronics
5282 Hudson Dr.
Hudson, OH 44236
216-655-2429
C5335, H5535,
T5135, SX440
AND
720 Palomar Ave.
Sunnyvale, CA 94086
408-523-8200
FE 0801
FE 0203
VGI, Inc.
1800 Vernon St., Ste. 2
Roseville, CA 95678
916-783-7878
LD-B709BZ
LD-H7992AZ
Hamlin, Inc.
612 E. Lake St.
Lake Mills,
WI 53551
414-648-2361
3902, 3933,
3903
200
Analog Commom
Temperature Coefficient (ppm/°C)
180
160
No
Maximum
Specified
140
Typical
120
No
Maximum
Specified
100
Maximum
80
Note:
Typical
60
8.2
Typical
40
20
TC7126A
ICL7126
ICL7136
0
FIGURE 7-4:
TC7126A INTERNAL
VOLTAGE REFERENCE
CONNECTION
9V
+
Contact LCD manufacturer for full product listing/
specifications.
Decimal Point and Annunciator
Drive
The TEST pin is connected to the internally generated
digital logic supply ground through a 500Ω resistor. The
TEST pin may be used as the negative supply for external CMOS gate segment drivers. LCD annunciators for
decimal points, low battery indication, or function indication may be added, without adding an additional supply. No more than 1mA should be supplied by the TEST
pin; its potential is approximately 5V below V+ (see
Figure 8-1).
FIGURE 8-1:
DECIMAL POINT AND
ANNUNCIATOR DRIVES
1
26
V-
240kΩ
V+
Representative
Part Numbers*
Address/Phone
Simple Inverter for Fixed Decimal Point
or Display Annunciator
V+
TC7126A
VREF+
V+
36
4049
10kΩ
TC7126A
VREF-
35
To LCD
Decimal
Point
BP 21
VREF
GND
TEST 37
ANALOG 32
COMMON
To
Backplane
Multiple Decimal Point or
Annunciator Driver
V+
SET VREF = 1/2 VREF
V+
BP
TC7126A
TEST
DS21458B-page 14
To LCD
Decimal
Point
To LCD
Decimal
Point
4030
GND
2002 Microchip Technology Inc.
TC7126/A
8.3
EQUATION 8-1:
Flat Package
The TC7126 is available in an epoxy 64-pin formed
lead package. A test socket for the TC7126ACBQ
device is available:
Part Number:
Manufacturer:
Distribution:
8.4
The display will over range for RUNKNOWN ≥ 2 x
RSTANDARD (see Figure 8-2).
IC 51-42
Yamaichi
Nepenthe Distribution
2471 East Bayshore, Ste. 520
Palo Alto, CA 94043
(650) 856-9332
FIGURE 8-2:
LOW PARTS COUNT
RATIOMETRIC
RESISTANCE
MEASUREMENT
Ratiometric Resistance
Measurements
VREF+ V+
The TC7126A’s true differential input and differential
reference make ratiometric reading possible. In a ratiometric operation, an unknown resistance is measured
with respect to a known standard resistance. No
accurately defined reference voltage is needed.
VREF-
RSTANDARD
LCD
VIN+
TC7126A
RUNKNOWN
The unknown resistance is put in series with a known
standard and a current passed through the pair. The
voltage developed across the unknown is applied to the
input and the voltage across the known resistor is
applied to the reference input. If the unknown equals
the standard, the display will read 1000. The displayed
reading can be determined from the following
expression:
FIGURE 8-3:
RUNKNOWN
x 1000
RSTANDARD
Displayed (Reading) =
VINANALOG
COMMON
3-1/2 DIGIT TRUE RMS AC DMM
9V
200mV
C1
0.02µF
+
1µF
1MΩ
VIN
9MΩ
+
1N4148
1
14
2
13
10MΩ
3
2V
4
900kΩ
C2
20V
47kΩ
1Ω
10%
90kΩ
200V
6.8µF
20kΩ
10%
1
29
12
AD636
11
5
10
6
9
7
8
10kΩ
+
2.2
µF
1MΩ 10%
36
35
VREF+
28
VREF-
32 ANALOG
COMMON
31
V IN+
0.01
µF 30
26
COM
27
V-
TC7126A
240kΩ
10kΩ
C1 = 3pF to 10pF, Variable
C2 = 132pF, Variable
26
V+
40
38
VOUT+
39
VBP
Segment
Drive
LCD
2002 Microchip Technology Inc.
DS21458B-page 15
TC7126/A
FIGURE 8-4:
INTEGRATED CIRCUIT TEMPERATURE SENSOR
9V
2
Constant 5V
V+
V+
6
VOUT
5
ADJ
51kΩ
51kΩ
R4
R5
3
Temperature
Dependent Output
TC7126A
50kΩ
R2
2 –
NC
REF02
TEMP
VREF+
VREF-
8
1/2
LM358
3
+
4
1
VIN+
VIN-
VOUT =
1.86V @
+25°C
50kΩ
R1
COMMON
V-
GND
4
FIGURE 8-5:
TEMPERATURE SENSOR
+
FIGURE 8-6:
9V
POSITIVE TEMPERATURE
COEFFICIENT RESISTOR
TEMPERATURE SENSOR
+
160kΩ
300kΩ
V+
V-
5.6kΩ
VIN1N4148
Sensor
R2
50kΩ
R1
50kΩ
160kΩ
V+
1N4148 R1
20kΩ
VIN+
TC7126A
VREF+
VREFCOMMON
DS21458B-page 16
9V
300kΩ
V-
VIN-
TC7126A
VIN+
0.7%/°C
PTC
R3
R2
20kΩ
VREF+
VREFCOMMON
2002 Microchip Technology Inc.
TC7126/A
9.0
PACKAGING INFORMATION
9.1
Package Marking Information
Package marking data not available at this time.
9.2
Taping Form
Component Taping Orientation for 44-Pin PLCC Devices
User Direction of Feed
PIN 1
W
P
Standard Reel Component Orientation
for TR Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package
44-Pin PLCC
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
32 mm
24 mm
500
13 in
Note: Drawing does not represent total number of pins.
Component Taping Orientation for 44-Pin PQFP Devices
User Direction of Feed
PIN 1
W
P
Standard Reel Component Orientation
for TR Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package
44-Pin PQFP
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
24 mm
16 mm
500
13 in
Note: Drawing does not represent total number of pins.
2002 Microchip Technology Inc.
DS21458B-page 17
TC7126/A
9.3
Package Dimensions
40-Pin PDIP (Wide)
PIN 1
.555 (14.10)
.530 (13.46)
2.065 (52.45)
2.027 (51.49)
.610 (15.49)
.590 (14.99)
.200 (5.08)
.140 (3.56)
.040 (1.02)
.020 (0.51)
.150 (3.81)
.115 (2.92)
.110 (2.79)
.090 (2.29)
.070 (1.78)
.045 (1.14)
.015 (0.38)
.008 (0.20)
3° MIN.
.700 (17.78)
.610 (15.50)
.022 (0.56)
.015 (0.38)
Dimensions: inches (mm)
44-Pin PLCC
PIN 1
.021 (0.53)
.013 (0.33)
.050 (1.27) TYP.
.695 (17.65)
.685 (17.40)
.630 (16.00)
.591 (15.00)
.656 (16.66)
.650 (16.51)
.032 (0.81)
.026 (0.66)
.020 (0.51) MIN.
.656 (16.66)
.650 (16.51)
.120 (3.05)
.090 (2.29)
.695 (17.65)
.685 (17.40)
.180 (4.57)
.165 (4.19)
Dimensions: inches (mm)
DS21458B-page 18
2002 Microchip Technology Inc.
TC7126/A
9.3
Package Dimensions (Continued)
44-Pin PQFP
7° MAX.
.009 (0.23)
.005 (0.13)
PIN 1
.018 (0.45)
.012 (0.30)
.041 (1.03)
.026 (0.65)
.398 (10.10)
.390 (9.90)
.557 (14.15)
.537 (13.65)
.031 (0.80) TYP.
.398 (10.10)
.390 (9.90)
.557 (14.15)
.537 (13.65)
.010 (0.25) TYP.
.083 (2.10)
.075 (1.90)
.096 (2.45) MAX.
Dimensions: inches (mm)
2002 Microchip Technology Inc.
DS21458B-page 19
TC7126/A
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART CODE
TC7126X X XXX
A or blank*
R (reversed pins) or blank (CPL pkg only)
* "A" parts have an improved reference TC
Package Code (see Device Selection Table)
SALES AND SUPPORT
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
DS21458B-page 20
2002 Microchip Technology Inc.
TC7126/A
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,
PICSTART, PRO MATE, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
and Total Endurance are trademarks of Microchip Technology
Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro ® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
2002 Microchip Technology Inc.
DS21458B-page 21
WORLDWIDE SALES AND SERVICE
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Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: 39-039-65791-1 Fax: 39-039-6899883
United Kingdom
Arizona Microchip Technology Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820
03/01/02
*DS21458B*
DS21458B-page 22
2002 Microchip Technology Inc.