Low-Drop Fixed Voltage Regulator TLE 4299 Data Sheet Features • • • • • • • • • Output voltage 3.3V ± 2% 150 mA Output current Extreme low current consumption in ON state Inhibit function: Below 1 µA current consumption in off mode Early warning Reset output low down to VQ = 1 V Overtemperature protection Reverse polarity proof Wide temperature range Type Ordering Code P-DSO-8-3 Package TLE 4299 GV33 Q67065-A7033 P-DSO-8-3 TLE 4299 GMV33 Q67065-A7032 P-DSO-14-8 P-DSO-14-3, -8, -9, -11 Functional Description The TLE 4299 is a monolithic voltage regulator with fixed 5-V (see data sheet TLE4299G/GM) or 3.3 V output, supplying loads up to 150 mA. It is especially designed for applications that may not be powered down while the motor is off. In addition the TLE 4299GMV includes an inhibit function. When the inhibit signal is removed, the device is switched off and the quiescent current is less than 1 µA. To achieve proper operation of the µ-controller, the device supplies a reset signal. The reset delay time is selected application-specific by an external delay capacitor. The reset threshold is adjustable. An early warning signal supervises the voltage at pin SI. The TLE 4299 is pin-compatible to the TLE 4269 and functional similar with the additional inhibit function. The TLE 4299 is designed to supply microcontroller systems even under automotive environment conditions. Therefore it is protected against overload, short circuit and over temperature. Datasheet Rev. 1.0 1 2005-01-27 TLE 4299 Circuit Description The TLE 4299 is a PNP based very low drop linear voltage regulator. It regulates the output voltage to VQ = 3.3 V for an input voltage range of 4.4 V ≤ VI ≤ 45 V. The control circuit protects the device against potential damages caused by overcurrent and overtemperature. The internal control circuit achieves a 3.3 V output voltage with a tolerance of ± 2%. The device includes a power on reset and an under voltage reset function with adjustable reset delay time and adjustable reset switching threshold as well as a sense control/early warning function. The device includes an inhibit function to disable it when the ECU is not used for example while the motor is off. The reset logic compares the output voltage VQ to an internal threshold. If the output voltage drops below this level, the external reset delay capacitor CD is discharged. When VD is lower than VST, the reset output RO is switched Low. If the output voltage drop is very short, the VST level is not reached and no reset-signal is asserted. This feature avoids resets at short negative spikes at the output voltage e.g. caused by load changes. As soon as the output voltage is more positive than the reset threshold, the delay capacitor is charged with constant current. When the voltage reaches VDT the reset output RO is set High again. The reset delay time and the reset reaction time are defined by the external capacitor CD. The reset function is active down to VI = 1 V. In addition to the normal reset function, the device gives an early warning. When the SI voltage drops below VSI,low, the devices asserts the SI output Low to indicate the logic and the µ-processor that this voltage has dropped. The sense function uses a hysteresis: When the SI-voltage reaches the VSI,high level, SO is set high again. This feature can be used as early warning function to notice the µ-controller about a battery voltage drop and a possible reset in a short time. Of course also any other voltage can be observed by this feature. The user defines the threshold by the resistor-values RSI1 and RSI2. For the exact timing and calculation of the reset and sense timing and thresholds, please refer to the application section. Datasheet Rev. 1.0 2 2005-01-27 TLE 4299 TLE 4299 I Q Current and Saturation Control BandGapReference RSO RRO SO SI Reference RO Reset Control RADJ D GND AEB03103 Figure 1 Block Diagram TLE 4299 GV33 Datasheet Rev. 1.0 3 2005-01-27 TLE 4299 TLE 4299 I Q Current and Saturation Control BandGapReference RSO RRO Inhibit Control INH SO SI Reference RO Reset Control RADJ D GND AEB03104 Figure 2 Block Diagram TLE 4299 GMV33 Datasheet Rev. 1.0 4 2005-01-27 TLE 4299 P-DSO-8-3 I 1 8 Q SI 2 7 SO RADJ 3 6 RO D 4 5 GND AEP02832 Figure 3 Pin Configuration (top view) Pin Definitions and Functions (TLE 4299 GV33) Pin No. Symbol Function 1 I Input; block directly to GND on the IC with a ceramic capacitor. 2 SI Sense Input; if not needed connect to Q. 3 RADJ Reset Threshold Adjust; if not needed connect to GND. 4 D Reset Delay; to select delay time, connect to GND via external capacitor. 5 GND Ground 6 RO Reset Output; the open-collector output is linked internally to Q via a 20kΩ pull-up resistor. Keep open, if the pin is not needed. 7 SO Sense Output; open-collector output. Keep open, if the pin is not needed. 8 Q Output; connect to GND with a 22 µF capacitor, 0.4 Ω < ESR < 3.7 Ω.1) 1) see characteristic curves Datasheet Rev. 1.0 5 2005-01-27 TLE 4299 P-DSO-14-8 RADJ 1 14 SI D 2 13 I GND 3 12 GND GND 4 11 GND GND 5 10 GND INH 6 9 Q RO 7 8 SO AEP02831 Figure 4 Pin Configuration (top view) Pin Definitions and Functions (TLE 4299 GMV33) Pin No. Symbol Function 1 RADJ Reset Threshold Adjust; if not needed connect to GND. 2 D Reset Delay; connect to GND via external delay capacitor for setting delay time. 3, 4, 5 GND Ground 6 INH Inhibit: If not needed connect to Input pin I; A high signal switches the regulator ON. 7 RO Reset Output; the open-collector output is linked internally to Q via a 20kΩ pull-up resistor. Keep open, if the pin is not needed. 8 SO Sense Output; open-collector output. Keep open, if the pin is not needed. 9 Q Output; connect to GND with a 22 µF capacitor, 0.4 Ω < ESR < 3.7 Ω.1) 10, 11, 12 GND Ground 13 I Input; block to GND directly at the IC by a ceramic capacitor. 14 SI Sense Input; if not needed connect to Q. 1) see characteristic curves Datasheet Rev. 1.0 6 2005-01-27 TLE 4299 Absolute Maximum Ratings Tj = – 40 to 150 °C Parameter Symbol Limit Values Unit Notes min. max. VI – 40 45 V – VINH – 40 45 V – VSI ISI – 0.3 45 V – -1 1 mA – VRADJ IRADJ – 0.3 7 V – -10 10 mA – VD – 0.3 7 V – VR – 0.3 7 V – VSO – 0.3 7 V – VQ IQ – 0.3 7 V – –5 – mA – Input I Input voltage Inhibit Input INH Input voltage Sense Input SI Input voltage Input current Reset Threshold Adjust RADJ Input voltage Input current Reset Delay D Voltage Reset Output RO Voltage Sense Output SO Voltage Output Q Output voltage Output current Datasheet Rev. 1.0 7 2005-01-27 TLE 4299 Absolute Maximum Ratings (cont’d) Tj = – 40 to 150 °C Parameter Symbol Limit Values Unit Notes min. max. Tj TStg – 150 °C – – 50 150 °C – VI Tj 4.4 45 V – – 40 150 °C – Junction-ambient for foot print only1) Rthja – 200 130 K/W K/W P-DSO-8-3 P-DSO-14-8 Junction-ambient for 300mm2 cooling area2) Rthja – 164 70 K/W K/W P-DSO-8-3 P-DSO-14-8 Junction-pin Rthjp – 60 30 K/W K/W P-DSO-8-33) P-DSO-14-84) Temperature Junction temperature Storage temperature Operating Range Input voltage Junction temperature Thermal Data 1) FR4, 80x80x1,5mm; 35µ Cu, 5µ Sn; Footprint only 2) FR4, 80x80x1,5mm; 35µ Cu, 5µ Sn; 300mm2 3) Measured to pin 5 4) Measured to pin 4 Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. In the operating range, the functions given in the circuit description are fulfilled. Datasheet Rev. 1.0 8 2005-01-27 TLE 4299 Characteristics VI = 13.5 V; Tj = – 40 °C < Tj < 150 °C Parameter Symbol Limit Values min. typ. Unit Measuring Condition max. Output voltage VQ 3.23 3.30 3.37 V 1 mA ≤ IQ ≤ 100 mA; 5.5 V ≤ VI ≤ 16 V Output voltage VQ 3.20 3.30 3.40 V IQ ≤ 150 mA; 5.5 V ≤ VI ≤ 16 V Current limit IQ 250 400 500 mA – Current consumption; Iq = II – IQ Iq – 65 105 µA Inhibit ON; IQ ≤ 1 mA, Tj < 85 °C Current consumption; Iq = II – IQ Iq – 170 500 µA Inhibit ON; IQ = 10 mA Current consumption; Iq = II – IQ Iq – 0.7 2 mA Inhibit ON; IQ = 50 mA Current consumption; Iq = II – IQ Iq – – 1 µA VINH = 0 V; Tj = 25 °C Load regulation ∆VQ – 5 30 mV IQ = 1 mA to 100 mA Line regulation ∆VQ – 10 25 mV VI = 6 V to 28 V; IQ = 1 mA Power Supply Ripple rejection PSRR – 66 – dB fr = 100 Hz; Vr = 1 VSS; IQ = 100 mA – 0.8 V VQ off - V VQ on Inhibit (TLE 4299 GMV33 only) Inhibit OFF voltage range VINH OFF – Inhibit ON voltage range VINH ON 3.5 High input current IINH ON – 3 5 µA VINH = 5V Low input current IINH OFF – 0.5 2 µA VINH = 0.8 V Datasheet Rev. 1.0 9 2005-01-27 TLE 4299 Characteristics (cont’d) VI = 13.5 V; Tj = – 40 °C < Tj < 150 °C Parameter Symbol Limit Values min. typ. Unit Measuring Condition max. Reset Generator Switching threshold Vrt Reset threshold headroom 3.00 3.10 3.20 V – VRTHEAD 50 200 300 mV – Reset pull up RRO 10 20 40 kΩ – Reset low voltage VR – 0.17 0.40 V VQ < 3.0 V; internal RRO; IR = 1 mA External reset pull up VR ext 5.6 – kΩ Pull up resistor Q Delay switching threshold VDT 1.6 1.85 2.35 V – Switching threshold VST 0.35 0.50 0.60 V – Reset delay low voltage VD – – 0.1 V VQ < VRT Charge current Ich 2.0 3.5 6.0 µA VD = 1 V Power-up Reset delay time td 36 51 60 ms CD = 100 nF Reset reaction time trr 0.5 1.2 3.0 µs CD = 100 nF Reset Adjust Switching Threshold VRADJ 1.26 1.36 1.44 V VQ < 3.5V – TH Input Voltage Sense Sense threshold high VSI high 1.34 1.45 1.54 V – Sense threshold low VSI low 1.26 1.36 1.44 V – Sense input switching hysteresis VSI HYST 50 90 130 mV VSI HYST = VSI high – VSI low Sense output low voltage VSO low – 0.1 0.4 V VSI < 1.20 V; Vi > 4.2 V; ISO = 1mA 5.6 – – kΩ – External SO pull up resistor RSO ext Sense input current ISI –1 0.1 1 µA Si > 1.0V Sense high reaction time tpd SO LH – 2.4 4.0 µs RSO ext = 5.6kΩ Sense low reaction time tpd SO HL – 2.5 6.0 µs RSO ext = 5.6kΩ Datasheet Rev. 1.0 10 2005-01-27 TLE 4299 Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and the given supply voltage. II IQ1 VI I Q1 VQ1 RO VRO SO VSO TLE 4299 IINH VINH INH (TLE4299GMV33 only) CD 100 nF D Ich IRADJ VRADJ RADJ ISI VSI SI GND IGND AES02835 Figure 5 Measurement Circuit Datasheet Rev. 1.0 11 2005-01-27 TLE 4299 Application Information TLE 4299 VBAT CI2 P CQ1 C Q 22 F Q2 I CI1 Current and Saturation Control BandGapReference RSO RRO SO RSI1 SI RO Reference RSI2 Reset Control RADJ1 RADJ GND D RADJ2 CD AES03105 Figure 6 Application Diagram TLE 4299 GV33 Datasheet Rev. 1.0 12 2005-01-27 TLE 4299 TLE 4299 VBAT CI2 P CQ1 C Q 22 F Q2 I CI1 BandGapReference From KI. 15 INH Current and Saturation Control Inhibit Logic RSO RRO SO RSI1 SI RO Reference RSI2 Reset Control RADJ1 RADJ GND D RADJ2 CD AES03106 Figure 7 Application Diagram with Inhibit Function TLE4299 GMV33 The TLE 4299 supplies a regulated 3.3 V output voltage with an accuracy of 2% for an input voltage between 4.4 V and 45 V in the temperature range of Tj = – 40 to 150 °C, in an output current range of 1 mA to 100 mA. The device is capable to supply 150 mA with an accuracy of 3%. For protection at high input voltage above 25 V, the output current is reduced (SOA protection). An input capacitor is necessary for compensating line influences and to limit steep input edges. A resistor of approx. 1 Ω in series with CI, can damp the LC of the input inductivity and the input capacitor. The voltage regulator requires for stability an output capacitor CQ of at least 22 µF with an 0.4Ω < ESR < 3.7Ω for the whole load- and temperature range. For more detailed information, refer to the characteristical curves. Datasheet Rev. 1.0 13 2005-01-27 TLE 4299 Reset The power on reset feature is necessary for a defined start of the microprocessor when switching on the application. For the reset delay time after the output voltage of the regulator is above the reset threshold, the reset signal is set High again. The reset delay time is defined by the reset delay capacitor CD at pin D. The under-voltage reset circuitry supervises the output voltage. In case VQ decreases below the reset threshold the reset output is set LOW after the reset reaction time. The reset LOW signal is generated down to an output voltage VQ to 1 V. Both the reset reaction time and the reset delay time is defined by the capacitor value. The power on reset delay time is defined by the charging time of an external delay capacitor CD. CD = (td × ID) / ∆V td = CD x ∆V / ID With CD td ∆V Ich [1] [2] reset delay capacitor reset delay time = VDT, typical 1.8 V for power up reset charge current typical 3.5 µA For a delay capacitor CD =100 nF the typical power on reset delay time is 51 ms. The reset reaction time tRR is the time it takes the voltage regulator to set reset output LOW after the output voltage has dropped below the reset threshold. It is typically 1.2 µs for delay capacitor of 100 nF. For other values for CD the reaction time can be estimated using the following equation: tRR ∼ 10 ns / nF × CD Datasheet Rev. 1.0 14 [3] 2005-01-27 TLE 4299 VI t VQ < t RR V RT dV I D = dt C D VD t V DT V ST V RO t RR td t VRO, SAT t Power-on-Reset Figure 8 Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Overload at Output AED03107 Reset Timing Diagram The reset output is an open collector output. An external pull-up can be added with a resistor value of at least 5.6 kΩ. In addition the reset switching threshold can be adjusted by an external voltage divider. The feature is useful for microprocessors which guarantee safe operation down to voltages below the internally set reset threshold of 3.10V typical. If the internal used reset threshold of typical 3.10V is used, the pin RADJ has to beconnected to GND. If a lower reset threshold is required by the system, a voltage divider defines the reset threshold VRth between 2.5V and 3.10V as long as the Input Voltage VI>4.4V VRth = VRADJ TH * (RADJ1 + RADJ2) / RADJ2 (3) VRADJ TH is typical 1.36 V. Datasheet Rev. 1.0 15 2005-01-27 TLE 4299 Early Warning The early warning function compares a voltage defined by the user to an internal reference voltage. Therefore the supervised voltage has to be scaled down by an external voltage divider in order to compare it to the internal sense threshold of typical 1.36 V. The sense output pin is set low, when the voltage at SI falls below this threshold. A typical example where the circuit can be used is to supervise the input voltage VI to give the microcontroller a prewarning of low battery condition. Calculation to the voltage divider can be easily done since the sense input current can be neglected. Sense Input Voltage VSI, High VSI, Low t Sense Output t PD SO LH t PD SO HL High Low t Figure 9 Sense Timing Diagram VthHL = (RSI1 + RSI2)/RSI2 × VSI low VthLH = (RSI1 + RSI2)/RSI2 × VSI high [4] [5] The sense in comparator uses a hysteresis of typical 90 mV. This hysteresis of the supervised threshold is multiplied by the resistor dividers amplification (RSI1 + RSI2)/RSI1. The sense in comparator can also be used for receiving data with a threshold of typical 1.36 V and a hysteresis of 90 mV. Of course also the data signal can be scaled down with a resistive divider as shown above. With a typical delay time of 2.5 µs for positive transitions and 2.4 µs for negative transitions receiving data of up to 100 kBaud are possible. The sense output is an open collector output. Datasheet Rev. 1.0 16 2005-01-27 TLE 4299 Current Consumption Iq versus Junction Temperature Tj Current Consumption Iq versus Output Current IQ 2 _ IQ -IQ .V S D 12 1 _ I q - T j. v s d I q [µ A ] q [m A ] V I = 1 3 .5 V 100 IQ = 1 m A 10 8 T j = 1 5 0 °C 6 T j = 2 5 °C 4 T j = -4 0 °C 1 2 0 .0 1 -4 0 -2 0 20 0 40 60 40 0 80 100 120 140 80 120 160 T j [° C ] Current Consumption Iq versus Input Voltage VI Output Voltage VQ versus Junction Temperature Tj 3 _ IQ - V I . V S D 3 AED01671 3.5 T = 2 5 °C Iq [m A ] I Q [m A ] VQ V 3.4 V Ι = 13.5 V 2 3.3 1 .5 3.2 1 3.1 0 .5 3.0 IQ = 1 0 m A IQ = 1 m A 0 10 20 30 2.9 -40 40 40 80 120 C 160 Tj V I [V ] Datasheet Rev. 1.0 0 17 2005-01-27 TLE 4299 Reverse Output Current IQ versus Output Voltage VQ Maximum Output Current IQ versus Junction Temperature Tj 8 _ IQ M A X - T J .V S D 550 1 0 _ IQ -V Q .v s d 10 VI = 0 V I Q [m A ] I Q [m A ] -2 0 T j = -4 0 °C V I = 1 3 .5 V 450 T j = 2 5 °C -4 0 T j = 1 5 0 °C 400 -6 0 350 -8 0 300 -1 0 0 250 -4 0 -2 0 20 0 40 60 80 100 120 140 0 20 10 30 40 T j [° C ] V Q [V ] Output Voltage VQ at Input Voltage Extremes Maximum Output Current IQ versus Input Voltage VI AED03110 350 Ι Q mA VQ AED01808 6 [V] 300 250 4 Tj = 25 C 200 3 150 Tj = 125 C RL = 50 Ω 2 100 1 50 0 0 0 10 20 30 40 V 50 1 2 3 4 V 5 VΙ VΙ Datasheet Rev. 1.0 0 18 2005-01-27 TLE 4299 Power Supply Ripple Rejection PSRR versus Frequency f Region of Stability 12_ESR IQ _ 1 5 0 .V S D 100 CQ = 22µF T j = 1 5 0 °C E SR CQ [Ω ] 1 3 _ P S R R .V S D 90 PSRR [d B ] V I= 6 V 10 IQ = 0 .1 m A V I= 2 5 V 70 IQ = 1 m A 1 60 S t a b le R e g io n V I= 2 5 V IQ = 1 0 m A 50 V I= 6 V 0 .1 V R IP P L E = 0 . 5 V V IN = 1 3 . 5 V C Q = 2 2 µ F T a n t a lu m T j = 25 °C 40 0 .0 1 0 40 80 120 10 160 100 1k IQ = 1 0 0 m A 100k 10k f [H z ] I Q [m A ] Load Transient Response Peak Voltage DVQ Region of Stability 1 2 _ E S R -IQ _ 4 0 .V S D 100 2 0 _ L o a d T r a n c ie n t v s tim e 1 2 5 .v s d CQ = 22µF T j = -4 0 °C E SR CQ [Ω ] 10 IQ 1 :1 0 0 m A T j= 1 2 5 ° C V i= 1 3 .5 V V I= 6 V V I= 2 5 V 1 S t a b le R e g io n VQ V I= 2 5 V V I= 6 V 0 .1 T = 1 µ s /D IV 0 .0 1 0 40 80 120 V Q = 1 0 0 m V /D IV 160 I Q [m A ] Datasheet Rev. 1.0 19 2005-01-27 TLE 4299 Inhibit Input Current at Input Voltage Extremes (INH=OFF) Line Transient Response Peak Voltage DVQ 2 5 _ IIN H v s V IN IN H _ o ff.v s d 2 1 _ L in e T r a n c ie n t v s tim e 1 2 5 .v s d I IN H [µ A ] 50 T j= 1 2 5 ° C V i= 1 3 .5 V dVI 2V IN H = O F F 40 30 VQ T j = -4 0 ...1 5 0 ° C 20 10 T = 5 0 0 µ s/D IV V Q = 5 0 m V /D IV 10 20 30 40 V IN [ V ] Inhibut Input Current IINH at Inhibit Input Voltage Extremes Reset Trigger Threshold VRT versus Junction Temperature Tj 2 4 _ IIN H v s V IN H .v s d I IN H 2 6 _ V R T V S T E M P .V S D 3 .2 5 [µ A ] 50 V I = 1 3 .5 V V RT [V ] 40 3 .1 5 T j = 1 5 0 °C 30 3 .1 0 20 R e s e t T r ig g e r T h r e s h o ld T j = 2 5 °C 3 .0 5 T j = -4 0 °C 10 3 .0 10 20 30 40 -4 0 -2 0 V IN H [ V ] 0 20 40 60 80 100 120 140 T j [° C ] Datasheet Rev. 1.0 20 2005-01-27 TLE 4299 Sense Threshold High versus Junction Temperature Tj Reset Delay Time TRD versus Junction Temperature Tj 27_R ESETD ELAY VS T E M P .V S D 60 V I = 1 3 .5 V TRD V I = 1 3 .5 V V S I_ H i [V ] [m s ] 1 .5 0 50 C D = 100nF 45 1 .4 5 40 1 .4 0 35 1 .3 5 -4 0 -2 0 3 4 _ V S I_ H I V S T E M P .V S D 1 .6 0 0 20 40 60 -4 0 -2 0 80 100 120 140 0 20 40 60 T j [° C ] T j [° C ] Sense Threshold Low versus Junction Temperature Tj Delay Capacitor Charge Current versus Junction Temperature Tj 2 7 A _ ID -T E M P .V S D 6 3 5 _ V S I_ L O V S T E M P .V S D 1 .5 0 V I = 1 3 .5 V IC H 80 100 120 140 V I = 1 3 .5 V V S I_ L o [µ A ] [V ] 4 1 .4 0 3 1 .3 5 2 1 .3 0 1 1 .2 5 -4 0 -2 0 0 20 40 60 80 100 120 140 -4 0 -2 0 T j [° C ] Datasheet Rev. 1.0 0 20 40 60 80 100 120 140 T j [° C ] 21 2005-01-27 TLE 4299 Package Outlines GPS05121 P-DSO-8-3 (SMD) (Plastic Dual Small Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information” SMD = Surface Mounted Device Datasheet Rev. 1.0 22 Dimensions in mm 2005-01-27 TLE 4299 GPS05093 P-DSO-14-8 (SMD) (Plastic Dual Small Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information” SMD = Surface Mounted Device Datasheet Rev. 1.0 23 Dimensions in mm 2005-01-27 TLE 4299 Edition 2005-01-27 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany © Infineon Technologies AG 2005. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Datasheet Rev. 1.0 24 2005-01-27