D a t a S h e e t, R e v . 2 . 0, J a n . 20 0 5 TLE 6258-2 LIN Transceiver Automotive Power N e v e r s t o p t h i n k i n g . Edition 2005-01-13 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany © Infineon Technologies AG 2004. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. LIN Transceiver TLE 6258-2 Features • • • • • • • • Single-wire transceiver, suitable for LIN protocol Compatible to LIN specification 1.2, 1.3 and 2.0 Compatible to ISO 9141 functions Transmission rate up to 20 kBaud Very low current consumption in stand-by mode Wake-up from Bus Short circuit proof to ground and battery Overtemperature protection P-DSO-8-3, -6, -7, -8, -9 Description The single wire transceiver TLE 6258-2 is a monolithic integrated circuit in a P-DSO-8-3 package. It works as an interface between the protocol controller and the physical bus. The TLE 6258-2 is especially suitable to drive the bus line in LIN systems in automotive and industrial applications. Further it can be used in standard ISO9141 systems. In order to reduce the current consumption the TLE 6258-2 offers a stand-by mode. A wake-up caused by a message on the bus sets the RxD output low until the device is switched to normal operation mode. The IC is based on the Smart Power Technology SPT® which allows bipolar and CMOS control circuitry in accordance with DMOS power devices existing on the same monolithic circuit. The TLE 6258-2 is designed to withstand the severe conditions of automotive applications. Type Ordering Code Package TLE 6258-2 G Q67006-A9695 P-DSO-8-3 Data Sheet 3 Rev. 2.0, 2005-01-13 TLE 6258-2 TLE 6258-2 G (P-DSO-8) RxD 1 8 N.C. ENH 2 7 VS VCC 3 6 Bus TxD 4 5 GND AEP03406.VSD Figure 1 Pin Configuration (top view) Table 1 Pin Definitions and Functions Pin No. Symbol Function 1 RxD Receive data output; integrated pull-up, LOW in dominant state 2 ENN Enable not input; integrated 30 kΩ pull-up, transceiver in normal operation mode when LOW 3 VCC 5 V supply input 4 TxD Transmit data input; integrated pull-up, LOW in dominant state 5 GND Ground 6 Bus Bus output/input; internal 30 kΩ pull-up, LOW in dominant state 7 VS Battery supply input 8 n.c. Not connected Data Sheet 4 Rev. 2.0, 2005-01-13 TLE 6258-2 VS TLE 6258-2 G 7 3 VCC 30 kΩ 30 kΩ Bus 6 Output Stage Mode Control 2 ENN Driver Temp.Protection 4 TxD Receiver 1 5 RxD GND AEB03405.VSD Figure 2 Data Sheet Functional Block Diagram 5 Rev. 2.0, 2005-01-13 TLE 6258-2 Application Information Start Up Power Up Normal Mode ENN VCC Low ON ENN Low Power-Up ENN High ENN High ENN Low VCC RxD Low 1) ON or High 3) Off Wake Up t > tWAKE Stand-by Mode ENN VCC High ON or Off 1) After wake-up via bus 3) After start up, VCC ON TOAEA03451_1.VSD Figure 3 State Diagram For fail safe reasons the TLE 6258-2 has already a pull-up resistor of 30 kΩ implemented. To achieve the required timings for the dominant to recessive transition of the bus signal an additional external termination resistor of 1 kΩ is required. It is recommended to place this resistor in the master node. To avoid reverse currents from the bus line into the battery supply line in case of an unpowered node, it is recommended to place a diode in series to the external pull-up. For small systems (low bus capacitance) the EMC performance of the system is supported by an additional capacitor of at least 1 nF in the master node (see Figure 6). In order to reduce the current consumption the TLE 6258-2 offers a stand-by mode. This mode is selected by switching the Enable Not (ENN) input high (see Figure 3). In the stand-by mode a wake-up caused by a message on the bus is indicated by setting the RxD output low. When entering the normal mode this wake-up flag is reset and the RxD output is released to transmit the bus data. Data Sheet 6 Rev. 2.0, 2005-01-13 TLE 6258-2 Table 2 Absolute Maximum Ratings Parameter Symbol Limit Values Unit Remarks Min. Max. -0.3 6 V – -0.3 40 V – -20 32 V – -20 40 V -0.3 VCC + V t<1s 0 V < VCC < 5.5 V Voltages Supply voltage Battery supply voltage Bus input voltage Bus input voltage Logic voltages at EN, TxD, RxD VCC VS Vbus Vbus VI 0.3 Electrostatic discharge voltage at VS, Bus VESD -4 4 kV human body model (100 pF via 1.5 kΩ) Electrostatic discharge voltage VESD -2 2 kV human body model (100 pF via 1.5 kΩ) Tj -40 150 °C – Temperatures Junction temperature Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit . Table 3 Operating Range Parameter Supply voltage Battery Supply Voltage Junction temperature Symbol VCC VS Tj Limit Values Unit Remarks Min. Max. 4.5 5.5 V – 6 35 V – -40 150 °C – Thermal Shutdown (junction temperature) Thermal shutdown temp. Thermal shutdown hyst. TjSD ∆T 150 170 190 °C – 10 – K Rthj-a – 185 K/W – Thermal Resistances Junction ambient Data Sheet 7 Rev. 2.0, 2005-01-13 TLE 6258-2 Table 4 Electrical Characteristics 4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL = 500 Ω; VENN < VENN,ON; -40 °C < Tj < 125 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Min. Typ. Max. Unit Remark Current Consumption Current consumption ICC – 0.4 0.7 mA recessive state; VTxD = VCC Current consumption IS – 0.5 1.0 mA recessive state; VTxD = VCC Current consumption ICC – 0.4 0.8 mA dominant state; VTxD = 0 V; without RL Current consumption IS – 1.3 2.0 mA dominant state; VTxD = 0 V; without RL Current consumption ICC IS 0.4 0.7 mA power-up mode – 0.5 1.0 mA power-up mode, VCC = 0 V, VS = 13.5 V 1 3 10 µA stand-by mode – 18 40 µA stand-by mode Current consumption Current consumption Current consumption Data Sheet ICC IS 8 Rev. 2.0, 2005-01-13 TLE 6258-2 Table 4 Electrical Characteristics (cont’d) 4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL = 500 Ω; VENN < VENN,ON; -40 °C < Tj < 125 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Unit Remark Min. Typ. Max. – 2.8 0.7 × V Enable Not Input (pin ENN) HIGH level input voltage threshold VENN,off LOW level input voltage threshold VENN,on ENN input hysteresis VENN,hys RENN low power mode VCC 0.3 × 2.2 – V normal operation mode VCC 300 600 900 mV – 15 30 60 kΩ – HIGH level output current IRD,H -1.2 -0.8 -0.5 mA LOW level output current IRD,L 0.5 0.8 1.2 mA VRD = 0.8 × VCC VRD = 0.2 × VCC – 2.9 0.7 × V ENN pull-up resistance Receiver Output RxD Transmission Input TxD HIGH level input voltage threshold VTD,H TxD input hysteresis VTD,hys VTD,L LOW level input voltage threshold TxD pull-up current Data Sheet recessive state VCC 300 700 0.3 × 2.1 900 mV – – V dominant state -70 µA VTxD < 0.3 × VCC VCC ITD -150 -110 9 Rev. 2.0, 2005-01-13 TLE 6258-2 Table 4 Electrical Characteristics (cont’d) 4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL = 500 Ω; VENN < VENN,ON; -40 °C < Tj < 125 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Min. Typ. Max. Unit Remark Bus Receiver Receiver threshold voltage, recessive to dominant edge Vbus,rd 0.44 × VS 0.48 × VS – V -8 V < Vbus < Vbus,dom Receiver threshold voltage, dominant to recessive edge Vbus,dr – 0.56 × VS 0.6 × V Vbus,rec < Vbus < 20 V Receiver hysteresis Vbus,hys 0.02 × VS 0.04 × VS 0.1 × mV 0.475 × VS 0.5 × 0.525 × VS VS Receiver threshold center Vbus,cnt voltage Input leakage current Ibus,lek VS VS -1 Vbus,hys = Vbus,rec Vbus,dom LIN2.0 table 3.1 mA Vbus = 0V, Vbat = 12V, pull-up resistor as specified in LIN2.0 Wake-up threshold voltage Vwake 0.40 × VS 0.5 × 0.6 × V VS – VS Bus Transmitter Bus recessive output voltage Vbus,rec Bus dominant output voltage Vbus,dom 0.9 × – VS V VTxD = VCC 2 V VTxD = 0 V VS 0 – 7.3V<VS<27V 0 – 1.2 V VTxD = 0 V 6V<VS<7.3V Bus short circuit current Leakage current Bus pull-up resistance Data Sheet Ibus,sc Ibus,lk Rbus 40 100 150 mA -1 - – mA – 10 20 µA 20 30 47 kΩ 10 Vbus,short = 13.5 V VCC = 0 V, VS = 0 V, Vbus = -8 V, VCC = 0 V, VS = 13.5V, Vbus = 20 V, – Rev. 2.0, 2005-01-13 TLE 6258-2 Table 4 Electrical Characteristics (cont’d) 4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL = 500 Ω; VENN < VENN,ON; -40 °C < Tj < 125 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Min. Typ. Max. Unit Remark Dynamic Transceiver Characteristics 1) Falling edge slew rate Sbus(L) -3 -2.0 -1 V/µs 60% > Vbus > 40% 1 µs < (τ = RL × CBUS) < 5 µs; VCC = 5 V; VS = 13.5 V Rising edge slew rate Sbus(H) 1 1.5 3 V/µs 1) 40% < Vbus < 60% 1 µs < (τ = RL × CBUS) < 5 µs; VCC = 5 V; VS = 13.5 V Slope symmetry tslopesym 5 -5 µs Propagation delay TxD LOW to bus td(L),T – 1 3 µs tfslope - trslope VS = 18 V VCC = 5 V Propagation delay TxD HIGH to bus td(H),T – 1 3 µs VCC = 5 V Propagation delay bus dominant to RxD LOW td(L),R – 1 6 µs VCC = 5 V; CRxD = 20 pF Propagation delay bus recessive to RxD HIGH td(H),R – 1 6 µs VCC = 5 V; CRxD = 20 pF Receiver delay symmetry tsym,R -2 – 2 µs Transmitter delay symmetry tsym,T -2 – 2 µs tsym,R = td(L),R - td(H),R tsym,T = td(L),T - td(H),T Duty cycle D1 tduty1 0.396 – – µs duty cycle 11) THRec(max) = 0.744 × VS; THDom(max) = 0.581 × VS; VS = 7.0 … 18 V; tbit = 50 µs; D1 = tbus_rec(min)/2 tbit; Duty cycle D2 tduty2 – – 0.581 µs duty cycle 21) THRec(max) = 0.422× VS; THDom(max) = 0.264 × VS VS = 7.6 … 18 V; tbit = 50 µs; D2 = tbus_rec(max)/2 tbit; Data Sheet 11 Rev. 2.0, 2005-01-13 TLE 6258-2 Table 4 Electrical Characteristics (cont’d) 4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL = 500 Ω; VENN < VENN,ON; -40 °C < Tj < 125 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Wake-up delay time Delay time for mode change Symbol twake Limit Values Unit Remark Min. Typ. Max. 30 100 150 µs 170 µs 50 µs tsnorm Tj < 125 °C Tj < 150 °C 1) Bus load conditions concerning LIN spec 2.0 Cbus, Rbus = 1 nF, 1 kΩ / 6.8 nF, 660 Ω / 10 nF, 500 Ω Data Sheet 12 Rev. 2.0, 2005-01-13 TLE 6258-2 VS ENN 100 nF TxD 1 kΩ RxD 20 pF Bus CBus GND VCC 100 nF AEA03408.VSD Figure 4 Test Circuits VTxD VCC GND VBus td(L),T td(H),T t VS VBus,rd VBus,dr td(L),R td(H),R GND VRxD td(L),TR td(H),TR VCC GND t 0.7 x VCC 0.3 x VCC t AET03409.VSD Figure 5 Data Sheet Timing Diagram for Dynamic Characteristics 13 Rev. 2.0, 2005-01-13 TLE 6258-2 Application VBat LIN Bus Master Node TLE 6258-2 G VS 100 nF ENN µP RxD 1 kΩ TxD Bus GND VI + 22 µF 100 nF VCC VQ 100 nF 100 nF GND 5V e. g. TLE 4278 + GND 22 µF ECU 1 Slave Node 100 nF TLE 6258-2 G VS ENN µP RxD Bus TxD GND VQ VI + VCC e. g. TLE 4278 22 µF 100 nF GND 100 nF 100 nF GND 5V + 22 µF ECU X AEA03404.VSD Figure 6 Data Sheet Application Circuit 14 Rev. 2.0, 2005-01-13 TLE 6258-2 Package Outlines 1.27 0.1 0.41 +0.1 -0.05 .01 0.2 +0.05 -0 C 0.64 ±0.25 0.2 M A C x8 8 5 Index Marking 1 4 5 -0.21) 8˚ MAX. 4 -0.21) 1.75 MAX. 0.1 MIN. (1.5) 0.33 ±0.08 x 45˚ 6 ±0.2 A Index Marking (Chamfer) 1) Does not include plastic or metal protrusion of 0.15 max. per side GPS09032 Figure 7 P-DSO-8-3 (Plastic Dual Small Outline) You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm SMD = Surface Mounted Device Data Sheet 15 Rev. 2.0, 2005-01-13