TI TPS61086DRCT

TPS61086
Actual Size
3 mm x 3 mm
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18.5 V PFM/PWM STEP-UP DC-DC CONVERTER WITH 2.0 A SWITCH
FEATURES
1
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APPLICATIONS
2.3 V to 6.0 V Input Voltage Range
18.5 V Boost Converter With 2.0 A Switch
Current
1.2 MHz Switching Frequency
Power Save Mode for improved Efficiency at
Low Output Power or Forced PWM
Adjustable Soft-Start
Thermal Shutdown
Undervoltage Lockout
10-Pin QFN Package
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Handheld Devices
GPS Receiver
Digital Still Camera
Portable Applications
DSL Modem
PCMCIA Card
TFT LCD Bias Supply
DESCRIPTION
The TPS61086 is a high frequency, high efficiency DC to DC converter with an integrated 2.0 A, 0.13 Ω power
switch capable of providing an output voltage up to 18.5 V. The implemented boost converter is based on a fixed
frequency of 1.2MHz, pulse-width-modulation (PWM) controller that allows the use of small external inductors
and capacitors and provides fast transient response.
At light load, the device can operate in Power Save Mode with pulse-frequency-modulation (PFM) to improve the
efficiency while keeping a low output voltage ripple. For very noise sensitive applications, the device can be
forced to PWM Mode operation over the entire load range by pulling the MODE pin high. The external
compensation allows optimizing the application for specific conditions. A capacitor connected to the soft-start pin
minimizes inrush current at startup.
L
3.3 mH
VIN
2.5 V to 6 V
Cin
10 mF
16 V
8
Cby
1 mF
16 V
3
9
4
5
IN
SW
EN
SW
MODE
FB
AGND
COMP
PGND
SS
TPS61086
6
D
PMEG2010AEH
VS
12 V
R1
156 kW
7
Cout
2* 10 mF
25 V
2
R2
18 kW
1
Rcomp
68 kW
10
Css
100 nF
Ccomp
820 pF
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
TPS61086
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION (1) (2)
(1)
(2)
TA
ORDERING
PACKAGE
PACKAGE MARKING
–40 to 85°C
TPS61086DRC
QFN-10 (DRC)
PSRI
The DRC package is available taped and reeled.
For the most current package and ordering information, see the Package Option Addendum at the end
of this document, or see the TI website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
Input voltage range IN
(2)
VALUE
UNIT
–0.3 to 7.0
V
Voltage range on pins EN, FB, SS, FREQ, COMP
–0.3 to 7.0
V
Voltage on pin SW
–0.3 to 20
V
ESD rating HBM
2
kV
ESD rating MM
200
V
ESD rating CDM
500
V
Continuous power dissipation
See Dissipation Rating Table
Operating junction temperature range
–40 to 150
°C
Storage temperature range
–65 to 150
°C
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability
All voltage values are with respect to network ground terminal.
DISSIPATION RATINGS (1) (2)
(1)
(2)
PACKAGE
RθJA
TA ≤ 25°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
QFN
40°C/W
3.3 W
1.8 W
1.3 W
PD = (TJ – TA)/RθJA.
The exposed thermal die is soldered to the PCB using thermal vias. For more information, please refer
to the Texas Instruments Application report SLMA002 regarding thermal characteristics of the
PowerPAD package.
RECOMMENDED OPERATING CONDITIONS
MIN
VIN
Input voltage range
VS
Boost output voltage range
TA
Operating free-air temperature
TJ
Operating junction temperature
2
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TYP
MAX
UNIT
2.3
6.0
V
VIN + 0.5
18.5
V
–40
85
°C
–40
125
°C
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ELECTRICAL CHARACTERISTICS
VIN = 3.3 V, EN = IN, VS = 12 V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VIN
Input voltage range
2.3
IQ
Operating quiescent current into IN
Device not switching, VFB = 1.3 V
ISDVIN
Shutdown current into IN
EN = GND
VUVLO
Under-voltage lockout threshold
VIN falling
TSD
Thermal shutdown
TSDHYS
Thermal shutdown hysteresis
75
VIN rising
6.0
V
100
µA
1
µA
2.2
V
2.3
Temperature rising
V
150
°C
14
°C
LOGIC SIGNALS EN, FREQ
VIH
High level input voltage
VIN = 2.3 V to 6.0 V
VIL
Low level input voltage
VIN = 2.3 V to 6.0 V
2
0.5
V
V
IINLEAK
Input leakage current
EN = GND
0.1
µA
18.5
V
BOOST CONVERTER
VS
Boost output voltage
VIN +
0.5
VFB
Feedback regulation voltage
1.230
gm
Transconductance error amplifier
IFB
Feedback input bias current
VFB = 1.238 V
0.1
µA
rDS(on)
N-channel MOSFET on-resistance
VIN = VGS = 5 V, ISW = current limit
0.13
0.20
Ω
VIN = VGS = 3.3 V, ISW = current limit
0.16
0.23
ISWLEAK
SW leakage current
10
µA
ILIM
N-Channel MOSFET current limit
2.6
3.2
A
ISS
Soft-start current
fS
Oscillator frequency
1.238
1.246
EN = GND, VSW = 6.0V
2.0
VSS = 1.238 V
Line regulation
VIN = 2.3 V to 6.0 V, IOUT = 10 mA
Load regulation
VIN = 3.3 V, IOUT = 1 mA to 400 mA
7
10
13
µA
0.9
1.2
1.5
MHz
0.0002
%/V
0.11
%/A
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V
µA/V
107
3
TPS61086
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PIN ASSIGNMENT
DRC PACKAGE
(TOP VIEW)
COMP
SS
FB
EN
MODE
Thermal
Pad
IN
AGND
SW
PGND
SW
10-PIN 3mm x 3mm x 1mm QFN
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
COMP
1
I/O
FB
2
I
Feedback pin
EN
3
I
Shutdown control input. Connect this pin to logic high level to enable the device
AGND
PGND
SW
Compensation pin
4,
Thermal
Pad
Analog ground
5
Power ground
6, 7
IN
8
MODE
9
SS
10
Switch pin
Input supply pin
I
Operating mode selection pin. MODE = 'high' for forced PWM operation. MODE = 'low' for PFM operation
Soft-start control pin. Connect a capacitor to this pin if soft-start needed. Open = no soft-start
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
FIGURE
η
Efficiency vs Load current- PFM
VIN = 3.3 V, VS = 9 V, 12 V, 15 V
Figure 1
η
Efficiencyvs Load current - Forced PWM
VIN = 3.3 V, VS = 9 V, 12 V, 15 V
Figure 2
PFM switching 1 - discontinuous conduction
VIN = 3.3 V, VS = 12 V, Iout = 50 mA
Figure 3
PFM switching 1 - discontinuous conduction
VIN = 3.3 V, VS = 12 V, Iout = 50 mA
Figure 4
PFM switching - discontinuous conduction
VIN = 3.3 V, VS = 12 V, Iout = 4 mA
Figure 5
Forced PWM switching - discontinuous
conduction
VIN = 3.3 V, VS = 12 V, Iout = 4 mA
Figure 6
Iout(max)
PFM / PWM switching - continuous conduction VIN = 3.3 V, VS = 12 V, Iout = 300 mA
Figure 7
Maximum output current
Figure 8
Load transient response - PFM
VIN = 3.3 V, VS = 12 V, Iout = 50 mA...150
mA
Figure 9
Load transient response - Forced PWM
VIN = 3.3 V, VS = 1 2V, Iout = 50 mA...150
mA
Figure 10
Line transient response - PFM
VIN = 2.3 V...6.0 V, VS = 12 V, Iout = 0 mA
Figure 11
Line transient response - Forced PWM
VIN = 2.3 V...6.0 V, VS = 12 V, Iout = 150 mA
Figure 12
fS
Switching frequency - Forced PWM
vs Load current, VIN = 3.3 V, VS = 12 V
Figure 13
fS
Switching frequency - Forced PWM
vs Supply voltage, VS = 12 V, Iout = 200 mA
Figure 14
Soft-start
Supply current
4
Figure 15
vs Supply voltage,VIN = 3.3 V, VS = 12 V
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Figure 16
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The typical characteristics are measured with the inductor CDRH6D12 3.3 µH from Sumida and the rectifier
diode SL22.
PFM MODE
EFFICIENCY vs OUTPUT CURRENT
100
FORCE PWM MODE
EFFICIENCY vs OUTPUT CURRENT
100
VS = 9 V
90
80
80
VS = 15 V
70
VS = 12 V
Efficiency - %
Efficiency - %
70
60
50
40
30
VS = 15 V
VS = 12 V
60
50
40
30
FREQ = GND
VIN = 3.3 V
L = 3.3 µH
20
10
0
VS = 9 V
90
0.1
1
10
100
IO - Output Current - mA
FREQ = VIN
VIN = 3.3 V
L = 3.3 µH
20
10
1000
0
1
10
100
IO - Output Current - mA
Figure 1.
Figure 2.
PFM MODE SWITCHING PULSE
PFM MODE SWITCHING PULSES
VSW
5 V/div
VSW
5 V/div
VS_AC
50 mV/div
VS_AC
50 mV/div
Il
0.5 A/div
Il
0.5 A/div
1000
VIN = 3.3 V, VS = 12 V/50 mA
VIN = 3.3 V, VS = 12 V/50 mA
10 µs/div
10 µs/div
Figure 3.
Figure 4.
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PFM MODE - LIGHT LOAD
FORCED PWM MODE - LIGHT LOAD
VSW
10 V/div
VSW
10 V/div
VS_AC
50 mV/div
VS_AC
50 mV/div
Il
0.5 A/div
Il
0.5 A/div
VIN = 3.3 V, VS = 12 V/4 mA
VIN = 3.3 V, VS = 12 V/4 mA
100 µs/div
100 µs/div
Figure 5.
Figure 6.
FORCED PWM / PFM MODE - HEAVY LOAD
OUTPUT CURRENT
vs
SUPPLY VOLTAGE
1.6
VSW
10 V/div
VS = 9 V
IO - Output current - A
1.4
VS_AC
50 mV/div
Il
1 A/div
VIN = 3.3 V
VS = 12 V/300 mA
1.2
VS = 12 V
1.0
0.8
0.6
VS = 15 V
0.4
VS = 18.5 V
0.2
L = 3.3 µH
0.0
2.5
400 ns/div
Figure 7.
6
3.0
3.5
4.0
4.5
5.0
5.5
VIN - Supply voltage - V
6.0
Figure 8.
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LOAD TRANSIENT RESPONSE
PFM MODE
VS_AC
50 mV/div
LOAD TRANSIENT RESPONSE
FORCE PWM MODE
VS_AC
100 mV/div
Rcomp = 16 kΩ
Ccomp = 2.7 nF
COUT = 40 µF
L = 3.3 µH
IOUT
50 mA/div
Rcomp = 16 kΩ
Ccomp = 2.7 nF
COUT = 40 µF
L = 3.3 µH
IOUT
50 mA/div
VIN = 3.3 V
VS = 12 V/50 mA - 150 mA
VIN = 3.3 V
VS = 12 V/50 mA - 150 mA
400 µs/div
400 µs/div
Figure 9.
Figure 10.
LINE TRANSIENT RESPONSE
LIGHT LOAD
LINE TRANSIENT RESPONSE
HEAVY LOAD
VIN
2 V/div
VIN
2 V/div
COUT = 40 µF
L = 3.3 µH
Rcomp = 16 kΩ
Ccomp = 2.7 nF
VS_AC
200 mV/div
COUT = 40 µF
L = 3.3 µH
Rcomp = 16 kΩ
Ccomp = 2.7 nF
VS_AC
200 mV/div
VIN = 2.3 V - 6.0V
VS = 12 V/0 mA
VIN = 2.3 V - 6.0V
VS = 12 V/150 mA
400 µs/div
400 µs/div
Figure 11.
Figure 12.
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FREQUENCY
vs
LOAD CURRENT
FREQUENCY
vs
SUPPLY VOLTAGE
1600
1400
MODE = VIN
Forced PWM
L = 3.3 µH
1400
1200
MODE = VIN
Forced PWM
L = 3.3 µH
1000
f - Frequency - kHz
f - Frequency - kHz
1200
1000
800
600
400
VIN = 3.3 V
VS = 12 V
200
800
600
400
200
VS = 12 V / 200 mA
0
0
0.1
0.2
0.3
0.4
0.5
0.6
2.5
IO - Load current - mA
Figure 13.
Figure 14.
SOFT-START
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
5.5
6.0
2.5
VIN = 3.3 V
VS = 12 V / 300 mA
ICC - Supply Current - mA
EN
5 V/div
VS
5 V/div
2.0
MODE = VIN
Forced PWM
1.5
MODE = GND
(PFM)
1.0
0.5
IL
1 A/div
VIN = 3.3 V
VS = 12 V/50 mA
CSS = 100 nF
0
2.0
2 ms/div
Figure 15.
8
3.0
3.5
4.0
4.5 5.0
VCC - Supply Voltage - V
2.5
3.0
3.5 4.0 4.5 5.0 5.5
VCC - Supply Voltage - V
6.0
Figure 16.
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DETAILED DESCRIPTION
VIN
VS
EN
SS
IN
SW
MODE
SW
Current limit
and
Soft Start
Toff Generator
AGND
Bias Vref = 1.24 V
UVLO
Thermal Shutdown
Ton
PWM
Generator
Gate Driver of
Power
Transistor
COMP
GM Amplifier
FB
Vref
PGND
Figure 17. Block Diagram
The boost converter is designed for output voltages up to 18.5 V with a switch peak current limit of 2.0 A
minimum. The device, which operates in a current mode scheme with quasi-constant frequency, is externally
compensated for maximum flexibility and stability. The switching frequency is fixed to 1.2 MHz and the minimum
input voltage is 2.3 V. To limit the inrush current at start-up a soft-start pin is available.
TPS61086 boost converter’s novel topology using adaptive off-time provides superior load and line transient
responses and operates also over a wider range of applications than conventional converters.
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Design Procedure
The first step in the design procedure is to verify that the maximum possible output current of the boost converter
supports the specific application requirements. A simple approach is to estimate the converter efficiency, by
taking the efficiency numbers from the provided efficiency curves or to use a worst case assumption for the
expected efficiency, e.g. 90%.
1. Duty cycle, D:
D = 1-
VIN ×h
VS
(1)
2. Maximum output current, Iout(max):
DI ö
æ
I out (max) = ç I LIM (min) - L ÷ × (1 - D )
2 ø
è
(2)
3. Peak switch current in application, Iswpeak:
I swpeak =
I
DI L
+ out
2 1- D
(3)
with the inductor peak-to-peak ripple current, ΔIL
DI L =
VIN × D
fS × L
(4)
and
VIN
Minimum input voltage
VS
Output voltage
ILIM(min)
Converter switch current limit (minimum switch current limit = 2.0 A)
fS
Converter switching frequency (typically 1.2 MHz)
L
Selected inductor value
η
Estimated converter efficiency (please use the number from the efficiency plots or 90% as an estimation)
The peak switch current is the steady state peak switch current that the integrated switch, inductor and external
Schottky diode has to be able to handle. The calculation must be done for the minimum input voltage where the
peak switch current is the highest.
Soft-start
The boost converter has an adjustable soft-start to prevent high inrush current during start-up. To minimize the
inrush current during start-up an external capacitor, connected to the soft-start pin SS and charged with a
constant current, is used to slowly ramp up the internal current limit of the boost converter. When the EN pin is
pulled high, the soft-start capacitor CSS is immediately charged to 0.3 V. The capacitor is then charged at a
constant current of 10 µA typically until the output of the boost converter VS has reached its Power Good
threshold (90% of VS nominal value). During this time, the SS voltage directly controls the peak inductor current,
starting with 0 A at VSS = 0.3 V up to the full current limit at VSS ≈ 800 mV. The maximum load current is
available after the soft-start is completed. The larger the capacitor the slower the ramp of the current limit and the
longer the soft-start time. A 100 nF capacitor is usually sufficient for most of the applications. When the EN pin is
pulled low, the soft-start capacitor is discharged to ground.
Inductor Selection
The TPS61086 is designed to work with a wide range of inductors. The main parameter for the inductor selection
is the saturation current of the inductor which should be higher than the peak switch current as calculated in the
Design Procedure section with additional margin to cover for heavy load transients. An alternative, more
conservative, is to choose an inductor with a saturation current at least as high as the maximum switch current
limit of 3.2 A. The other important parameter is the inductor DC resistance. Usually the lower the DC resistance
the higher the efficiency. It is important to note that the inductor DC resistance is not the only parameter
10
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determining the efficiency. Especially for a boost converter where the inductor is the energy storage element, the
type and core material of the inductor influences the efficiency as well. Usually an inductor with a larger form
factor gives higher efficiency. The efficiency difference between different inductors can vary between 2% to 10%.
For the TPS61086, inductor values between 3 µH and 6 µH are a good choice. Possible inductors are shown in
Table 1.
Typically, it is recommended that the inductor current ripple is below 35% of the average inductor current. The
following equation can therefore be used to calculate the inductor value, L:
2
æ V ö æ V -V ö æ h ö
L = ç IN ÷ × ç S IN ÷ × ç
÷
è VS ø è I out × f S ø è 0.35 ø
(5)
with
VIN
Minimum input voltage
VS
Output voltage
Iout
Maximum output current in the application
fS
Converter switching frequency (typically 1.2 MHz)
η
Estimated converter efficiency (please use the number from the efficiency plots or 90% as an estimation)
Table 1. Inductor Selection
L
(µH)
SUPPLIER
COMPONENT
CODE
SIZE
(L×W×H mm)
DCR TYP
(mΩ)
Isat (A)
3.3
Sumida
CDH38D09
4x4x1
240
1.25
4.7
Sumida
CDPH36D13
5 x 5 x 1.5
155
1.36
3.3
Sumida
CDPH4D19F
5.2 x 5.2 x 2
33
1.5
3.3
Sumida
CDRH6D12
6.7 x 6.7 x 1.5
62
2.2
4.7
Würth Elektronik
7447785004
5.9 x 6.2 x 3.3
60
2.5
5
Coilcraft
MSS7341
7.3 x 7.3 x 4.1
24
2.9
Rectifier Diode Selection
To achieve high efficiency a Schottky type should be used for the rectifier diode. The reverse voltage rating
should be higher than the maximum output voltage of the converter. The averaged rectified forward current Iavg,
the Schottky diode needs to be rated for, is equal to the output current Iout:
I avg = I out
(6)
Usually a Schottky diode with 1A maximum average rectified forward current rating is sufficient for most
applications. The Schottky rectifier can be selected with lower forward current capability depending on the output
current Iout but has to be able to dissipate the power. The dissipated power, PD, is the average rectified forward
current times the diode forward voltage, Vforward.
PD = I avg × V forward
(7)
Typically the diode should be able to dissipate around 500mW depending on the load current and forward
voltage.
Table 2. Rectifier Diode Selection
CURRENT
RATING Iavg
Vr
Vforward/Iavg
SUPPLIER
COMPONENT
CODE
PACKAGE
TYPE
750 mA
20 V
0.425 V / 1 A
Fairchild Semiconductor
FYV0704S
SOT 23
1A
20 V
0.39 V / 1 A
NXP
PMEG2010AEH
SOD 123
1A
20 V
0.5 V / 1 A
Vishay Semiconductor
SS12
SMA
1A
20 V
0.44 V / 1 A
Vishay Semiconductor
MSS1P2L
µ -SMP
2A
20 V
0.44 V / 2 A
Vishay Semiconductor
SL22
SMB
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Setting the Output Voltage
The output voltage is set by an external resistor divider. Typically, a minimum current of 50 µA flowing through
the feedback divider gives good accuracy and noise covering. A standard low side resistor of 18 kΩ is typically
selected. The resistors are then calculated as:
VS
R2 =
VFB
» 18k W
70 m A
æ V
ö
R1 = R 2 × ç S - 1÷
è VFB
ø
R1
VFB
VFB = 1.238V
R2
(8)
Compensation (COMP)
The regulator loop can be compensated by adjusting the external components connected to the COMP pin. The
COMP pin is the output of the internal transconductance error amplifier.
Standard values of RCOMP = 16 kΩ and CCOMP = 2.7 nF will work for the majority of the applications.
Please refer to Table 3 for dedicated compensation networks giving an improved load transient response. The
following equations can be used to calculate RCOMP and CCOMP:
RCOMP =
110 × VIN × VS × Cout
L × I out
CCOMP =
Vs × Cout
7.5 × I out × RCOMP
(9)
with
VIN
Minimum input voltage
VS
Output voltage
Cout
Output capacitance
L
Inductor value, e.g. 3.3 µH or 4.7 µH
Iout
Maximum output current in the application
Make sure that RCOMP < 120 kΩ and CCOMP> 820 pF, independent of the results of the above formulas.
Table 3. Recommended Compensation Network Values at High/Low Frequency
L
VS
15 V
3.3 µH
12 V
9V
VIN ± 20%
RCOMP
CCOMP
820 pF
5V
100 kΩ
3.3 V
91 kΩ
1.2 nF
5V
68 kΩ
820 pF
3.3 V
68 kΩ
1.2 nF
5V
39 kΩ
820 pF
3.3 V
39 kΩ
1.2 nF
Table 3 gives conservative RCOMP and CCOMP values for certain inductors, input and output voltages providing a
very stable system. For a faster response time, a higher RCOMP value can be used to enlarge the bandwidth, as
well as a slightly lower value of CCOMP to keep enough phase margin. These adjustments should be performed in
parallel with the load transient response monitoring of TPS61086.
Input Capacitor Selection
For good input voltage filtering low ESR ceramic capacitors are recommended. TPS61086 has an analog input
IN. Therefore, a 1 µF bypass is highly recommended as close as possible to the IC from IN to GND.
One 10 µF ceramic input capacitors are sufficient for most of the applications. For better input voltage filtering
this value can be increased. Refer to Table 4 and typical applications for input capacitor recommendation
12
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Output Capacitor Selection
For best output voltage filtering a low ESR output capacitor like ceramic capcaitor is recommended. Two to four
10 µF ceramic output capacitors (or two 22 µF) work for most of the applications. Higher capacitor values can be
used to improve the load transient response. Refer to Table 4 for the selection of the output capacitor.
Table 4. Rectifier Input and Output Capacitor Selection
CAPACITOR/SI
ZE
VOLTAGE RATING
SUPPLIER
COMPONENT CODE
CIN
22 µF/1206
16 V
Taiyo Yuden
EMK316 BJ 226ML
IN bypass
1 µF/0603
16 V
Taiyo Yuden
EMK107 BJ 105KA
COUT
10 µF/1206
25 V
Taiyo Yuden
TMK316 BJ 106KL
To calculate the output voltage ripple, the following equation can be used:
DVC =
VS - VIN I out
×
VS × f S Cout
DVC _ ESR = I L ( peak ) × RC _ ESR
(10)
with
ΔVC
Output voltage ripple dependent on output capacitance,output current and switching frequency
VS
Output voltage
VIN
Minimum input voltage of boost converter
fS
Converter switching frequency (typically 1.2 MHz)
Iout
Output capacitance
ΔVC_ESR
Output voltage ripple due to output capacitors ESR (equivalent series resistance)
ISWPEAK
Inductor peak switch current in the application
RC_ESR
Output capacitors equivalent series resistance (ESR)
ΔVC_ESR can be neglected in many cases since ceramic capacitors provide very low ESR.
Operating Mode (MODE)
Power Save Mode
Connecting the MODE pin to GND (or any low logic level) enables the Power Save Mode operation. The
converter operates in quasi fixed frequency PWM (Pulse Width Modulation) mode at moderate to heavy load and
in the PFM (Pulse Frequency Modulation) mode during light loads, which maintains high efficiency over a wide
load current range.
In PFM mode the converter is skipping switch pulses. However, within a PFM pulse, the switching frequency is
still fixed to 1.2 MHz typically and the duty cycle determined by the input and output voltage. Therefore, the
inductor peak current will remain constant for a defined application. With an increasing output load current, the
PFM pulses become closer and closer (the PFM mode frequency gets higher) until no pulse is skipped anymore:
the device operates then in CCM (Continuous Conduction Mode) with normal PWM mode.
The PFM mode frequency (between each PFM pulse) depends on the load current, the external components like
the inductor or the output capacitor values as well as the output voltage. The device enters Power Save Mode as
the inductor peak current falls below a 0.6A typically and switches until VS is 1% higher than its nominal value.
The converter stops switching when VS = VS + 0.5%. The output voltage will thenrefore oscillate between 0.5%
and 1% more than its nominal value which will provide excellent transient response to sudden load change, since
the output voltage drop will be reduced due to this slight positive offset (see Figure 9).
Forced PWM Mode
Pulling the MODE pin high forces the converter to operate in a continuous PWM mode evan at light load
currents. The advantage is that the converter operates with a quai constant frequency that allows simple filtering
of the swithcing frequency for noise-sensitive applications. In this mode and at light load, the efficiency is lower
compared to the Power Save Mode.
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For additional flexibility, it is possible to switch from Power Save Mode to Forced PWM Mode during operation.
This allows efficient power management by adjusting the operation of the converter to the specific system
requirements.
Undervoltage Lockout (UVLO)
To avoid mis-operation of the device at low input voltages an undervoltage lockout is included that disables the
device, if the input voltage falls below 2.2 V.
Thermal Shutdown
A thermal shutdown is implemented to prevent damages due to excessive heat and power dissipation. Typically
the thermal shutdown happens at a junction temperature of 150°C. When the thermal shutdown is triggered the
device stops switching until the junction temperature falls below typically 136°C. Then the device starts switching
again.
Overvoltage Prevention
If overvoltage is detected on the FB pin (typically 3 % above the nominal value of 1.238 V) the part stops
switching immediately until the voltage on this pin drops to its nominal value. This prevents overvoltage on the
output and secures the circuits connected to the output from excessive overvoltage.
14
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APPLICATION INFORMATION
L
3.3 µH
VIN
3.3 V ± 20%
8
Cin
10 µF
16 V
Cby
1 µF
16 V
3
9
4
5
IN
SW
EN
SW
MODE
FB
AGND
COMP
PGND
SS
VS
12 V/50 mA
D
PMEG2010AEH
6
R1
156 kΩ
7
Cout
2*10 µF
25 V
2
R2
18 kΩ
1
Rcomp
68kΩ
10
Css
100 nF
TPS61086
Ccomp
1.2 nF
Figure 18. Typical Application, 3.3 V to 12 V (PFM MODE)
L
3.3 µH
VIN
3.3 V ± 20%
8
Cin
10 µF
16 V
Cby
1 µF
16 V
3
9
4
5
IN
SW
EN
SW
MODE
FB
AGND
COMP
PGND
SS
TPS61086
VS
12 V/500 mA max.
D
PMEG2010AEH
6
R1
156 kΩ
7
Cout
10 µF
25 V
2
R2
18 kΩ
1
Rcomp
68kΩ
10
Css
100 nF
Ccomp
1.2 nF
Figure 19. Typical Application, 3.3V to 12 V (FORCE PWM MODE)
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Riso
10 kW
L
3.3 µH
VIN
5 V ± 20%
Cby
1 µF/16 V
8
Cin
2* 10 µF/
16 V
3
9
4
Enable
SW
IN
SW
EN
MODE
FB
AGND
COMP
PGND
SS
5
VS
15 V/50 mA
BC857C
D
PMEG2010AEH
6
Ciso
1 µF/ 25 V
7
R1
200 kΩ
2
Cout
4*10 µF/
25 V
R2
18 kΩ
1
Rcomp
100 kΩ
10
TPS61086
Css
100 nF
Ccomp
820 pF
Figure 20. Typical Application with External Load Disconnect Switch
L
3.3 µH
Overvoltage
D
PMEG2010AEH Protection
VIN
3.3 V ± 20%
8
Cin
10 µF
16 V
Cby
1 µF
16 V
3
9
4
5
IN
SW
EN
SW
MODE
FB
COMP
AGND
PGND
SS
TPS61086
VS
15 V/30 mA
6
Dz
BZX84C 18V
7
R1
200 kΩ
Cout
10 µF
25 V
2
Rlimit
110 Ω
1
R2
18 kΩ
Rcomp
91 kΩ
10
Css
100 nF
Ccomp
1.2 nF
Figure 21. Typical Application, 3.3 V to 15 V (PFM MODE) with Overvoltage Protection
16
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TFT LCD APPLICATION
T2
BC850B
3·Vs
VGL
-7 V/20 mA
T1
BC857B
-Vs
R8
6.8 kΩ
C13
1 µF/
35 V
C16
470 nF/
50 V
C14
470 nF/
25 V
D4
BAV99
C15
470 nF/
50 V
D3
BAV99
C18
470 nF/
50 V
R10
13 kΩ
2·Vs
C17
470 nF/
50 V
D2
BAV99
D8
BZX84C7V5
Vgh
26.5 V/20 mA
C20
1 µF/
35 V
C19
470 nF/
50 V
D9
BZX84C27V
L
3.3 µH
VIN
5 V ± 20%
Cin
2*10 µF/
16 V
Cby
1 µF/
16 V
D
SL22
8
IN
SW
EN
SW
3
7
9
R1
200 kΩ
Cout
4*10µF/
25V
2
MODE
FB
4
5
VS
15 V/500 mA
6
R2
18 kΩ
1
AGND
COMP
PGND
SS
TPS61086
Rcomp
100 kΩ
10
Css
100 nF
Ccomp
820 pF
Figure 22. Typical Application 5 V to 15 V (FORCE PWM MODE) for TFT LCD with External Charge Pumps
(VGH, VGL)
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WHITE LED APPLICATIONS
L
3.3 µH
optional
Cby
1 µF/ 16 V
VIN
3.3 V ± 20%
6
8
Cin
10 µF/
16 V
3
9
4
5
IN
SW
EN
SW
D
PMEG2010AEH
Dz
BZX84C
18 V
VS
300 mA
3S3P wLED
LW E67C
7
Cout
2* 10 µF/
25 V
2
MODE
FB
AGND
COMP
PGND
SS
Rlimit
110 Ω
1
Rcomp
68 kΩ
10
TPS61086
Css
100 nF
Rsense
15 Ω
Ccomp
1.2 nF
Figure 23. Simple Application (3.3 V input voltage - FORCED PWM MODE) for wLED Supply (3S3P) (with
optional clamping Zener diode)
L
3.3 µH
optional
VIN
3.3 V ± 20%
Cin
10 µF/
16 V
Cby
1 µF/ 16 V
3
9
4
PWM
100 Hz to 500 Hz
6
8
5
IN
SW
EN
SW
D
PMEG2010AEH
Dz
BZX84C
18 V
VS
300 mA
3S3P wLED
LW E67C
7
Cout
2* 10 µF/
25 V
2
MODE
FB
AGND
COMP
PGND
SS
TPS61086
Rlimit
110 Ω
1
Rcomp
68 kΩ
10
Css
100 nF
Rsense
15 Ω
Ccomp
1.2 nF
Figure 24. Simple Application (3.3 V input voltage - FORCED PWM MODE) for wLED Supply (3S3P) with
Adjustable Brightness Control using a PWM Signal on the Enable Pin (with optional clamping Zener
diode)
18
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L
3.3 µH
optional
VIN
3.3 V ± 20%
Cby
1 µF/ 16 V
6
8
D
PMEG2010AEH
VS
300 mA
3S3P wLED
LW E67C
Dz
BZX84C
SW
IN
18 V
Cin
10 µF/
16 V
3
9
4
5
7
EN
Cout
2* 10 µF/
25 V
SW
2
MODE
FB
AGND
COMP
PGND
SS
TPS61086
R1
180 kΩ
Rlimit
110 Ω
1
10
Css
100 nF
Rcomp
68 kΩ
Ccomp
1.2 nF
R2
127 kΩ
Rsense
15 Ω
Analog Brightness Control
3.3 V ~ wLED off
0 V ~ lLED = 30 mA (each string)
PWM Signal
Can be used swinging from 0 V to 3.3 V
Figure 25. Simple Application (3.3 V input voltage - FORCED PWM MODE) for wLED Supply (3S3P) with
Adjustable Brightness Control using an Analog Signal on the Feedback Pin (with optional clamping
Zener diode)
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19
PACKAGE OPTION ADDENDUM
www.ti.com
7-Sep-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS61086DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS61086DRCT
ACTIVE
SON
DRC
10
250
CU NIPDAU
Level-2-260C-1 YEAR
Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Sep-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TPS61086DRCR
SON
DRC
10
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS61086DRCT
SON
DRC
10
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Sep-2009
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS61086DRCR
SON
DRC
10
3000
346.0
346.0
29.0
TPS61086DRCT
SON
DRC
10
250
190.5
212.7
31.8
Pack Materials-Page 2
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