STMICROELECTRONICS TSU102IQ2T

TSU101, TSU102, TSU104
Nanopower, rail-to-rail input and output, 5 V CMOS
operational amplifiers
Datasheet - production data
• Application performances guaranteed over
industrial temperature range
• Fast desaturation
6&768
627768
Applications
• Ultra long life battery-powered applications
• Power metering
')1[768
• UV and photo sensors
0LQL62768
• Electrochemical and gas sensors
• Pyroelectric passive infrared (PIR) detection
• Battery current sensing
• Medical instrumentation
• RFID readers
4)1[768
Description
76623768
Features
• Submicro ampere current consumption:
580 nA typ per channel at 25 °C at VCC = 1.8 V
• Low supply voltage: 1.5 V - 5.5 V
• Unity gain stable
• Rail-to-rail input and output
• Gain bandwidth product: 8 kHz typ
• Low input bias current: 5 pA max at 25 °C
The TSU101, TSU102, and TSU104 operational
amplifiers offer an ultra low-power consumption of
580 nA typical and 750 nA maximum per channel
when supplied by 1.8 V. Combined with a supply
voltage range of 1.5 V to 5.5 V, these features
allow the TSU10x series to be efficiently supplied
by a coin type Lithium battery or a regulated
voltage in low-power applications.
The 8 kHz gain bandwidth of these devices make
them ideal for sensor signal conditioning, battery
supplied, and portable applications.
• High tolerance to ESD: 2 kV HBM
• Industrial temperature range: -40 °C to +85 °C
Benefits
• 42 years of typical equivalent lifetime (for
TSU101) if supplied by a 220 mAh coin type
Lithium battery
• Tolerance to power supply transient drops
• Accurate signal conditioning of high impedance
sensors
July 2013
This is information on a product in full production.
DocID024317 Rev 2
1/33
www.st.com
Contents
TSU101, TSU102, TSU104
Contents
1
Package pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5
4.1
Operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2
Rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.3
Input offset voltage drift over temperature . . . . . . . . . . . . . . . . . . . . . . . . 17
4.4
Long term input offset voltage drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.5
Schematic optimization aiming for nanopower . . . . . . . . . . . . . . . . . . . . . 19
4.6
PCB layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.7
Using the TSU10x series with sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.8
Fast desaturation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.9
Using the TSU10x series in comparator mode . . . . . . . . . . . . . . . . . . . . . 22
4.10
ESD structure of TSU10x series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1
SC70-5 (or SOT323-5) package mechanical data . . . . . . . . . . . . . . . . . . 25
5.2
SOT23-5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.3
DFN8 2x2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.4
MiniSO8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.5
QFN16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.6
TSSOP14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
1
Package pin connections
Package pin connections
Figure 1. Pin connections for each package (top view)
,1
9&&
287
9&&
,1
9&&
,1
9&&
,1
287
SC70-5/SOT23-5 (TSU101)
SC70-5/SOT23-5 (TSU101R)
287
9&&
287
9&&
,1
287
,1
287
,1
,1
,1
,1
9&&
,1
9&&
,1
DFN8 2x2 (TSU102)
QFN16 3x3 (TSU104)
DocID024317 Rev 2
MiniSO8 (TSU102)
Out1
1
14
Out4
In1-
2
13
In4-
In1+
3
12
In4+
Vcc+
4
11
Vcc-
In2+
5
10
In3+
In2-
6
9
In3-
Out2
7
8
Out3
TSSOP14 (TSU104)
3/33
33
Absolute maximum ratings and operating conditions
2
TSU101, TSU102, TSU104
Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings (AMR)
Symbol
Vcc
Vid
Vin
Iin
Tstg
Parameter
Value
(1)
Supply voltage
Unit
6
(2)
Differential input voltage
±Vcc
V
(3)
Vcc- - 0.2 to Vcc+ + 0.2
(4)
10
mA
-65 to +150
°C
Input voltage
Input current
Storage temperature
(5)(6)
Rthja
Tj
Thermal resistance junction to ambient
SC70-5
SOT23-5
DFN8 2x2
MiniSO8
QFN16 3x3
TSSOP14
205
250
117
190
45
100
Maximum junction temperature
150
HBM: human body
MM: machine
ESD
model(7)
model(8)
°C/W
°C
2000
200
V
model(9)
CDM: charged device
All other packages except SC70-5
SC70-5
1000
900
Latch-up immunity(10)
200
mA
1. All voltage values, except the differential voltage are with respect to the network ground terminal.
2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal.
3. (Vcc+ - Vin) must not exceed 6 V, (Vin - Vcc-) must not exceed 6 V.
4. The input current must be limited by a resistor in series with the inputs.
5. Short-circuits can cause excessive heating and destructive dissipation.
6. Rth are typical values.
7. Related to ESDA/JEDEC JS-001 Apr. 2010
8. Related to JEDEC JESD22-A115C Nov.2010
9. Related to JEDEC JESD22-C101-E Dec. 2009
10. Related to JEDEC JESD78C Sept. 2010
Table 2. Operating conditions
Symbol
4/33
Parameter
Vcc
Supply voltage
Vicm
Common mode input voltage range
Toper
Operating free air temperature range
Value
1.5 to 5.5
DocID024317 Rev 2
Vcc- - 0.1 to Vcc+ + 0.1
-40 to +85
Unit
V
°C
TSU101, TSU102, TSU104
3
Electrical characteristics
Electrical characteristics
Table 3. Electrical characteristics at Vcc+ = 1.8 V with Vcc- = 0 V, Vicm = Vcc/2, Tamb = 25 ° C, and
RL = 1 MΩ connected to Vcc/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
-3
0.1
3
Unit
DC performance
Vio
ΔVio/ΔT
Input offset voltage
-40 °C < T< 85 °C
Input offset voltage drift
-40 °C < T< 85 °C
ΔVio
Long-term input offset
voltage drift
T = 25 °C(1)
Iio
Input offset current (2)
Iib
CMR
Avd
VOH
VOL
Input bias current
Common mode rejection
ratio 20 log (ΔVicm/ΔVio)
Large signal voltage gain
High level output voltage
(drop from VCC+)
Low level output voltage
Iout
Output source current
Supply current
(per channel)
3.4
5
1
-40 °C < T< 85 °C
-40 °C < T< 85 °C
5
5
pA
30
Vicm = 0 to 0.6 V, Vout = VCC/2
65
-40 °C < T< 85 °C
65
Vicm = 0 to 1.8 V, Vout = VCC/2
55
-40°C < T< 85 °C
55
Vout = 0.3 V to (VCC+ - 0.3 V)
RL = 100 kΩ
95
-40 °C < T< 85 °C
95
85
74
dB
115
RL = 100 kΩ
40
-40 °C < T< 85 °C
40
RL = 100 kΩ
40
-40 °C < T< 85 °C
40
Vout = VCC , VID = -200 mV
4
-40 °C < T< 85 °C
4
Vout = 0 V, VID = + 200 mV
4
-40 °C < T< 85 °C
4
No load, Vout = VCC/2
μV/°C
μV
month
30
1
mV
---------------------------
0.18
(2)
Output sink current
ICC
-3.4
mV
5
mA
5
580
-40 °C < T< 85 °C
750
800
nA
AC performance
Gain bandwidth product
8
Fu
Unity gain frequency
8
Φm
Phase margin
Gm
Gain margin
GBP
RL = 1 MΩ, CL = 60 pF
DocID024317 Rev 2
kHz
60
degrees
10
dB
5/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Table 3. Electrical characteristics at Vcc+ = 1.8 V with Vcc- = 0 V, Vicm = Vcc/2, Tamb = 25 ° C, and
RL = 1 MΩ connected to Vcc/2 (unless otherwise specified) (continued)
Symbol
Parameter
SR
Slew rate (10 % to 90 %)
en
Equivalent input noise
voltage
∫ en
Low-frequency peak-topeak input noise
in
Equivalent input noise
current
trec
Overload recovery time
Conditions
RL = 1 MΩ, CL = 60 pF
Vout = 0.3 V to (VCC+ - 0.3 V)
Min.
Typ.
3
f = 100 Hz
265
f = 1 kHz
265
Bandwidth: f = 0.1 to 10 Hz
f = 100 Hz
9
0.64
f = 1 kHz
4.4
100 mV from rail in comparator
RL = 100 kΩ, VID = ±VCC
-40 °C < T< 85 °C
30
Max.
Unit
V/ms
nV
-----------Hz
µVpp
fA
-----------Hz
µs
1. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
2. Guaranteed by design.
6/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Electrical characteristics
Table 4. Electrical characteristics at Vcc+ = 3.3 V with Vcc- = 0 V, Vicm = Vcc/2, Tamb = 25 ° C, and
RL = 1 MΩ connected to Vcc/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
-3
0.1
3
Unit
DC performance
Vio
ΔVio/ΔT
Input offset voltage
-40 °C < T< 85 °C
Input offset voltage drift
-40 °C < T< 85 °C
ΔVio
Long-term input offset
voltage drift
T = 25 °C(1)
Iio
Input offset current(2)
Iib
CMR
Avd
VOH
VOL
Input bias current(2)
Common mode rejection
ratio 20 log (ΔVicm/ΔVio)
Large signal voltage gain
High level output voltage
(drop from VCC+)
Low level output voltage
Output sink current
Iout
Output source current
ICC
Supply current
(per channel)
-3.4
3.4
5
-40 °C < T< 85 °C
μV
month
5
30
1
-40 °C < T< 85 °C
5
pA
30
Vicm = 0 to 2.1 V, Vout = VCC/2
70
-40 °C < T< 85 °C
70
Vicm = 0 to 3.3 V, Vout = VCC/2
60
-40 °C < T< 85 °C
60
Vout = 0.3 V to (VCC+ - 0.3 V)
RL= 100 kΩ
105
-40 °C < T< 85 °C
105
92
77
dB
120
RL = 100 kΩ
40
-40 °C < T< 85 °C
40
RL = 100 kΩ
40
-40 °C < T< 85 °C
40
Vout = VCC , VID= -200 mV
6
-40 °C < T< 85 °C
6
Vout = 0 V, VID = + 200 mV
8
-40 °C < T< 85 °C
8
No load, Vout = VCC/2
μV/°C
---------------------------
0.36
1
mV
mV
9
mA
11
600
-40 °C < T< 85 °C
800
850
nA
AC performance
GBP
Gain bandwidth product
8
Fu
Unity gain frequency
8
Φm
Phase margin
Gm
Gain margin
SR
Slew rate (10 % to 90 %)
RL = 1 MΩ, CL = 60 pF
RL = 1 MΩ, CL = 60 pF,
Vout = 0.3 V to (VCC+ - 0.3 V)
DocID024317 Rev 2
kHz
60
degrees
11
dB
3
V/ms
7/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Table 4. Electrical characteristics at Vcc+ = 3.3 V with Vcc- = 0 V, Vicm = Vcc/2, Tamb = 25 ° C, and
RL = 1 MΩ connected to Vcc/2 (unless otherwise specified) (continued)
Symbol
en
∫ en
Parameter
Equivalent input noise
voltage
Low-frequency peak-topeak input noise
in
Equivalent input noise
current
trec
Overload recovery time
Conditions
Min.
Typ.
f = 100 Hz
260
f = 1 kHz
255
Bandwidth: f = 0.1 to 10 Hz
8.6
f = 100 Hz
0.55
f = 1 kHz
3.8
100 mV from rail in comparator
RL = 100 kΩ, VID= ±VCC
-40 °C < T< 85 °C
30
Max.
Unit
nV
-----------Hz
µVpp
fA
-----------Hz
µs
1. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
2. Guaranteed by design.
8/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Electrical characteristics
Table 5. Electrical characteristics at Vcc+ = 5 V with Vcc- = 0 V, Vicm = Vcc/2, Tamb = 25 ° C, and
RL = 1 MΩ connected to Vcc/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
-3
0.1
3
Unit
DC performance
Vio
ΔVio/ΔT
Input offset voltage
-40 °C < T< 85 °C
Input offset voltage drift
-40 °C < T< 85 °C
ΔVio
Long-term input offset
voltage drift
T = 25 °C(1)
Iio
Input offset current(2)
Iib
CMR
SVR
Avd
VOH
VOL
Input bias current (2)
Common mode rejection
ratio 20 log (ΔVicm/ΔVio)
Supply voltage rejection
ratio
Large signal voltage gain
High level output voltage
(drop from VCC+)
Low level output voltage
Output sink current
Iout
Output source current
ICC
Supply current
(per channel)
-3.4
3.4
5
-40 °C < T< 85 °C
μV
month
5
30
1
-40 °C < T< 85 °C
5
pA
30
Vicm = 0 to 3.8 V, Vout = VCC/2
70
-40 °C < T< 85 °C
70
Vicm = 0 to 5 V, Vout = VCC/2
65
-40 °C < T< 85 °C
65
VCC = 1.5 to 5.5 V, Vicm = 0 V
70
-40 °C < T< 85 °C
70
Vout = 0.3 V to (Vcc+ - 0.3 V)
RL= 100 kΩ
110
-40°C < T< 85 °C
110
90
82
dB
90
130
RL = 100 kΩ
40
-40 °C < T< 85 °C
40
RL = 100 kΩ
40
-40 °C < T< 85 °C
40
Vout = VCC , VID = -200 mV
6
-40 °C < T< 85 °C
6
Vout = 0 V, VID = + 200 mV
8
-40 °C < T< 85 °C
8
No load, Vout = VCC/2
μV/°C
---------------------------
1.1
1
mV
mV
9
mA
11
650
-40 °C < T< 85 °C
850
nA
950
AC performance
GBP
Gain bandwidth product
Fu
Unity gain frequency
Φm
Phase margin
Gm
Gain margin
9
RL = 1 MΩ, CL = 60 pF
DocID024317 Rev 2
8.6
kHz
60
degrees
12
dB
9/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Table 5. Electrical characteristics at Vcc+ = 5 V with Vcc- = 0 V, Vicm = Vcc/2, Tamb = 25 ° C, and
RL = 1 MΩ connected to Vcc/2 (unless otherwise specified) (continued)
Symbol
Parameter
SR
Slew rate (10 % to 90 %)
en
Equivalent input noise
voltage
∫ en
Low-frequency
peak-to-peak input noise
in
Equivalent input noise
current
trec
Overload recovery time
EMIRR
Conditions
RL = 1 MΩ, CL = 60 pF,
Vout = 0.3 V to (VCC+ - 0.3 V)
Min.
Typ.
3
f = 100 Hz
240
f = 1 kHz
225
Bandwidth: f = 0.1 to 10 Hz
8.1
f = 100 Hz
0.18
f = 1 kHz
3.5
100 mV from rail in comparator
RL = 100 kΩ, VID= ±VCC
-40 °C < T< 85 °C
30
Vin = -10 dBm, f = 400 MHz
73
Vin = -10 dBm, f = 900 MHz
Electromagnetic
(3)
interference rejection ratio
Vin = -10 dBm, f = 1.8 GHz
88
Vin = -10 dBm, f = 2.4 GHz
80
Max.
Unit
V/ms
nV
-----------Hz
µVpp
fA
-----------Hz
µs
dB
80
1. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
2. Guaranteed by design.
3. Based on evaluations performed only in conductive mode.
10/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Electrical characteristics
Figure 2. Supply current vs. supply voltage
Figure 3. Supply current vs. input common
mode voltage
1.0
1.0
0.9
Vicm=Vout=Vcc/2
T=85°C
0.8
0.7
Supply Current (µA)
Supply Current (µA)
0.8
0.9
0.6
0.5
0.4
T=25°C
0.3
T=-40°C
0.2
0.6
0.5
T=25°C
0.4
T=-40°C
0.3
0.2
0.1
0.1
0.0
1.5
2.0
2.5
3.0
3.5
4.0
Supply voltage (V)
4.5
5.0
0.0
5.5
Figure 4. Supply current in saturation mode
0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3
Input common mode voltage (V)
50
0.9
Temperature
85°C/65°C/45°C/25°C/-5°C/-40°C
0.8
Vio distribution at T=25°C
Vcc=3.3V, Vicm=1.65V
45
40
0.7
35
Population %
0.6
0.5
0.4
0.3
Vcc=3.3V
Follower configuration
0.2
30
25
20
15
10
0.1
5
3275
3300
3250
Input voltage (mV)
3200
3225
3150
3175
3100
3125
150
175
100
125
50
75
25
0.0
0
Vcc=3.3V, Vout=Vcc/2
Figure 5. Input offset voltage distribution
1.0
Icc (μA)
T=85°C
0.7
0
-3
-2
-1
0
1
2
3
Input offset voltage (mV)
1.0
5
0.9
4
0.8
3
0.7
0.6
T=25°C
Vcc=3.3V
0.5
0.4
0.3
T=85°C
0.2
0.1
0.0
T=-40°C
0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3
Common mode voltage (V)
Input offset voltage (mV)
Input offset voltage (mV)
Figure 6. Input offset voltage vs. common mode Figure 7. Input offset voltage vs. temperature at
voltage
3.3 V supply voltage
Limit for TSU10x
2
1
0
-1
-2
Vcc=3.3V, Vicm=1.65V
-3
-4
-5
-60
DocID024317 Rev 2
-40
-20
0
20
40
Temperature (°C)
60
80
100
11/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Figure 8. Input offset voltage temperature
coefficient distribution
Figure 9. Input bias current vs. temperature at
mid VICM
20
30
Δ Vio/ΔT distribution
15
between T=-40°C and 85°C
for Vcc=3.3V, Vicm=1.65V
Input bias current (pA)
25
Population %
20
15
10
Vcc=3.3V
10
Vcc=5V
5
0
-5
Vcc=1.8V
Vicm=Vcc/2
-10
5
-15
0
-5
-4
-3
-2
-1
0
1
2
3
4
-20
-40
5
Δ Vio/Δ T (µV/°C)
-20
0
20
40
Temperature (°C)
60
80
20
20
15
15
10
Vicm=0V
Input bias current (pA)
Input bias current (pA)
Figure 10. Input bias current vs. temperature at Figure 11. Input bias current vs. temperature at
low VICM
high VICM
Vcc=1.8V
5
0
-5
Vcc=3.3V
-10
-15
-20
-40
0
20
40
Temperature (°C)
60
-10
-20
0
20
40
Temperature (°C)
60
80
Source
Vid=0.2V
2.4
T=25°C
T=85°C
0.6
Sink
Vid=-0.2V
T=25°C
2.1
Vcc=3.3V
Vicm=0.1V
1.8
T=85°C
1.5
1.2
0.9
Sink
Vid=-0.2V
0.6
0.3
T=-40°C
0.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Output Current (mA)
12/33
Vcc=1.8V
Vicm=Vcc
2.7
Output Voltage (V)
Output Voltage (V)
Vcc=1.8V
Vicm=0.1V
0.8
0.2
-5
3.0
Source
Vid=0.2V
1.2
0.4
0
3.3
1.6
1.0
5
Figure 13. Output characteristics at 3.3 V
supply voltage
1.8
1.4
10
-20
-40
80
Figure 12. Output characteristics at 1.8 V
supply voltage
Vcc=3.3V
-15
Vcc=5V
-20
Vcc=5V
0.0
T=-40°C
0
DocID024317 Rev 2
1
2
3
4
5
6
7
Output Current (mA)
8
9
10
TSU101, TSU102, TSU104
Electrical characteristics
Figure 15. Output voltage vs. input voltage
close to the rails
1
2
3
4
5
6
7
Output Current (mA)
8
9
10
Input voltage (mV)
Figure 16. Output saturation with a sine wave
on input
Figure 17. Desaturation time
3
3.300
3.275
2
3.200
Follower configuration, T=25°C
Vcc=3.3V, Vin from rail to 300mV from rail
3.175
3.150
Vrl=Vrail, f=10Hz, Rl=10MΩ , Cl=16pF
0.125
0.100
0.075
Signal Amplitude (V)
Vout
3.225
Signal Amplitude (V)
Gain=+11, 100kΩ /1MΩ , Vin=3Vpp, T=25°C
Vin
3.250
Vout
0.050
0.025
0.000
-5
0
-1
Vcc=3.3V, Vicm=Vrl=1.65V
Rl=10MΩ , Cl=16pF
Vin
0
5
-3
10 15 20 25 30 35 40 45 50 55 60
Time (ms)
Slew Rate (V/ms)
1
Follower configuration, T=25°C
Vcc=3.3V, Vicm=Vrl=1.65V
Rl=10MΩ , Cl=16pF
0
-1
-2
25
50
75
100
Time (ms)
125
0
1
2
3
Time (ms)
4
5
Figure 19. Slew rate vs. supply voltage
2
Signal Amplitude (V)
1
-2
Figure 18. Phase reversal free
0
3275
3300
0
Vcc=3.3V
Follower configuration
3250
0
0.5
0.0
T=-40°C
Sink
Vid=-0.2V
1.0
3200
3225
1.5
175
150
125
100
75
50
25
0
3150
3175
T=85°C
2.0
3125
Vcc=5V
Vicm=0.1V
2.5
3100
3.0
150
175
Output voltage (mV)
Output Voltage (V)
T=25°C
3.5
Temperature
85°C/65°C/45°C/25°C/-5°C/-40°C
125
Source
Vid=0.2V
4.0
3300
3275
3250
3225
3200
3175
3150
3125
3100
75
100
4.5
50
5.0
25
Figure 14. Output characteristics at 5 V supply
voltage
150
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-3.5
-4.0
1.5
DocID024317 Rev 2
T=-40°C
Vicm=Vrl=Vcc/2
Rl=1MΩ , Cl=60pF
Vin from 0.5V to Vcc-0.5V
SR calculated from 10% to 90%
T=25°C
T=85°C
2.0
2.5
3.0
3.5
4.0
Vcc (V)
4.5
5.0
5.5
13/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Figure 20. Output swing vs. input signal
frequency
Figure 21. Triangulation of a sine wave
4.0
3
Follower configuration, Vin=3Vpp, F=1kHz
3.5
2
Signal Amplitude (V)
Output swing (V)
3.0
2.5
2.0
Follower configuration
Vcc=3.3V, Vin=3.3Vpp
Vicm=Vrl=1.65V
Rl=10MΩ , Cl=16pF
T=25°C
1.5
1.0
0.0
10
100
1000
Frequency (Hz)
Follower configuration, T=25°C
1
0
-1
Vcc=3.3V
Vicm=Vrl=1.65V
Rl=10MΩ , Cl=16pF
-2
1
2
3
4
5
6
Time (ms)
7
8
9
10
Figure 24. Overshoot vs. capacitive load at
3.3 V supply voltage
Vcc=3.3V, Vicm=Vrl=1.65V
Follower configuration
50mVpp step
Rl=10MΩ , T=25°C
Phase margin (deg)
Overshoot (%)
20
18
15
13
10
8
5
3
0
14/33
0
50
100
150
Capacitive load (pF)
200
0
1
2
Time (ms)
3
4
35
30
25
20
15
10
5
0
-5
-10
-15
-20
-25
-30
-35
0.0
Follower configuration, T=25°C
Vcc=3.3V
Vicm=Vrl=1.65V
Rl=10MΩ , Cl=16pF
0.1
0.2
0.3
0.4 0.5 0.6
Time (ms)
0.7
0.8
0.9
1.0
Figure 25. Phase margin vs. capacitive load at
3.3 V supply voltage
30
23
Vcc=3.3V, Vicm=Vrl=1.65V
Rl=10MΩ , Cl=16pF, T=25°C
Figure 23. Small signal response at 3.3 V supply
voltage
Signal Amplitude (mV)
Signal Amplitude (V)
2
25
-1
-3
10000
Figure 22. Large signal response at 3.3 V
supply voltage
28
0
-2
0.5
0
1
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
Vcc=3.3V, Vicm=Vrl=1.65V
Gain 101 : Rg=10kΩ , Rf=1MΩ
Rl=10MΩ
T=25°C
0
DocID024317 Rev 2
50
100
150
Capacitive load (pF)
200
250
TSU101, TSU102, TSU104
Electrical characteristics
Figure 26. Bode diagram for different feedback Figure 27. Bode diagram at 1.8 V supply voltage
values
20
45
Feedback : 1MΩ
Vcc=3.3V, Vicm=1.65V, T=25°C
Gain=1
Rl=10MΩ , Cl=16pF, Vrl=Vcc/2
Gain (dB)
5
Feedback : 1MΩ //47pF
-10
60
30
0
-30
Phase
T=25°C
-15
-15
-20
-45
1000
-60
-90
Vcc=1.8V, Vicm=0.9V
G=101 (10kΩ /1MΩ )
Rl=10MΩ , Cl=60pF, Vrl=Vcc/2
-30
100
0
T=85°C
Feedback : 100kΩ
10
120
90
0
-5
T=-40°C
15
Gain (dB)
10
150
Gain
30
Phase (°)
15
180
10000
10
100
Frequency (Hz)
-120
-150
-180
1000
10000
Frequency (Hz)
Figure 28. Bode diagram at 3.3 V supply voltage Figure 29. Bode diagram at 5 V supply voltage
45
180
Gain
30
180
150
T=-40°C
150
Gain
30
120
T=-40°C
90
90
15
0
T=85°C
-30
Phase
T=25°C
-15
-60
Gain (dB)
0
Phase (°)
Gain (dB)
15
60
30
60
30
0
Vcc=3.3V, Vicm=1.65V
G=101 (10kΩ /1MΩ )
Rl=10MΩ , Cl=60pF, Vrl=Vcc/2
-45
10
100
-30
Phase
T=25°C
-15
-60
-90
Vcc=5V, Vicm=2.5V
G=101 (10kΩ /1MΩ )
Rl=10MΩ , Cl=60pF, Vrl=Vcc/2
-30
-120
-150
-120
-150
-45
-180
1000
0
T=85°C
-90
-30
120
Phase (°)
45
-180
10
10000
100
1000
10000
Frequency (Hz)
Frequency (Hz)
Figure 30. Gain bandwidth product vs. input
common mode voltage
Figure 31. Gain vs. input common mode voltage
10
100
9
8
6
Riso (kΩ)
GBP (kHz)
7
Vcc=3.3V, Vicm=Vrl
Gain 101 : Rg=10kΩ , Rf=1MΩ
Rl=10MΩ , Cl=60pF
T=25°C
Measured at 20dB
5
4
3
Recommended resistor to
place between the output
of the op-amp and the
capacitive load
Vcc=3.3V, Vicm=1.65V
Follower configuration
2
1
0
0.0
0.5
1.0
1.5
2.0
Vicm (V)
2.5
3.0
10
-2
10
DocID024317 Rev 2
10
-1
0
1
10
10
Capacitive load (nF)
10
2
3
10
15/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Figure 32. Noise at 1.8 V supply voltage in
follower configuration
Figure 33. Noise at 3.3 V supply voltage in
follower configuration
10000
Output voltage noise density (nV/VHz)
Vcc=1.8V
Follower configuration
T=25°C
1000
100
10
10
Vicm=0.9V
Vicm=1.5V
100
1000
Frequency (Hz)
10000
Output voltage noise density (nV/VHz)
10000
Vcc=3.3V
Follower configuration
T=25°C
1000
100
Noise Amplitude (uV)
Output voltage noise density (nV/VHz)
Vicm=2.5V
Vicm=4.7V
100
1000
Frequency (Hz)
10000
0
-5
-10
-20
100000
Vcc=3V, Vicm=1.65V
Bandpass filter : 0.1Hz to 10Hz
T=25°C
140
120
120
100
80
60
0
10
Vcc=5V
Vicm=2.5V
Vin=2Vpp
T=25°C
0
1k
10k
2
3
4
5
6
Time (s)
7
8
9
10
Ch1 - Ch2
Ch1 - Ch3
Ch1 - Ch4
100
80
60
40
20
100
1
Figure 37. Channel separation on TSU104
140
Channel separation (dB)
Channel separation (dB)
5
-15
20
100000
10
1000
40
10000
15
Vcc=5V
Follower configuration
T=25°C
10
10
1000
Frequency (Hz)
20
Figure 36. Channel separation on TSU102
0
10
Frequency (Hz)
16/33
100
Figure 35. Noise amplitude on 0.1 to 10 Hz
frequency range
10000
100
Vicm=3V
10
10
100000
Figure 34. Noise at 5 V supply voltage in
follower configuration
Vicm=1.65V
Vcc=5V
Vicm=2.5V
Vin=2Vpp
T=25°C
100
Frequency (Hz)
DocID024317 Rev 2
1k
10k
TSU101, TSU102, TSU104
Application information
4
Application information
4.1
Operating voltages
The TSU101, TSU102, and TSU104 series of amplifiers can operate from 1.5 V to 5.5 V.
Their parameters are fully specified at 1.8 V, 3.3 V, and 5 V supply voltages and are very
stable in the full VCC range. Additionally, main specifications are guaranteed on the
industrial temperature range from -40 to +85 ° C.
4.2
Rail-to-rail input
The TSU101, TSU102, and TSU104 series is built with two complementary PMOS and
NMOS input differential pairs. Thus, these devices have a rail-to-rail input, and the input
common mode range is extended from VCC- - 0.1 V to VCC+ + 0.1 V.
The devices have been designed to prevent phase reversal behavior.
4.3
Input offset voltage drift over temperature
The maximum input voltage drift over the temperature variation is defined as the offset
variation related to the offset value measured at 25 °C. The operational amplifier is one of
the main circuits of the signal conditioning chain, and the amplifier input offset is a major
contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated
during production at application level. The maximum input voltage drift over temperature
enables the system designer to anticipate the effects of temperature variations.
The maximum input voltage drift over temperature is computed in Equation 1.
Equation 1
ΔV io
V io ( T ) – V io ( 25° C )
------------ = max -------------------------------------------------ΔT
T – 25° C
with T = -40 °C and 85 °C.
The datasheet maximum value is guaranteed by measurements on a representative sample
size ensuring a Cpk (process capability index) greater than 2.
DocID024317 Rev 2
17/33
33
Application information
4.4
TSU101, TSU102, TSU104
Long term input offset voltage drift
To evaluate product reliability, two types of stress acceleration are used:
•
Voltage acceleration, by changing the applied voltage
•
Temperature acceleration, by changing the die temperature (below the maximum
junction temperature allowed by the technology) with the ambient temperature.
The voltage acceleration has been defined based on JEDEC results, and is defined using
Equation 2.
Equation 2
A FV = e
β ⋅ ( VS – VU )
Where:
AFV is the voltage acceleration factor
β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1)
VS is the stress voltage used for the accelerated test
VU is the voltage used for the application
The temperature acceleration is driven by the Arrhenius model, and is defined in Equation 3.
Equation 3
A FT = e
Ea ⎛ 1
1
------ ⋅ ------ – ------⎞
⎝ T U T S⎠
k
Where:
AFT is the temperature acceleration factor
Ea is the activation energy of the technology based on the failure rate
k is the Boltzmann constant (8.6173 x 10-5 eVk-1)
TU is the temperature of the die when VU is used (° K)
TS is the temperature of the die under temperature stress (° K)
The final acceleration factor, AF, is the multiplication of the voltage acceleration factor and
the temperature acceleration factor (Equation 4).
Equation 4
A F = A FT × A FV
AF is calculated using the temperature and voltage defined in the mission profile of the
product. The AF value can then be used in Equation 5 to calculate the number of months of
use equivalent to 1000 hours of reliable stress duration.
18/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Application information
Equation 5
Months = A F × 1000 h × 12 months ⁄ ( 24 h × 365.25 days )
To evaluate the op-amp reliability, a follower stress condition is used where VCC is defined
as a function of the maximum operating voltage and the absolute maximum rating (as
recommended by JEDEC rules).
The Vio drift (in µV) of the product after 1000 h of stress is tracked with parameters at
different measurement conditions (see Equation 6).
Equation 6
V CC = maxV op with V icm = V CC ⁄ 2
The long term drift parameter (ΔVio), estimating the reliability performance of the product, is
obtained using the ratio of the Vio (input offset voltage value) drift over the square root of the
calculated number of months (Equation 7).
Equation 7
V io drift
ΔV io = -----------------------------( months )
where Vio drift is the measured drift value in the specified test conditions after 1000 h stress
duration.
4.5
Schematic optimization aiming for nanopower
To benefit from the full performance of the TSU10 series, the impedances must be
maximized so that current consumption is not lost where it is not required.
For example, an aluminum electrolytic capacitance can have significantly high leakage. This
leakage may be greater than the current consumption of the op-amp. For this reason,
ceramic type capacitors are preferred.
For the same reason, big resistor values should be used in the feedback loop. However,
there are three main limitations to be considered when choosing a resistor.
1.
When the TSU10x series is used with a sensor: the resistance connected between the
sensor and the input must remain much higher than the impedance of the sensor itself.
2.
Noise generated: a100 kΩ resistor generates 40
even more noise.
3.
Leakage on the PCB: leakage can be generated by moisture. This can be improved by
using a specific coating process on the PCB.
DocID024317 Rev 2
nV
-----------Hz
, a bigger resistor value generates
19/33
33
Application information
4.6
TSU101, TSU102, TSU104
PCB layout considerations
For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible
to the power supply pins.
Minimizing the leakage from sensitive high impedance nodes on the inputs of the TSU10x
series can be performed with a guarding technique. The technique consists of surrounding
high impedance tracks by a low impedance track (the ring). The ring is at the same electrical
potential as the high impedance node.
Therefore, even if some parasitic impedance exists between the tracks, no leakage current
can flow through them as they are at the same potential (see Figure 38).
Figure 38. Guarding on the PCB
20/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
4.7
Application information
Using the TSU10x series with sensors
The TSU10x series has MOS inputs, thus input bias currents can be guaranteed down to
5 pA maximum at ambient temperature. This is an important parameter when the
operational amplifier is used in combination with high impedance sensors.
The TSU101, TSU102, and TSU104 series is perfectly suited for trans-impedance
configuration as shown in Figure 39. This configuration allows a current to be converted into
a voltage value with a gain set by the user. It is an ideal choice for portable electrochemical
gas sensing or photo/UV sensing applications. The TSU10x series, using trans-impedance
configuration, is able to provide a voltage value based on the physical parameter sensed by
the sensor.
Electrochemical gas sensors
The output current of electrochemical gas sensors is generally in the range of tens of nA to
hundreds of μA. As the input bias current of the TSU101, TSU102, and TSU104 is very low
(see Figure 9, Figure 10, and Figure 11) compared to these current values, the TSU10x
series is well adapted for use with the electrochemical sensors of two or three electrodes.
Figure 40 shows a potentiostat (electronic hardware required to control a three electrode
cell) schematic using the TSU101, TSU102, and TSU104. In such a configuration, the
devices minimize leakage in the reference electrode compared to the current being
measured on the working electrode.
Figure 39. Trans-impedance amplifier schematic
5
,
768
6HQVRU
HOHFWURFKHPLFDO
SKRWRGLRGH89
9UHI 5,
9UHI
DocID024317 Rev 2
*$06&%
21/33
33
Application information
TSU101, TSU102, TSU104
Figure 40. Potentiostat schematic using the TSU101 (or TSU102)
768
768
9UHI
9UHI
4.8
*$06&%
Fast desaturation
When the TSU101, TSU102, and TSU104 operational amplifiers go into saturation mode,
they take a short period of time to recover, typically thirty microseconds. When recovering
after saturation, the TSU10x series does not exhibit any voltage peaks that could generate
issues (such as false alarms) in the application (see Figure 17). This is because the internal
gain of the amplifier decreases smoothly when the output signal gets close to the VCC+ or
VCC- supply rails (see Figure 15 and Figure 16).
Thus, to maintain signal integrity, the user should take care that the output signal stays at
100 mV from the supply rails.
With a trans-impedance schematic, a voltage reference can be used to keep the signal
away from the supply rails.
4.9
Using the TSU10x series in comparator mode
The TSU10x series can be used as a comparator. In this case, the output stage of the
device always operates in saturation mode. In addition, Figure 4 shows the current
consumption is not bigger and even decreases smoothly close to the rails. The TSU101,
TSU102, and TSU104 are obviously operational amplifiers and are therefore optimized to
be used in linear mode. We recommend to use the TS88 series of nanopower comparators
if the primary function is to perform a signal comparison only.
22/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
4.10
Application information
ESD structure of TSU10x series
The TSU101, TSU102, and TSU104 are protected against electrostatic discharge (ESD)
with dedicated diodes (see Figure 41). These diodes must be considered at application level
especially when signals applied on the input pins go beyond the power supply rails (VCC+ or
VCC-).
Figure 41. ESD structure
768
*$06&%
Current through the diodes must be limited to a maximum of 10 mA as stated in Table 1. A
serial resistor or a Schottky diode can be used on the inputs to improve protection but the
10 mA limit of input current must be strictly observed.
DocID024317 Rev 2
23/33
33
Package information
5
TSU101, TSU102, TSU104
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
24/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
5.1
Package information
SC70-5 (or SOT323-5) package mechanical data
Figure 42. SC70-5 (or SOT323-5) package mechanical drawing
SIDE VIEW
DIMENSIONS IN MM
GAUGE PLANE
COPLANAR LEADS
SEATING PLANE
TOP VIEW
Table 6. SC70-5 (or SOT323-5) package mechanical data
Dimensions
Ref
Millimeters
Min
A
Typ
0.80
A1
Inches
Max
Min
1.10
0.315
Typ
0.043
0.10
A2
0.80
b
0.90
Max
0.004
1.00
0.315
0.035
0.15
0.30
0.006
0.012
c
0.10
0.22
0.004
0.009
D
1.80
2.00
2.20
0.071
0.079
0.087
E
1.80
2.10
2.40
0.071
0.083
0.094
E1
1.15
1.25
1.35
0.045
0.049
0.053
e
0.65
0.025
e1
1.30
0.051
L
0.26
<
0°
0.36
0.46
0.010
8°
0°
DocID024317 Rev 2
0.014
0.039
0.018
8°
25/33
33
Package information
5.2
TSU101, TSU102, TSU104
SOT23-5 package mechanical data
Figure 43. SOT23-5 package mechanical drawing
Table 7. SOT23-5 package mechanical data
Dimensions
Ref
A
Millimeters
Min
Typ
Max
Min
Typ
Max
0.90
1.20
1.45
0.035
0.047
0.057
A1
26/33
Inches
0.15
0.006
A2
0.90
1.05
1.30
0.035
0.041
0.051
B
0.35
0.40
0.50
0.013
0.015
0.019
C
0.09
0.15
0.20
0.003
0.006
0.008
D
2.80
2.90
3.00
0.110
0.114
0.118
D1
1.90
0.075
e
0.95
0.037
E
2.60
2.80
3.00
0.102
0.110
0.118
F
1.50
1.60
1.75
0.059
0.063
0.069
L
0.10
0.35
0.60
0.004
0.013
0.023
K
0°
10 °
0°
DocID024317 Rev 2
10 °
TSU101, TSU102, TSU104
DFN8 2x2 package information
Figure 44. DFN8 2x2 package mechanical drawing
'
$
%
& [
(
3,1,1'(;$5($
& [
7239,(:
$
&
$
&
6($7,1*
3/$1(
6,'(9,(:
&
H
ESOFV
3,1,1'(;$5($
& $ %
3LQ,'
/
5.3
Package information
%277209,(:
*$06&%
Table 8. DFN8 2x2 package mechanical data
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.70
0.75
0.80
0.028
0.030
0.031
A1
0.00
0.02
0.05
0.000
0.001
0.002
b
0.15
0.20
0.25
0.006
0.008
0.010
D
2.00
0.079
E
2.00
0.079
e
0.50
0.020
L
0.045
0.55
0.65
N
0.018
0.022
0.026
8
DocID024317 Rev 2
27/33
33
Package information
5.4
TSU101, TSU102, TSU104
MiniSO8 package information
Figure 45. MiniSO8 package mechanical drawing
Table 9.
MiniSO8 package mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
Max.
Min.
Typ.
1.1
A1
0
A2
0.75
b
Max.
0.043
0.15
0
0.95
0.030
0.22
0.40
0.009
0.016
c
0.08
0.23
0.003
0.009
D
2.80
3.00
3.20
0.11
0.118
0.126
E
4.65
4.90
5.15
0.183
0.193
0.203
E1
2.80
3.00
3.10
0.11
0.118
0.122
e
L
0.85
0.65
0.40
0.60
0.006
0.033
0.80
0.016
0.024
0.95
0.037
L2
0.25
0.010
ccc
0°
0.037
0.026
L1
k
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Inches
8°
0.10
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0°
0.031
8°
0.004
TSU101, TSU102, TSU104
5.5
Package information
QFN16 package information
Figure 46. QFN16 package mechanical drawing
Table 10.
QFN16 package mechanical data
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
0.80
0.90
1.00
0.032
0.035
0.039
A1
0.02
0.05
0.001
0.002
A3
0.2
A
b
0.18
D
D2
0.30
0.007
3.00
1.00
E
E2
0.23
0.008
1.15
1.15
1.25
0.039
0.045
1.25
0.039
0.045
0.5
0.02
K
0.2
0.008
0.30
r
0.09
0.40
0.049
0.118
e
L
0.012
0.118
3.00
1.00
0.009
0.50
0.012
0.016
0.049
0.020
0.006
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Package information
TSU101, TSU102, TSU104
Figure 47. QFN16 3x3 footprint recommendation
Table 11.
Footprint data
Ref
Millimeters
Inches
4.00
0.158
C
0.50
0.020
D
0.30
0.012
E
1.00
0.039
F
0.70
0.028
G
0.66
0.026
A
B
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5.6
Package information
TSSOP14 package information
Figure 48. TSSOP14 package mechanical drawing
Table 12.
TSSOP14 package mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
Inches
Max.
Min.
Typ.
1.20
A1
0.05
A2
0.80
b
Max.
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0089
D
4.90
5.00
5.10
0.193
0.197
0.201
E
6.20
6.40
6.60
0.244
0.252
0.260
E1
4.30
4.40
4.50
0.169
0.173
0.176
e
L
0.65
0.45
L1
k
aaa
1.00
0.60
0.0256
0.75
0.018
1.00
0°
0.024
0.030
0.039
8°
0.10
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8°
0.004
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Ordering information
6
TSU101, TSU102, TSU104
Ordering information
Table 13. Order codes
Order code
Temperature range
Packing
Marking
TSU101ICT
SC70-5
K22
TSU101ILT
SOT23-5
K160
SC70-5
K24
TSU101RICT
TSU101RILT
TSU102IQ2T
-40 ° C to +85 ° C
TSU102IST
TSU104IQ4T
TSU104IPT
7
Package
SOT23-5
DFN8 2x2
Tape and reel
K169
K24
MiniSO8
K160
QFN16 3x3
K160
TSSOP14
TSU104I
Revision history
Table 14. Document revision history
Date
Revision
16-Apr-2013
1
Initial release
2
Added the TSU102 and TSU104 devices and updated
the datasheet accordingly.
Added the silhouettes, pin connections, and package
information for DFN8 2x2, MiniSO8, QFN16 3x3, and
TSSOP14.
Added Figure 36 and Figure 37.
02-Jul-2013
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Changes
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TSU101, TSU102, TSU104
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