STMICROELECTRONICS TSV621ILT

TSV621
Rail-to-rail input/output 29 µA 420 kHz CMOS operational amplifiers
Features
■
Low supply voltage: 1.5 V–5.5 V
■
Rail-to-rail input and output
■
Low input offset voltage: 800 µV max (A
version)
■
Low power consumption: 29 µA typ
■
Gain bandwidth product: 420 kHz typ
■
Unity gain stability
■
Micropackages: SC70-5, SOT23-5
■
Low input bias current: 1 pA typ
■
Extended temperature range: -40 to +125° C
■
4 kV HBM
Applications
■
Battery-powered applications
■
Portable devices
■
Signal conditioning
■
Active filtering
■
Medical instrumentation
5 VCC
In+ 1
VDD 2
In- 3
+
_
4 Out
TSV621ICT/ILT
SC70-5/SOT23-5
This operational amplifier is unity gain stable for
capacitive loads up to 100 pF.
The device is internally adjusted to provide very
narrow dispersion of AC and DC parameters,
especially power consumption, product gain
bandwidth and slew rate.
The TSV621 presents a high tolerance to ESD,
sustaining 4 kV for the human body model.
Additionally, the TSV621 is offered in SC70-5 and
SOT23-5 micropackages, with extended
temperature ranges from -40° C to +125° C.
All these features make the TSV621 ideal for
sensor interfaces, battery-supplied and portable
applications, as well as active filtering.
Description
The TSV621 is a single operational amplifier
offering low voltage, low power operation and railto-rail input and output.
With a very low input bias current and low offset
voltage (800 µV maximum for the A version), the
TSV621 is ideal for applications that require
precision. The device can operate at a power
supply ranging from 1.5 to 5.5 V, and therefore
suits battery-powered devices and extends
battery life.
This product features an excellent speed/power
consumption ratio, offering a 420 kHz gain
bandwidth while consuming only 29 µA at a 5-V
supply voltage.
January 2009
Rev 1
1/18
www.st.com
18
Absolute maximum ratings and operating conditions
1
TSV621
Absolute maximum ratings and operating conditions
Table 1.
Absolute maximum ratings (AMR)
Symbol
VCC
Vid
Vin
Iin
Tstg
Parameter
(1)
Supply voltage
Differential input voltage
(2)
Tj
6
V
±VCC
V
Input voltage
VDD-0.2 to VCC+0.2
V
Input current
(4)
10
mA
-65 to +150
°C
SC70-5
205
°C/W
SOT23-5
250
Storage temperature
(5)(6)
Maximum junction temperature
HBM: human body
ESD
Unit
(3)
Thermal resistance junction to ambient
Rthja
Value
MM: machine
model(7)
model(8)
CDM: charged device
model(9)
Latch-up immunity
150
°C
4
kV
300
V
1.5
kV
200
mA
1. All voltage values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
3. Vcc-Vin must not exceed 6 V.
4. Input current must be limited by a resistor in series with the inputs.
5. Short-circuits can cause excessive heating and destructive dissipation.
6. Rth are typical values.
7. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for
all couples of pin combinations with other pins floating.
8. Machine mode: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin
combinations with other pins floating.
9. Charged device model: all pins plus package are charged together to the specified voltage and then
discharged directly to the ground.
Table 2.
Operating conditions
Symbol
2/18
Parameter
VCC
Supply voltage
Vicm
Common mode input voltage range
Toper
Operating free air temperature range
Value
Unit
1.5 to 5.5
V
VDD -0.1 to VCC +0.1
V
-40 to +125
°C
TSV621
Electrical characteristics
2
Electrical characteristics
Table 3.
Electrical characteristics at VCC = +1.8 V with VDD = 0 V, Vicm = VCC/2, Tamb = 25° C,
and RL connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
Vio
DVio
Offset voltage
Input offset current
(Vout = VCC/2)
Iib
Input bias current
(Vout = VCC/2)
Common mode rejection ratio
20 log (ΔVic/ΔVio)
Avd
Large signal voltage gain
VOH
High level output voltage
VOL
Low level output voltage
Tmin < Top < Tmax
TSV621
TSV621A
6
2.8
mV
Iout
Isource
Supply current (per operator)
μV/°C
2
(1)
1
10
1
100
1
10(1)
1
100
pA
Tmin < Top < Tmax
pA
Tmin < Top < Tmax
0 V to 1.8 V, Vout = 0.9 V
53
Tmin < Top < Tmax
51
RL= 10 kΩ, Vout= 0.5 V to 1.3 V
78
Tmin < Top < Tmax
73
RL = 10 kΩ
35
Tmin < Top < Tmax
50
74
dB
95
dB
5
mV
RL = 10 kΩ
4
35
mV
Tmin < Top < Tmax
Isink
ICC
4
0.8
Input offset voltage drift
Iio
CMR
TSV621
TSV621A
50
Vo = 1.8 V
6
Tmin < Top < Tmax
4
Vo = 0 V
6
Tmin < Top < Tmax
4
12
mA
10
mA
No load, Vout = VCC/2
25
Tmin < Top < Tmax
31
µA
33
AC performance
Gain bandwidth product
RL = 10 kΩ, CL = 100 pF,
f = 100 kHz
Fu
Unity gain frequency
φm
GBP
275
340
kHz
RL = 10 kΩ, CL = 100 pF
280
kHz
Phase margin
RL = 10 kΩ, CL = 100 pF
45
Degrees
Gm
Gain margin
RL = 10 kΩ, CL = 100 pF
9
dB
SR
Slew rate
RL = 10 kΩ, CL = 100 pF, Av = 1
0.084
0.11
0.14
V/μs
1. Guaranteed by design.
3/18
Electrical characteristics
Table 4.
TSV621
VCC = +3.3 V, VDD = 0 V, Vicm = VCC/2, Tamb = 25° C, RL connected to VCC/2
(unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Unit
DC performance
TSV621
TSV621A
Vio
DVio
Offset voltage
CMR
6
2.8
μV/°C
2
Input offset current
1
10(1)
pA
1
100
pA
1
10(1)
pA
1
100
pA
Tmin < Top < Tmax
Input bias current
Tmin < Top < Tmax
Common mode rejection ratio
20 log (ΔVic/ΔVio)
Avd
Large signal voltage gain
VOH
High level output voltage
VOL
Low level output voltage
0 V to 3.3 V, Vout = 1.75 V
57
Tmin < Top < Tmax
53
RL=10 kΩ, Vout = 0.5 V to 2.8 V
81
Tmin < Top < Tmax
76
RL = 10 kΩ
35
Tmin < Top < Tmax
50
79
Iout
Isource
Supply current (per operator)
dB
dB
98
dB
dB
5
mV
RL = 10 kΩ
4
35
mV
Tmin < Top < Tmax
Isink
ICC
mV
Tmin < Top < Tmax
TSV621
TSV621A
Input offset voltage drift
Iio
Iib
4
0.8
50
Vo = 5 V
30
Tmin < Top < Tmax
25
Vo = 0 V
30
Tmin < Top < Tmax
25
45
mA
38
mA
No load, Vout = 2.5 V
26
Tmin < Top < Tmax
33
µA
35
µA
AC performance
Gain bandwidth product
RL = 10 kΩ, CL = 100 pF,
f = 100 kHz
Fu
Unity gain frequency
φm
380
kHz
RL = 10 kΩ, CL = 100 pF
310
kHz
Phase margin
RL = 10 kΩ, CL = 100 pF
45
Degrees
Gm
Gain margin
RL = 10 kΩ, CL = 100 pF
9
dB
SR
Slew rate
RL = 10 kΩ, CL = 100 pF, AV = 1
0.12
V/μs
GBP
1. Guaranteed by design.
4/18
310
0.094
TSV621
Table 5.
Electrical characteristics
VCC = +5 V, VDD = 0 V, Vicm = VCC/2, Tamb = 25° C, RL connected to VCC/2
(unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Unit
DC performance
Vio
DVio
Offset voltage
Input offset current
Iib
Input bias current
SVR
Tmin < Top < Tmax
TSV621
TSV621A
6
2.8
mV
Tmin < Top < Tmax
0 V to 5 V, Vout = 2.5 V
60
Tmin < Top < Tmax
55
Supply voltage rejection ratio 20 VCC = 1.8 to 5 V
log (ΔVCC/ΔVio)
Tmin < Top < Tmax
75
Common mode rejection ratio
20 log (ΔVic/ΔVio)
Large signal voltage gain
VOH
High level output voltage
VOL
Low level output voltage
1
10(1)
pA
1
100
pA
1
10(1)
pA
1
100
pA
80
dB
102
dB
98
dB
73
RL=10 kΩ, Vout = 0.5 V to 4.5 V
85
Tmin < Top < Tmax
80
RL = 10 kΩ
35
Tmin < Top < Tmax
50
7
mV
RL = 10 kΩ
6
Iout
Isource
Supply current (per operator)
35
mV
Tmin < Top < Tmax
Isink
μV/°C
2
Tmin < Top < Tmax
Avd
ICC
4
0.8
Input offset voltage drift
Iio
CMR
TSV621
TSV621A
50
Vo = 5 V
40
69
Tmin < Top < Tmax
35
65
Vo = 0 V
40
74
Tmin < Top < Tmax
35
68
mA
mA
No load, Vout = 2.5 V
29
Tmin < Top < Tmax
36
µA
38
µA
AC performance
Gain bandwidth product
RL = 10 kΩ, CL = 100 pF,
f = 100 kHz
Fu
Unity gain frequency
φm
GBP
350
420
kHz
RL = 10 kΩ, CL = 100 pF
360
kHz
Phase margin
RL = 10 kΩ, CL = 100 pF
45
Degrees
Gm
Gain margin
RL = 10 kΩ, CL = 100 pF
9
dB
SR
Slew rate
RL = 10 kΩ, CL = 100 pF, AV = 1
0.14
V/μs
0.108
5/18
Electrical characteristics
Table 5.
Symbol
en
THD
VCC = +5 V, VDD = 0 V, Vicm = VCC/2, Tamb = 25° C, RL connected to VCC/2
(unless otherwise specified) (continued)
Parameter
Min.
Equivalent input noise voltage
f = 1 kHz
Total harmonic distortion
Av = 1, f = 1 kHz, RL= 100 kΩ,
Vicm = Vcc/2, Vout = 2 Vpp
1. Guaranteed by design.
6/18
TSV621
Typ.
Max.
Unit
70
nV
-----------Hz
0.004
%
TSV621
Figure 1.
Electrical characteristics
Input offset voltage vs input
common mode at VCC = 1.5 V
Figure 2.
Input offset voltage vs input
common mode at VCC = 5 V
0.5
0.4
0.3
Input Offset Voltage (mV)
0.2
0.1
0.0
-0.1
-0.2
0.2
0.0
-0.2
-0.3
-0.4
-0.4
-0.5
-0.2
0.0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
Input Common Mode Voltage (V)
0.0
1.6
Figure 3.
Supply current vs. supply voltage
at Vicm = VCC/2
Figure 5.
Output current vs. output voltage at Figure 6.
VCC = 5 V
Gain (dB)
Figure 4.
1.0
2.0
3.0
4.0
Input Common Mode Voltage (V)
5.0
Output current vs. output voltage at
VCC = 1.5 V
Voltage gain and phase vs.
frequency at Vcc = 1.5 V
Phase (°)
Input Offset Voltage (mV)
0.4
7/18
Electrical characteristics
Figure 7.
TSV621
Voltage gain and phase vs.
frequency at VCC = 5 V
Figure 8.
Phase margin vs. output current at
VCC = 1.5 V and VCC = 5 V
90
80
Vcc=5V
70
Phase (°)
Gain (dB)
60
Vcc=1.5V
50
40
30
20
Vicm=Vcc/2, Cl=100pF
Rl=4.7kohms, T=25 C
10
0
-1.5
Slew rate vs. supply voltage
-0.5
0.0
0.5
1.0
1.5
Figure 10. Slew rate vs. supply voltage
Slew rate (V/ s)
Figure 9.
-1.0
Supply voltage (V)
10µV/div
Figure 11. Distortion + noise vs. output
voltage
Figure 12. Distortion + noise vs. frequency
1
Vcc=1.5V
Rl=10kΩ
THD + N (%)
THD + N (%)
Vcc=1.5V
Rl=10kohms
Vcc=1.5V
Rl=100kohms
f=1kHz
Gain=1
BW=22kHz
Vicm=Vcc/2
Vcc=1.5V
Rl=100kΩ
0.1
Vcc=5.5V
Rl=10kohms
Vcc=5.5V
Rl=100kohms
Ω
0.01
Ω
10
Output Voltage (Vpp)
8/18
100
1000
10000
TSV621
Electrical characteristics
Input equivalent noise density (nV/VHz)
Figure 13. Noise vs. frequency
Vicm=4.5V
Vicm=2.5V
Vcc=5V
T=25 C
Frequency (Hz)
9/18
Application information
TSV621
3
Application information
3.1
Operating voltages
The TSV621 can operate from 1.5 to 5.5 V. Its parameters are fully specified for 1.8-, 3.3and 5-V power supplies. However, the parameters are very stable in the full VCC range and
several characterization curves show the TSV621 characteristics at 1.5 V. Additionally, the
main specifications are guaranteed in extended temperature ranges from -40° C to +125° C.
3.2
Rail-to-rail input
The TSV621 is built with two complementary PMOS and NMOS input differential pairs. The
device has a rail-to-rail input, and the input common mode range is extended from
VDD -0.1 V to VCC +0.1 V. The transition between the two pairs appear at VCC -0.7 V. In the
transition region, the performance of CMRR, PSRR, Vio and THD is slightly degraded (as
shown in Figure 14 and Figure 15 for Vio vs. Vicm).
Figure 14. Input offset voltage vs input
common mode at VCC = 1.5 V
Figure 15. Input offset voltage vs input
common mode at VCC = 5 V
0.5
0.4
0.3
Input Offset Voltage (mV)
Input Offset Voltage (mV)
0.4
0.2
0.1
0.0
-0.1
-0.2
0.2
0.0
-0.2
-0.3
-0.4
-0.4
-0.5
-0.2
0.0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
Input Common Mode Voltage (V)
1.6
0.0
1.0
2.0
3.0
4.0
Input Common Mode Voltage (V)
5.0
The device is guaranteed without phase reversal.
3.3
Rail-to-rail output
The operational amplifier’s output level can go close to the rails: 35 mV maximum above and
below the rail when connected to a 10 kΩ resistive load to VCC/2.
10/18
TSV621
3.4
Application information
Optimization of DC and AC parameters
This device uses an innovative approach to reduce the spread of the main DC and AC
parameters. An internal adjustment achieves a very narrow spread of current consumption
(29 µA typical, min/max at ±17%). Parameters linked to the current consumption value, such
as GBP, SR and AVd benefit from this narrow dispersion. All parts present a similar speed
and the same behavior in terms of stability. In addition, the minimum values of GBP and SR
are guaranteed (GBP = 350 kHz min, SR = 0.15 V/µs min).
3.5
Driving resistive and capacitive loads
These products are micro-power, low-voltage operational amplifiers optimized to drive rather
large resistive loads, above 5 kΩ. For lower resistive loads, the THD level may significantly
increase.
In a follower configuration, these operational amplifiers can drive capacitive loads up to
100 pF with no oscillations. When driving larger capacitive loads, adding a small in-series
resistor at the output can improve the stability of the device (see Figure 16 for
recommended in-series resistor values). Once the in-series resistor value has been
selected, the stability of the circuit should be tested on bench and simulated with the
simulation model.
In-series resistor (Ω)
Figure 16. In-series resistor vs. capacitive load
3.6
PCB layouts
For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible
to the power supply pins.
11/18
Application information
3.7
TSV621
Macromodel
An accurate macromodel of TSV621 is available on STMicroelectronics’ web site at
www.st.com. This model is a trade-off between accuracy and complexity (that is, time
simulation) of the TSV62x operational amplifiers. It emulates the nominal performances of a
typical device within the specified operating conditions mentioned in the datasheet. It helps
to validate a design approach and to select the right operational amplifier, but it does not
replace on-board measurements.
12/18
TSV621
4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
13/18
Package information
4.1
TSV621
SOT23-5 package mechanical data
Figure 17. SOT23-5L package mechanical drawing
Table 6.
SOT23-5L package mechanical data
Dimensions
Ref.
A
Millimeters
Min.
Typ.
Max.
Min.
Typ.
Max.
0.90
1.20
1.45
0.035
0.047
0.057
A1
14/18
Inches
0.15
0.006
A2
0.90
1.05
1.30
0.035
0.041
0.051
B
0.35
0.40
0.50
0.013
0.015
0.019
C
0.09
0.15
0.20
0.003
0.006
0.008
D
2.80
2.90
3.00
0.110
0.114
0.118
D1
1.90
0.075
e
0.95
0.037
E
2.60
2.80
3.00
0.102
0.110
0.118
F
1.50
1.60
1.75
0.059
0.063
0.069
L
0.10
0.35
0.60
0.004
0.013
0.023
K
0°
10°
TSV621
4.2
Package information
SC70-5 (or SOT323-5) package mechanical data
Figure 18. SC70-5 (or SOT323-5) package mechanical drawing
SIDE VIEW
DIMENSIONS IN MM
GAUGE PLANE
COPLANAR LEADS
SEATING PLANE
TOP VIEW
Table 7.
SC70-5 (or SOT323-5) package mechanical data
Dimensions
Ref
Millimeters
Min
A
Typ
0.80
A1
Inches
Max
Min
1.10
0.315
Typ
0.043
0.10
A2
0.80
b
0.90
Max
0.004
1.00
0.315
0.035
0.15
0.30
0.006
0.012
c
0.10
0.22
0.004
0.009
D
1.80
2.00
2.20
0.071
0.079
0.087
E
1.80
2.10
2.40
0.071
0.083
0.094
E1
1.15
1.25
1.35
0.045
0.049
0.053
e
0.65
0.025
e1
1.30
0.051
L
0.26
<
0°
0.36
0.46
0.010
0.014
0.039
0.018
8°
15/18
Ordering information
5
TSV621
Ordering information
Table 8.
Order codes
Temperature
range
Package
Packing
Marking
TSV621ILT
-40°C to +125°C
SOT23-5
Tape & reel
K106
TSV621ICT
-40°C to +125°C
SC70-5
Tape & reel
K16
Part number
16/18
TSV621
6
Revision history
Revision history
Table 9.
Document revision history
Date
Revision
12-Jan-2009
1
Changes
Initial release.
17/18
TSV621
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