STMICROELECTRONICS TSV524A

TSV521, TSV522, TSV524,
TSV521A, TSV522A, TSV524A
High merit factor (1.15 MHz for 45 µA) CMOS op amps
Datasheet −preliminary data
Features
■
Gain bandwidth product: 1.15 MHz typ. at 5 V
■
Low power consumption: 45 µA typ. at 5 V
■
Rail-to-rail input and output
■
Low input bias current: 1 pA typ.
■
Supply voltage: 2.7 to 5.5 V
■
Low offset voltage: 800 µV max.
■
Unity gain stable on 100 pF capacitor
■
Automotive grade
SC70-5
DFN8 2 x 2
MiniSO8
Benefits
■
Increased lifetime in battery powered
applications
■
Easy interfacing with high impedance sensors
Related products
■
See TSV6x series for lower minimum supply
voltage (1.5 V)
■
See LMV82x series for higher gain bandwidth
products (5.5 MHz)
Battery powered applications
■
Portable devices
■
Automotive signal conditioning
■
Active filtering
■
Medical instrumentation
These features make the TSV52x family ideal for
sensor interfaces, battery supplied and portable
applications. The wide temperature range and
high ESD tolerance facilitate their use in harsh
automotive applications.
Description
The TSV52x series of operational amplifiers
offers low voltage operation and rail-to-rail input
and output. The TSV521 device is the single
version, the TSV522 device the dual version, and
the TSV524 device the quad version, with pinouts
compatible with industry standards.
June 2012
TSSOP14
The TSV52x series offers an outstanding
speed/power consumption ratio, 1.15 MHz gain
bandwidth product while consuming only 45 µA at
5 V. The devices are housed in the smallest
industrial packages.
Applications
■
QFN16 3 x 3
Table 1.
Device summary
Standard Vio
Enhanced Vio
Single
TSV521
TSV521A
Dual
TSV522
TSV522A
Quad
TSV524
TSV524A
Doc ID 022743 Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/27
www.st.com
27
Contents
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Contents
1
Package pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1
Operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.2
Common mode voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.3
Rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.4
Rail-to-rail output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.5
Driving resistive and capacitive loads . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.6
Input offset voltage drift over temperature . . . . . . . . . . . . . . . . . . . . . . . . 15
4.7
Long term input offset voltage drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.8
PCB layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.9
Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2/27
Doc ID 022743 Rev 1
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Package pin connections
Figure 1.
Pin connections for each package (top view)
IN+
1
VCC-
2
IN-
3
5
VCC+
4
OUT
TSV521
SC70-5
OUT1
1
IN1-
2
8
VCC+
OUT1
1
8
VCC+
7
OUT2
IN1-
2
7
OUT2
NC
IN1+
3
6
IN2-
IN1+
3
6
IN2IN2
VCC-
4
5
IN2+
VCC
VCC-
4
5
IN2+
IN2
TSV522
MiniSO8
IN1+
1
VCC
VCC+
2
IN1-
OUT1
OUT4
IN4-
TSV522
DFN8
16
15
14
13
12
IN4+
11
VCC
VCC-
NC
NC
IN2+
4
9
IN3+
5
6
7
8
IN3-
10
OUT3
3
OUT2
NC
IN2-
1
Package pin connections
TSV524
QFN16
TSV524
TSSOP14
Doc ID 022743 Rev 1
3/27
Absolute maximum ratings and operating conditions
2
TSV521, TSV522, TSV524, TSV521A,
Absolute maximum ratings and operating conditions
Table 2.
Absolute maximum ratings (AMR)
Symbol
VCC
Vid
Vin
Iin
Tstg
Parameter
(1)
Supply voltage
(2)
Differential input voltage
Value
Unit
6
V
±VCC
V
(3)
VCC- - 0.2 to VCC++ 0.2
V
(4)
10
mA
-65 to +150
°C
Input voltage
Input current
Storage temperature
(5) (6)
Rthja
Tj
Thermal resistance junction-to-ambient ,
SC70-5
DFN8 2 x 2
QFN16 3 x 3
MiniSO8
TSSOP14
205
57
45
190
100
Maximum junction temperature
150
°C
4
kV
300
V
CDM: charged device model
(all packages except SC70-5 and DFN8)
1.5
kV
CDM: charged device model (SC70-5 and DFN8)(9)
1.3
kV
Latch-up immunity
200
mA
HBM: human body
MM: machine
ESD
model(7)
model(8)
°C/W
(9)
1. All voltage values, except differential voltages are with respect to network ground terminal.
2. Differential voltages are the non inverting input terminal with respect to the inverting input terminal.
3. VCC - Vin must not exceed 6 V, Vin must not exceed 6 V.
4. Input current must be limited by a resistor in series with the inputs.
5. Short-circuits can cause excessive heating and destructive dissipation.
6. Rth are typical values.
7. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for
all couples of pin combinations with other pins floating.
8. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two
pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin
combinations with other pins floating.
9. Charged device model: all pins plus package are charged together to the specified voltage and then
discharged directly to ground.
Table 3.
Operating conditions
Symbol
4/27
Parameter
VCC
Supply voltage
Vicm
Common mode input voltage range
Toper
Operating free air temperature range
Doc ID 022743 Rev 1
Value
Unit
2.7 to 5.5
V
VCC- - 0.1 to VCC+ + 0.1
V
-40 to +125
°C
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Electrical characteristics
3
Electrical characteristics
Table 4.
Electrical characteristics at VCC+ = +2.7 V with VCC- = 0 V, Vicm = VCC/2, T = 25 °C, and
RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
TSV52xA, T = 25 °C
800
µV
TSV52xA, -40 °C < T < 125 °C
2600
µV
TSV52x, T = 25 °C
1.5
mV
TSV52x, -40 °C < T < 125 °C
3.3
mV
3
18
µV/°C
DC performance
Vio
ΔVio/ΔT
Iio
Iib
CMR
Offset voltage
°C(1)
Input offset voltage drift
-40 °C < T < 125
Input offset current
(Vout = VCC/2)
T = 25 °C
1
10(3)
pA
-40° C < T < 125 °C
1
100(3)
pA
1
10(3)
pA
Input bias current
(Vout = VCC/2)
T = 25 °C
Common mode rejection
ratio 20 log (ΔVic/ΔVio)
Vic = -0.1 V to VCC+0.1V,
Vout = VCC/2, RL = 1 MΩ
T = 25 °C
50
-40 °C < T < 125 °C
46
T = 25 °C
90
-40 °C < T < 125 °C
60
-40 °C < T < 125 °C
1
100
(3)
pA
72
dB
105
Avd
Large signal voltage gain
Vout = 0.5 V to (VCC - 0.5V),
RL = 1 MΩ
VOH
High level output voltage
T = 25 °C
-40 °C < T < 125 °C
3
35
50
mV
VOL
Low level output voltage
T = 25 °C
-40 °C < T < 125 °C
6
35
50
mV
Isink
Iout
Isource
ICC
dB
Vout = VCC, T = 25 °C
12
Vout = VCC, -40 °C < T < 125 °C
8
Vout = 0 V, T = 25 °C
12
Vout = 0 V, -40 °C < T < 125 °C
8
22
mA
18
mA
Supply current (per channel) T = 25 °C
Vout = VCC/2, RL > 1 MΩ
-40 °C < T < 125 °C
30
51
30
51
µA
AC performance
GBP
Gain bandwidth product
RL = 10 kΩ, CL = 100 pF
Fu
Unity gain frequency
Φm
1
MHz
RL = 10 kΩ, CL = 100 pF
900
kHz
Phase margin
RL = 10 kΩ, CL = 100 pF
55
degrees
Gm
Gain margin
RL = 10 kΩ, CL = 100 pF
7
dB
SR
Slew rate
RL = 10 kΩ, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5 V
0.74
V/µs
Doc ID 022743 Rev 1
0.62
5/27
Electrical characteristics
Table 4.
Electrical characteristics at VCC+ = +2.7 V with VCC- = 0 V, Vicm = VCC/2, T = 25 °C, and
RL = 10 kΩ connected to VCC/2 (unless otherwise specified) (continued)
Symbol
en
THD+N
Table 5.
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Parameter
Conditions
Equivalent input noise
voltage
f = 1 kHz
f = 10 kHz
Total harmonic distortion +
noise
Follower configuration, fin = 1 kHz,
RL = 100 kΩ, Vicm = VCC/2,
BW = 22 kHz, Vout = 1 Vpp
Min.
Typ.
Max.
Unit
61
43
nV
-----------Hz
0.003
%
Electrical characteristics at VCC+ = +3.3 V with VCC- = 0 V, Vicm = VCC/2, T = 25 °C, and
RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
TSV52xA, T = 25 °C
600
µV
TSV52xA, -40 °C < T < 125 °C
2400
µV
TSV52x, T = 25 °C
1.3
mV
TSV52x, -40 °C < T < 125 °C
3.1
mV
18
µV/°C
DC performance
Vio
ΔVio/ΔT
ΔVio
Iio
Offset voltage
Input offset voltage drift
-40 °C < T < 125 °C(1)
Long term input offset
voltage drift
T = 25 °C(2)
Input offset current
(Vout = VCC/2)
T = 25 °C
3
μV
---------------------------
0.3
1
-40 °C < T < 125 °C
month
10(3)
(3)
1
100
1
10(3)
pA
pA
Input bias current
(Vout = VCC/2)
T = 25 °C
Common mode rejection
ratio 20 log (ΔVic/ΔVio)
Vic = -0.1 V to VCC +0.1 V,
Vout = VCC/2, RL = 1 MΩ
T = 25 °C
51
-40 °C < T < 125 °C
47
T = 25 °C
Large signal voltage gain
Vout = 0.5 V to (VCC - 0.5 V),
-40 °C < T < 125 °C
RL = 1 MΩ
91
Avd
VOH
High level output voltage
T = 25 °C
-40 °C < T < 125 °C
3
35
50
mV
VOL
Low level output voltage
T = 25 °C
-40 °C < T < 125 °C
7
35
50
mV
Iib
CMR
Isink
Iout
Isource
ICC
6/27
-40 °C < T < 125 °C
1
100
(3)
pA
pA
73
dB
dB
63
Vout = VCC, T = 25 °C
20
Vout = VCC, -40 °C < T < 125 °C
17
Vout = 0 V, T = 25 °C
19
Vout = 0 V, -40 °C < T < 125 °C
17
Supply current (per channel) T = 25 °C
Vout = VCC/2, RL > 1 MΩ
-40 °C < T < 125 °C
Doc ID 022743 Rev 1
106
31
mA
27
mA
32
55
32
55
µA
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Table 5.
Electrical characteristics
Electrical characteristics at VCC+ = +3.3 V with VCC- = 0 V, Vicm = VCC/2, T = 25 °C, and
RL = 10 kΩ connected to VCC/2 (unless otherwise specified) (continued)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
0.64
1
MHz
AC performance
GBP
Gain bandwidth product
RL = 10 kΩ, CL = 100 pF
Fu
Unity gain frequency
RL = 10 kΩ, CL = 100 pF
900
kHz
Φm
Phase margin
RL = 10 kΩ, CL = 100 pF
55
degrees
Gm
Gain margin
RL = 10 kΩ, CL = 100 pF
7
dB
SR
Slew rate
RL = 10 kΩ, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5 V
0.75
V/μs
en
Equivalent input noise
voltage
f = 1 kHz
f = 10 kHz
60
42
nV
-----------Hz
Total harmonic distortion +
noise
Follower configuration, fin = 1 kHz,
RL = 100 kΩ, Vicm = VCC/2,
BW = 22 kHz, Vout = 1 Vpp
0.003
%
THD+N
Table 6.
Electrical characteristics at VCC+ = +5 V with VCC- = 0 V, Vicm = VCC/2, T = 25 °C,
and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
TSV52xA, T = 25 °C
600
µV
TSV52xA, -40 °C < T < 125 °C
2400
µV
1
mV
2.8
mV
18
µV/°C
DC performance
Vio
Offset voltage
TSV52x, T = 25 °C
TSV52x, -40 °C < T < 125 °C
ΔVio/ΔT
ΔVio
Input offset voltage drift
-40 °C < T < 125
Long term input offset
voltage drift
T = 25 °C(2)
Iio
Input offset current
(Vout = VCC/2)
Iib
Input bias current
(Vout = VCC/2)
CMR1
CMR2
°C(1)
3
μV
---------------------------
0.7
month
1
10(3)
pA
-40 °C < T < 125 °C
1
100(3)
pA
T = 25 °C
1
10(3)
pA
1
100(3)
pA
T = 25 °C
-40 °C < T < 125 °C
Common mode rejection
ratio 20 log (ΔVic/ΔVio)
Vic = -0.1 V to VCC +0.1 V,
Vout = VCC/2, RL = 1 MΩ
T = 25 °C
54
-40 °C < T < 125 °C
50
Common mode rejection
ratio 20 log (ΔVic/ΔVio)
Vic = 1 V to VCC -1 V,
Vout = VCC/2, RL = 1 MΩ
T = 25 °C
63
-40 °C < T < 125 °C
58
76
dB
84
dB
Doc ID 022743 Rev 1
7/27
Electrical characteristics
Table 6.
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Electrical characteristics at VCC+ = +5 V with VCC- = 0 V, Vicm = VCC/2, T = 25 °C,
and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Min.
Typ.
T = 25 °C
65
87
-40 °C < T < 125 °C
60
T = 25 °C
Large signal voltage gain
Vout = 0.5 V to (VCC - 0.5 V),
-40 °C < T < 125 °C
RL = 1 MΩ
94
Avd
VOH
High level output voltage
T = 25 °C
-40 °C < T < 125 °C
5
35
50
mV
VOL
Low level output voltage
T = 25 °C
-40 °C < T < 125 °C
9
35
50
mV
SVR
Parameter
Supply voltage rejection
ratio 20 log (ΔVCC/ΔVio)
VCC = 2.7 V to 5.5 V,
Vout = VCC/2
Isink
Iout
Isource
ICC
Conditions
Max.
Unit
dB
109
dB
68
Vout = VCC, T = 25 °C
36
Vout = VCC, -40 °C < T < 125 °C
27
Vout = 0 V, T = 25 °C
36
Vout = 0 V, -40 °C < T < 125 °C
27
55
mA
55
mA
Supply current (per channel) T = 25 °C
Vout = VCC/2, RL > 1 MΩ
-40 °C < T < 125 °C
45
60
45
60
µA
AC performance
GBP
Gain bandwidth product
RL = 10 kΩ, CL = 100 pF
Fu
Unity gain frequency
Φm
1.15
MHz
RL = 10 kΩ, CL = 100 pF
900
kHz
Phase margin
RL = 10 kΩ, CL = 100 pF
55
degrees
Gm
Gain margin
RL = 10 kΩ, CL = 100 pF
7
dB
SR
Slew rate
RL = 10 kΩ, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5V
0.89
V/μs
∫ en
Low-frequency peak-topeak input noise
Bandwidth: f = 0.1 to 10 Hz
14
µVpp
Equivalent input noise
voltage
f = 1 kHz
f = 10 kHz
57
39
nV
-----------Hz
Total harmonic distortion +
noise
Follower configuration, fin = 1 kHz,
RL = 100 kΩ, Vicm = VCC/2,
BW = 22 kHz, Vout = 1 Vpp
0.002
%
en
THD+N
0.73
1. See Section 4.6: Input offset voltage drift over temperature on page 15.
2. Typical value is based on the Vio drift observed after 1000 h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
3. Guaranteed by design.
8/27
Doc ID 022743 Rev 1
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Figure 2.
Supply current vs. supply voltage
at Vicm = VCC/2
Electrical characteristics
Figure 3.
Input offset voltage distribution at
VCC = 5 V, Vicm = 2.5 V
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Figure 4.
Input offset voltage temperature
coefficient distribution
Figure 5.
Input offset voltage vs. input
common mode voltage at VCC = 5 V
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Input offset voltage vs. temperature Figure 7.
at VCC = 5 V
Output current vs. output voltage at
VCC = 2.7 V
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Doc ID 022743 Rev 1
6##6
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9/27
Electrical characteristics
Output current vs. output voltage at Figure 9.
VCC = 5.5 V
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Figure 10. Bode diagram at VCC = 2.7 V,
RL = 2 k Ω
!-
Figure 11. Bode diagram at VCC = 5.5 V,
RL = 10 kΩ
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Figure 12. Bode diagram at VCC = 5.5 V,
R L = 2 kΩ
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10/27
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Figure 13. Noise vs. frequency
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RL = 10 kΩ
0HASE Figure 8.
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Doc ID 022743 Rev 1
!-
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Figure 14. Positive slew rate vs. supply
voltage
Electrical characteristics
Figure 15. Negative slew rate vs. supply
voltage
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Figure 16. THD+N vs. frequency at VCC = 2.7 V Figure 17. THD+N vs. frequency at VCC = 5.5 V
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Figure 19. THD+N vs. output voltage at
VCC = 5.5 V
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Figure 18. THD+N vs. output voltage at
VCC = 2.7 V
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Doc ID 022743 Rev 1
!-
11/27
Electrical characteristics
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Figure 20. Output impedance versus frequency in closed-loop configuration
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Figure 21. Response to a 100 mV input step
for gain = 1 at VCC = 5.5 V rising
edge
Figure 22. Response to a 100 mV input step
for gain = 1 at VCC = 5.5 V falling
edge
VCC = 5.5 V, Vicm = 2.75 V
RL = 10 kΩ, CL = 100 pF
0.5 µs/div., 20 mV/div.
VCC = 5.5 V, Vicm = 2.75 V
RL = 10 kΩ, CL = 100 pF
0.5 µs/div., 20 mV/div.
Figure 23. PSRR vs. frequency at VCC = 2.7 V
Figure 24. PSRR vs. frequency at VCC = 5.5 V
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12/27
Doc ID 022743 Rev 1
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TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
4
Application information
4.1
Operating voltages
Application information
The amplifiers of the TSV52x series can operate from 2.7 to 5.5 V. Their parameters are
fully specified for 2.7, 3.3 and 5 V power supplies. However, the parameters are very stable
in the full VCC range and several characterization curves show the TSV52x device
characteristics at 2.7 V. Additionally, the main specifications are guaranteed in extended
temperature ranges from -40 to +125 °C.
4.2
Common mode voltage range
The TSV52x devices are built with two complementary PMOS and NMOS input differential
pairs. The devices have a rail-to-rail input and the input common mode range is extended
from VCC- - 0.1 V to VCC+ + 0.1 V.
The N channel pair is active for input voltage close to the positive rail typically (VCC+ - 0.7 V)
to 100 mv above the positive rail.
The P channel pair is active for input voltage close to the negative rail typically 100 mV
below the negative rail to VCC- + 0.7 V.
And between VCC- + 0.7 V and VCC+ - 0.7 V the both N and P pairs are active.
When the both pairs work together it allows to increase the speed of the TSV52x device.
This architecture improves a lot the merit factor of the whole device. In the transition region,
the performance of CMR, SVR, Vio (Figure 25 and Figure 26) and THD is slightly degraded.
Figure 25. Input offset voltage vs. input
common mode at VCC = 2.7 V
Figure 26. Input offset voltage vs. input
common mode at VCC = 5.5 V
6IOM6
6IOM6
6ICM6
6ICM6
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Application information
4.3
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Rail-to-rail input
The TSV52x series are guaranteed without phase reversal as shown in Figure 28.
It is extremely important that the current flowing in the input pin does not exceed 10 mA.
In order to limit this current a serial resistor can be added on the Vin path.
Figure 27. Phase reversal test schematic
Figure 28. No phase reversal
6
?
6##
6OUT
6##
6OUT6
6INP
6
6##6
6INN6
6INP6
!-
4.4
!-
Rail-to-rail output
The operational amplifiers output levels can go close to the rails: 35 mV maximum above
and below the rail when connected to a 10 kΩ resistive load to VCC/2.
4.5
Driving resistive and capacitive loads
To drive high capacitive load, adding in series resistor at the output can improve the stability
of the device (see Figure 29 for recommended in series value). Once the in series resistor
has been selected, the stability of the circuit should be tested on bench and simulated with
simulation models. The Rload is placed in parallel with capacitive load. The Rload and the
in series resistor create a voltage divider introducing an error proportional to the ratio
Rs/Rload. By choosing R s as low as possible, this error is generally negligible.
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Application information
Figure 29. In series resistor versus capacitive load
3TABLE
5NSTABLE
6##66ICM64 #2 LOAD
-INIMUMSERIALRESISTORTOBEADDEDTOAGIVEN
CAPACITIVELOADINORDERTOENSURESTABILITY
#APACITIVELOADN&
!-
4.6
Input offset voltage drift over temperature
The maximum input voltage drift over temperature variation is defined as the offset variation
related to offset value measured at 25 °C. The operational amplifier is one of the main
circuits of the signal conditioning chain, and the amplifier input offset is a major contributor
to the chain accuracy. The signal chain accuracy at 25 °C can be compensated during
production at application level. The maximum input voltage drift over temperature enables
the system designer to anticipate the effects of temperature variations.
The maximum input voltage drift over temperature is computed in Equation 1:
Equation 1
ΔV io
V io ( T ) – V io ( 25° C )
------------ = max -------------------------------------------------ΔT
T – 25° C
with T = -40 °C and 125 °C.
The datasheet maximum value is guaranteed by measurement on a representative sample
size ensuring a Cpk greater than 2.
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Application information
4.7
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Long term input offset voltage drift
In a product reliability evaluation, two types of stress acceleration are usable:
●
Voltage acceleration, by changing the applied voltage
●
Temperature acceleration, by changing the die temperature (below the maximum
junction temperature allowed by the technology) with the ambient temperature
The voltage acceleration has been defined based on JEDEC results, and is defined by:
Equation 2
A FV = e
β ⋅ ( V S – VU )
where:
AFV is the voltage acceleration factor
ß
is the voltage acceleration constant in 1/V, constant technology parameter
VS is the stress voltage used for the accelerated test
VU is the use voltage for the application
The temperature acceleration is driven by the Arrhenius model, and is defined by:
Equation 3
A FT = e
E
1 – ----1-⎞
-----a- ⋅ ⎛ -----⎝ T U T S⎠
k
where:
AFT is the temperature acceleration factor
Ea is the activation energy of the technology based on failure rate
k
is the Boltzmann’s constant
TU is the temperature of the die when VU is used
TS is the temperature of the die under temperature stress
The final acceleration factor, AF, is the multiplication of these two acceleration factors, which
is:
Equation 4
AF = AFT x AFV
Based on this AF, calculated following the defined usage temperature and usage voltage of
the product, the 1000 h duration of the stress corresponds to a number of equivalent months
of usage.
Equation 5
Months = AF x 1000 h x 12 months / (24h x 365.25 days)
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Application information
For the operational amplifier, a follower stress condition is used for the reliability evaluation,
with VCC defined in function of the Maximum operating voltage and the absolute maximum
rating (as recommended by the JEDEC standards).
The Vio drift, in µV, of the product after 1000 h duration of stress is tracked with parameters
at different measurement conditions, as for example:
Equation 6
VCC = max. Vop with Vicm=VCC/2
Finally, knowing the calculated number of months and with the measured drift value of the
Vio (corresponding to the electrical characteristics of the respective table) after 1000 h
duration of stress, the ratio of the Vio drift over the square of months, ΔVio in µV/√month, is
defined as the long term drift parameter, the parameter estimating the reliability
performance of the product.
Equation 7
ΔVio = Vio drift / √(months)
4.8
PCB layouts
For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible
to the power supply pins.
4.9
Macromodel
Accurate macromodels of the TSV52x device are available on STMicroelectronics™ website
at www.st.com. This model is a trade-off between accuracy and complexity (that is, time
simulation) of the TSV52x operational amplifiers. It emulates the nominal performance of
a typical device within the specified operating conditions mentioned in the datasheet. It also
helps to validate a design approach and to select the appropriate operational amplifier, but it
does not replace onboard measurements.
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Package information
5
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
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Package information
Figure 30. SC70-5 package outline
SIDE VIEW
DIMENSIONS IN MM
GAUGE PLANE
COPLANAR LEADS
SEATING PLANE
TOP VIEW
Table 7.
SC70-5 package mechanical data
Dimensions
Ref
Millimeters
Min.
Typ.
Inches
Max.
Min.
0.032
A
0.80
1.10
A1
0
0.10
A2
0.80
b
0.90
Typ.
Max.
0.043
0.004
1.00
0.032
0.035
0.15
0.30
0.006
0.012
c
0.10
0.22
0.004
0.009
D
1.80
2.00
2.20
0.071
0.079
0.087
E
1.80
2.10
2.40
0.071
0.083
0.094
E1
1.15
1.25
1.35
0.045
0.049
0.053
e
0.65
0.025
e1
1.30
0.051
L
0.26
<
0°
0.36
0.46
0.010
0.014
0.039
0.018
8°
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Package information
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Figure 31. DFN8 2 x 2 x 0.6, 8 pitch, 0.5 mm package outline
Table 8.
DFN8 2 x 2 x 0.6, 8 pitch, 0.5 mm package mechanical data
Dimensions
Ref.
A
Millimeters
Min.
Typ.
Max.
Min.
Typ.
Max.
0.51
0.55
0.60
0.020
0.022
0.024
A1
0.05
A3
0.002
0.15
0.006
b
0.18
0.25
0.30
0.007
0.010
0.012
D
1.85
2.00
2.15
0.073
0.079
0.085
D2
1.45
1.60
1.70
0.057
0.063
0.067
E
1.85
2.00
2.15
0.073
0.079
0.085
E2
0.75
0.90
1.00
0.030
0.035
0.039
e
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Inches
0.50
0.020
L
0.50
0.020
ddd
0.08
0.003
Doc ID 022743 Rev 1
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Package information
Figure 32. DFN8 2 x 2 0.6, 8 pitch, 0.5 mm footprint recommendation
Doc ID 022743 Rev 1
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Package information
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Figure 33. MiniSO8 package outline
-INI3/,
Table 9.
MiniSO8 package mechanical data
Dimensions
Symbol
Millimeters
Min.
Typ.
A
Max.
Min.
Typ.
1.10
A1
0
A2
0.75
b
Max.
0.043
0.15
0
0.95
0.030
0.22
0.40
0.009
0.016
c
0.08
0.23
0.003
0.009
D
2.80
3.00
3.20
0.11
0.118
0.126
E
4.65
4.90
5.15
0.183
0.193
0.203
E1
2.80
3.00
3.10
0.11
0.118
0.122
e
L
0.85
0.65
0.40
0.60
0.006
0.033
0.80
0.016
0.024
0.95
0.037
L2
0.25
0.010
ccc
0°
0.037
0.026
L1
k
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Inches
8°
0.10
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0°
0.031
8°
0.004
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
Package information
Figure 34. QFN16 - 3 x 3 x 0.9 mm, pad 1.7 - package outline
6&10.,
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Package information
Table 10.
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
QFN16 - 3 x 3 x 0.9 mm, pad 1.7 - package mechanical data
Dimensions
Symbol
A
Millimeters
Nom.
Min.
Max.
Nom.
Min.
Max.
0.90
0.80
1.00
0.035
0.032
0.039
0.00
0.05
0.000
0.002
0.007
0.012
0.114
0.122
0.061
0.071
0.114
0.122
0.061
0.071
0.012
0.020
A1
A3
0.20
b
D
3.00
D2
E
3.00
E2
e
L
Inches
0.008
0.18
0.30
2.90
3.10
1.50
1.80
2.90
3.10
1.50
1.80
0.50
0.118
0.118
0.020
0.30
0.50
Figure 35. QFN16 - 3 x 3 x 0.9 mm, pad 1.7 - footprint recommendation
1&.&0
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Package information
Figure 36. TSSOP14 body 4.40 mm, lead pitch 0.65 mm - package outline
433/0
Table 11.
TSSOP14 body 4.40 mm, lead pitch 0.65 mm - package mechanical data
Dimensions
Symbol
Millimeters
Min.
Typ.
A
Inches
Max.
Min.
Typ.
1.20
A1
0.05
A2
0.80
b
Max.
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0089
D
4.90
5.00
5.10
0.193
0.197
0.201
E
6.20
6.40
6.60
0.244
0.252
0.260
E1
4.30
4.40
4.50
0.169
0.173
0.176
e
L
0.65
0.45
L1
k
aaa
1.00
0.60
0.0256 BSC
0.75
1.00
0°
8°
0°
0.10
0.018
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8°
0.024
0.030
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Ordering information
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
6
Ordering information
Table 12.
Order codes
Order code
Temperature range
Package
TSV521ICT
TSV522IQ2T
TSV522IST
-40 to 125 °C
TSV524IPT
TSV522IYST
TSV524IYPT
TSV522AIQ2T
-40 to 125 °C
TSV524AIPT
TSV524AIYPT
K1G
Tape and reel
K1G
QFN16 3 x 3
K1G
TSSOP14
TSV524
K1H
TSSOP14
TSV524Y
SC70-5
K1K
DFN8 2 x 2
K1K
MiniSO8
TSV524AIQ4T
TSV522AIYST
DFN8 2 x 2
Tape and reel
TSV521AICT
TSV522AIST
K1G
MiniSO8
-40 to 125 °C
Automotive grade(1)
Marking
SC70-5
MiniSO8
TSV524IQ4T
Packing
Tape and reel
QFN16 3 x 3
K1K
TSSOP14
TSV524A
MiniSO8
-40 to 125 °C
Automotive grade(1)
K1K
K1L
Tape and reel
TSSOP14
TSV524AY
1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC
Q001 and Q 002 or equivalent are ongoing.
7
Revision history
Table 13.
Document revision history
Date
Revision
19-Jun-2012
1
26/27
Changes
Initial release.
Doc ID 022743 Rev 1
TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
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