INTEGRATED CIRCUITS DATA SHEET TZA3043; TZA3043B Gigabit Ethernet/Fibre Channel transimpedance amplifier Product specification Supersedes data of 1998 Jul 08 File under Integrated Circuits, IC19 2000 Mar 28 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B FEATURES APPLICATIONS • Wide dynamic range, typically 2.5 µA to 1.5 mA • Digital fibre optic receiver in medium and long haul optical telecommunications transmission systems or in high speed data networks • Low equivalent input noise, typically 5.7 pA/√Hz • Differential transimpedance of 8.3 kΩ • Wideband RF gain block. • Wide bandwidth from DC to 950 MHz • Differential outputs GENERAL DESCRIPTION • On-chip Automatic Gain Control (AGC) The TZA3043 is a high speed transimpedance amplifier with AGC designed to be used in Gigabit Ethernet/Fibre Channel optical links. It amplifies the current generated by a photo detector (PIN diode or avalanche photodiode) and converts it to a differential output voltage. • No external components required • Single supply voltage from 3.0 to 5.5 V • Bias voltage for PIN diode • Pin compatible with TZA3023 and SA5223 • Switched output polarity available (B-version). ORDERING INFORMATION TYPE NUMBER PACKAGE NAME TZA3043T SO8 TZA3043U − TZA3043BT SO8 TZA3043BU − 2000 Mar 28 DESCRIPTION plastic small outline package; 8 leads; body width 3.9 mm bare die in waffle pack carriers; die dimensions 1.030 × 1.300 mm plastic small outline package; 8 leads; body width 3.9 mm bare die in waffle pack carriers; die dimensions 1.030 × 1.300 mm 2 VERSION SOT96-1 − SOT96-1 − Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B BLOCK DIAGRAM AGC(1) handbook, full pagewidth (13) VCC 1 nF VCC 125 Ω DREF 1 (1) 125 Ω 8 (11, 12) GAIN CONTROL peak detector 10 pF IPhoto 3 (4) (10) 7 A1 A2 low noise amplifier TZA3043T TZA3043U (9) 6 OUTQ OUT single-ended to differential converter BIASING 2, 4, 5 (2, 3, 5, 6, 7, 8) MGU096 GND The numbers in brackets refer to the pad numbers of the bare die version. (1) AGC analog I/O (pad 13) is only available on the TZA3043U. Fig.1 Block diagram of TZA3043T and TZA3043U. AGC(1) handbook, full pagewidth (13) VCC 1 nF VCC 125 Ω DREF 1 (1) 125 Ω 8 (11, 12) GAIN CONTROL peak detector 10 pF IPhoto 3 (4) (9) 6 A1 A2 low noise amplifier TZA3043BT TZA3043BU (10) 7 single-ended to differential converter BIASING 2, 4, 5 (2, 3, 5, 6, 7, 8) MGU097 GND The numbers in brackets refer to the pad numbers of the bare die version. (1) AGC analog I/O (pad 13) is only available on the TZA3043BU. Fig.2 Block diagram of TZA3043BT and TZA3043BU. 2000 Mar 28 3 OUTQ OUT Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B PINNING PIN TZA3043T PIN TZA3043BT PAD TZA3043U PAD TZA3043BU DREF 1 1 1 1 analog output bias voltage for PIN diode; cathode should be connected to this pin GND 2 2 2, 3 2, 3 ground ground IPhoto 3 3 4 4 analog input current input; anode of PIN diode should be connected to this pin; DC bias level of 822 mV is one diode voltage above ground GND 4 4 5, 6 5, 6 ground ground GND 5 5 7, 8 7, 8 ground ground OUT 6 7 9 10 data output data output; pin OUT goes HIGH when current flows into pin IPhoto OUTQ 7 6 10 9 data output compliment of pin OUT VCC 8 8 11, 12 11, 12 supply supply voltage AGC − − 13 13 input/ output AGC analog I/O SYMBOL handbook, halfpage TYPE DESCRIPTION handbook, halfpage 8 VCC DREF 1 GND 2 7 OUTQ GND 2 TZA3043T IPhoto 3 GND 4 7 OUT 6 OUTQ 5 GND TZA3043BT 6 OUT IPhoto 3 5 GND GND 4 MGR287 MGU098 Fig.3 Pin configuration of TZA3043T. 2000 Mar 28 8 VCC DREF 1 Fig.4 Pin configuration of TZA3043BT. 4 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B FUNCTIONAL DESCRIPTION The AGC loop hold capacitor is integrated on-chip, so an external capacitor is not needed for AGC. The TZA3043 is a transimpedance amplifier intended for use in fibre optic links for signal recovery in Fibre Channel or Gigabit Ethernet applications. It amplifies the current generated by a photo detector (PIN diode or avalanche photodiode) and transforms it into a differential output voltage. The most important characteristics of the TZA3043 are high receiver sensitivity and wide dynamic range. High receiver sensitivity is achieved by minimizing noise in the transimpedance amplifier. AGC monitoring The AGC voltage can be monitored at pad 13 on the bare die (TZA3043U/TZA3043BU). Pad 13 is not bonded in the packaged device (TZA3043T/TZA3043BT). This pad can be left unconnected during normal operation. It can also be used to force an external AGC voltage. If pad 13 (AGC) is connected to GND, the internal AGC loop is disabled and the receiver gain is at a maximum. The maximum input current is then approximately 75 µA. Input circuit The signal current generated by a PIN diode can vary between 2.5 µA to 1.5 mA (p-p). Output circuit A differential amplifier converts the output of the preamplifier to a differential voltage (see Fig.5). An AGC loop is implemented to make it possible to handle such a wide dynamic range. The AGC loop increases the dynamic range of the receiver by reducing the feedback resistance of the preamplifier. handbook, full pagewidth The logic level symbol definitions for the differential outputs are shown in Fig.6. VCC 800 Ω 800 Ω 30 Ω OUTQ 30 Ω OUT 4.5 mA 4.5 mA 2 mA MGR290 Fig.5 Differential data output circuit. VCC handbook, full pagewidth VO(max) VOQH VOH Vo(p-p) VOQL VOL VOO VO(min) MGR243 Fig.6 Logic level symbol definitions for data outputs OUT and OUTQ. 2000 Mar 28 5 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B The reverse voltage across the PIN diode is 4.18 V (5 − 0.82 V) for 5 V supply or 2.48 V (3.3 − 0.82 V) for 3.3 V supply. PIN diode bias voltage DREF The transimpedance amplifier together with the PIN diode determines the performance of an optical receiver for a large extent. Especially how the PIN diode is connected to the input and the layout around the input pin influence the key parameters like sensitivity, the bandwidth and the Power Supply Rejection Ratio (PSRR) of a transimpedance amplifier. The total capacitance at the input pin is critical to obtain the highest sensitivity. It should be kept to a minimum by reducing the capacitance of the PIN diode and the parasitics around the input pin. The PIN diode should be placed very close to the IC to reduce the parasitics. Because the capacitance of the PIN diode depends on the reverse voltage across it, the reverse voltage should be chosen as high as possible. It is preferable to connect the cathode of the PIN diode to a higher voltage then VCC when such a voltage source is available on the board. In this case pin DREF can be left unconnected. When a negative supply voltage is available, the configuration in Fig.8 can be used. It should be noted that in this case the direction of the signal current is reversed compared to the Fig.7. Proper filtering of the bias voltage for the PIN diode is essential to achieve the highest sensitivity level. The PIN diode can be connected to the input in two ways as shown in Figs 7 and 8. In Fig.7 the PIN diode is connected between pins DREF and IPhoto. Pin DREF provides an easy bias voltage for the PIN diode. The voltage at DREF is derived from VCC by a low-pass filter. The low-pass filter consisting of the internal resistors R1, R2, C1 and the external capacitor C2 rejects the supply voltage noise. The external capacitor C2 should be equal or larger then 1 nF for a high PSRR. VCC R2 DREF 1 125 Ω C2 1 nF R1 125 Ω VCC 8 R2 DREF 1 125 Ω C1 10 pF Ii R1 125 Ω 8 C1 10 pF IPhoto 3 3 IPhoto Ii TZA3043 TZA3043 MGU103 MGU104 negative supply voltage Fig.7 Fig.8 The PIN diode connected between the input and pin DREF. 2000 Mar 28 6 The PIN diode connected between the input and a negative supply voltage. Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B AGC It is disabled for smaller signals. The transimpedance is then at its maximum value (8.3 kΩ differential). The TZA3043 transimpedance amplifier can handle input currents from 1 µA to 1.5 mA. This means a dynamic range of 63 dB. At low input currents, the transimpedance must be high to get enough output voltage, and the noise should be low enough to guaranty minimum bit error rate. At high input currents however, the transimpedance should be low to avoid pulse width distortion. This means that the gain of the amplifier has to vary depending on the input signal level to handle such a wide dynamic range. This is achieved in the TZA3043 by implementing an Automatic Gain Control (AGC) loop. The AGC loop consists of a peak detector, a hold capacitor and a gain control circuit. When AGC is active, the feedback resistor of the transimpedance amplifier is reduced to keep the output voltage constant. The transimpedance is regulated from 8.3 kΩ at low currents (I < 30 µA) to 1 kΩ at high currents (I < 500 µA). Above 500 µA the transimpedance is at its minimum and can not be reduced further but the front-end remains linear until input currents of 1.5 mA. The upper part of Fig.9 shows the output voltages of the TZA3043 (OUT and OUTQ) as a function of the DC input current. In the lower part, the difference of both voltages is shown. It can be seen from the figure that the output changes linearly up to 25 µA input current where AGC becomes active. From this point on, AGC tries to keep the differential output voltage constant around 200 mV for medium range input currents (input currents <200 µA). The AGC can not regulate any more above 500 µA input current and the output voltage rises again with the input current. The peak amplitude of the signal is detected by the peak detector and it is stored on the hold capacitor. The voltage over the hold capacitor is compared to a threshold level. The threshold level is set to 25 µA (p-p) input current. AGC becomes active only for input signals larger than the threshold level. MGU105 3.9 handbook, V full pagewidth o (V) VOUT 3.7 3.5 VCC = 5 V 3.3 VOUTQ 3.1 600 Vo(dif) (mV) (1) 400 (2) (3) 200 0 1 10 102 Vo(dif) = VOUT − VOUTQ. (1) VCC = 3 V. (2) VCC = 3.3 V. (3) VCC = 5 V. Fig.9 AGC characteristics. 2000 Mar 28 7 103 Ii (µA) 104 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER MAX. UNIT −0.5 +6 pin/pad IPhoto −0.5 +1 V pins/pads OUT and OUTQ −0.5 VCC + 0.5 V pad AGC (bare die only) −0.5 VCC + 0.5 V pin/pad DREF −0.5 VCC + 0.5 V pin/pad IPhoto −2.5 +2.5 mA pins/pads OUT and OUTQ −15 +15 mA pad AGC (bare die only) −0.2 +0.2 mA pin/pad DREF −2.5 +2.5 mA 300 mW VCC supply voltage Vn DC voltage In MIN. V DC current Ptot total power dissipation − Tstg storage temperature −65 +150 °C Tj junction temperature − 150 °C Tamb ambient temperature −40 +85 °C HANDLING Precautions should be taken to avoid damage through electrostatic discharge. This is particularly important during assembly and handling of the bare die. Additional safety can be obtained by bonding the VCC and GND pads first, the remaining pads may then be bonded to their external connections in any order. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) 2000 Mar 28 PARAMETER thermal resistance from junction to ambient 8 VALUE UNIT 160 K/W Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B CHARACTERISTICS Typical values at Tamb = 25 °C and VCC = 5 V; minimum and maximum values are valid over the entire ambient temperature range and supply range; all voltages are measured with respect to ground; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCC supply voltage 3 5 5.5 V ICC supply current AC coupled; RL = 50 Ω − 34 47 mA Ptot total power dissipation VCC = 5 V − 170 259 mW VCC = 3.3 V − 112 169 mW Tj junction temperature −40 − +125 °C Tamb ambient temperature −40 +25 +85 °C Rtr small-signal transresistance of measured differentially; the receiver AC coupled RL = ∞ 13.2 16.6 20 kΩ RL = 50 Ω 6.6 8.3 10 kΩ f−3dB(h) PSRR high frequency −3 dB point power supply rejection ratio VCC = 5 V; Ci = 0.7 pF 1000 1200 − MHz VCC = 3.3 V; Ci = 0.7 pF 850 1100 − MHz f = 1 to 100 MHz − 2 − µA/V f = 1 GHz − 66 − µA/V 210 250 290 Ω 600 822 1000 mV VCC = 5 V; note 2 −1500 +6 +1500 µA VCC = 3.3 V; note 2 −1000 +6 +1000 µA measured differentially; note 1 Bias voltage: pin DREF RDREF resistance between DREF and tested at DC VCC Input: pin IPhoto Vbias(IPhoto) input bias voltage on pin IPhoto Ii(IPhoto)(p-p) input current on pin IPhoto (peak-to-peak value) Ri small-signal input resistance fi = 1 MHz; input current <2 µA (p-p) − 28 − Ω In(tot) total integrated RMS noise current over bandwidth referenced to input; ∆f = 920 MHz; note 3 − 200 − nA 2000 Mar 28 9 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier SYMBOL PARAMETER TZA3043; TZA3043B CONDITIONS MIN. TYP. MAX. UNIT Data outputs: pins OUT and OUTQ Vo(cm) common mode output voltage AC coupled; RL = 50 Ω Vo(se)(p-p) single-ended output voltage (peak-to-peak value) AC coupled; RL = 50 Ω; 75 input current 100 µA (p-p) VCC − 2 VOO differential output offset voltage Ro output resistance single-ended; DC tested 50 62 Ω tr, tf rise time, fall time VCC = 5 V; 20% to 80%; − input current <20 µA (p-p) 285 430 ps VCC = 3.3 V; 20% to 80%; − input current <20 µA (p-p) 300 460 ps − 25 − µA −100 40 VCC − 1.7 VCC − 1.4 V 200 330 mV − +100 mV Automatic gain control loop: pad AGC Ith(AGC) AGC threshold current tatt(AGC) AGC attack time − 5 − µs tdecay(AGC) AGC decay time − 10 − ms referenced to the peak input current; tested at 10 MHz Notes 1. PSRR is defined as the ratio of the equivalent current change at the input (∆IIPhoto) to a change in supply voltage: ∆I IPhoto PSRR = ------------------∆V CC For example, a +10 mV disturbance on VCC at 10 MHz will typically add an extra 20 nA to the photodiode current. The external capacitor between pins DREF and GND has a large impact on the PSRR. The specification is valid with an external capacitor of 1 nF. 2. The pulse width distortion (PWD) is <5% over the whole input current range. The PWD is defined as: pulse width PWD = ------------------------------ – 1 × 100% where T is the clock period. The PWD is measured differentially with T PRBS pattern of 10−23. 3. All In(tot) measurements were made with an input capacitance of Ci = 1 pF. This was comprised of 0.5 pF for the photodiode itself, with 0.3 pF allowed for the printed-circuit board layout and 0.2 pF intrinsic to the package. Noise performance is measured differentially. 2000 Mar 28 10 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B TYPICAL PERFORMANCE CHARACTERISTICS MGU112 40 CC (mA) 38 MGU113 34.8 handbook, I halfpage handbook, halfpage ICC (mA) 34.4 36 34.0 (1) 34 (2) 33.6 (3) 32 33.2 30 28 −40 0 40 80 Tj (°C) 32.8 120 3 5 4 VCC (V) 6 (1) VCC = 5 V. (2) VCC = 3.3 V. (3) VCC = 3 V. Fig.10 Supply current as a function of the junction temperature. Fig.11 Supply current as a function of the supply voltage. MGU114 825 MGU115 920 handbook, halfpage handbook, halfpage Vi (mV) Vi (mV) 823 840 (1) (2) 821 (3) 760 819 680 −40 817 3 4 5 VCC (V) 6 0 40 80 Tj (°C) 120 (1) VCC = 5 V. (2) VCC = 3.3 V. (3) VCC = 3 V. Fig.12 Input voltage as a function of the supply voltage. 2000 Mar 28 Fig.13 Input voltage as a function of the junction temperature. 11 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B MGU116 1.68 Vo(cm) MGU117 1.85 handbook, halfpage handbook, halfpage Vo(cm) (V) (V) 1.675 (1) 1.75 (1) 1.67 (2) 1.665 1.65 (2) 1.66 1.55 −40 1.655 3 4 5 VCC (V) 6 0 40 80 Tj (°C) 120 (1) VCC − VOUT. (2) VCC − VOUTQ. VCC = 5 V. (1) VCC − VOUT. (2) VCC − VOUTQ. Fig.14 Common mode voltage at the output as a function of the supply voltage. Fig.15 Common mode voltage at the output as a function of the junction temperature. 2000 Mar 28 12 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B APPLICATION AND TEST INFORMATION 10 µH handbook, full pagewidth VP 22 nF 680 nF VCC 8 DREF 1 7 TZA3043T IPhoto 6 OUTQ(1) 3 4 GND 5 GND 100 nF Zo = 50 Ω 100 nF OUT(1) 1 nF 2 Zo = 50 Ω R3 50 Ω R4 50 Ω GND MGU101 (1) For TZA3043BT pin 7 is OUT and pin 6 is OUTQ. Fig.16 Application diagram. 2000 Mar 28 13 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 680 nF (1) (1) 22 nF 100 nF DREF VCCA 14 7 1.5 nF OUTQ(2) TZA3043T 4 pF 1 nF IPhoto 6 3 2 4 GND OUT(2) noise filter: 1-pole, 800 MHz 5 GND 100 Ω 1.5 nF GND DIN RSET 16 6 1 100 nF 180 kΩ VCC 8 (1) CF 7 Vref 15 VCCD 14 4 13 DOUT TZA3044 DINQ data out 5 12 1 3 AGND 9 8 SUB JAM 10 STQ Philips Semiconductors Gigabit Ethernet/Fibre Channel transimpedance amplifier handbook, full pagewidth 2000 Mar 28 VCC ST DOUTQ 11 DGND level-detect status 50 Ω 50 Ω VCC − 2 V MGU102 Fig.17 Gigabit Ethernet/Fibre Channel receiver using the TZA3043T and TZA3044. Product specification (1) Ferrite bead e.g. Murata BLM10A700S. (2) For TZA3043BT pin 7 is OUT and pin 6 is OUTQ. TZA3043; TZA3043B 1 kΩ Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B Test circuits handbook, full pagewidth R = 470 Ω, Zi = 28 Ω ZT = s21.(R + Zi) . 2 NETWORK ANALYZER S-PARAMETER TEST SET PORT 1 PORT 2 Zo = 50 Ω Zo = 50 Ω VCC 223-1 PRBS 100 nF PATTERN GENERATOR C C D D TR 10 nF 470 Ω 51 Ω OUT IPhoto 1 OUTQ TZA3043 SAMPLING OSCILLOSCOPE/ TDR/TDT 100 nF C IN OM5803 2 Zo = 50 Ω MGU106 Fig.18 Electrical test circuit. 2000 Mar 28 15 TR Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier handbook, full pagewidth TZA3043; TZA3043B LIGHTWAVE MULTIMETER −9.54 dBm OPTICAL INPUT ERROR DETECTOR OPTICAL ATTENUATOR Data in 0 dBm/1300 IN OUT 90% 10% Clock in VCC BLM 22 nF 223-1 PRBS PATTERN GENERATOR C C D D DREF LASER DRIVER DIN IPhoto TR C IN PIN OM5802 OUTQ TZA3043 DINQ TZA3041 100 nF OUT Laser 10 nF OM5804 100 nF SAMPLING OSCILLOSCOPE/ TDR/TDT TR 1 2 Zo = 50 Ω 1.24416 GHz MGU107 Fig.19 Optical test circuit. 2000 Mar 28 16 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B MGU108 handbook, full pagewidth Fig.20 Differential output with −25 dBm optical input power [input current of 5.17 µA (p-p)]. MGU109 handbook, full pagewidth Fig.21 Differential output with −15 dBm optical input power [input current of 51.7 µA (p-p)]. 2000 Mar 28 17 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B MGU110 handbook, full pagewidth Fig.22 Differential output with −5 dBm optical input power [input current of 517 µA (p-p)]. MGU111 handbook, full pagewidth Fig.23 Differential output with −2 dBm optical input power [input current of 1030 µA (p-p)]. 2000 Mar 28 18 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B BONDING PAD LOCATIONS COORDINATES(1) SYMBOL PAD TZA3043U PAD TZA3043BU x y DREF 1 1 95 881 GND 2 2 95 618 GND 3 3 95 473 IPhoto 4 4 95 285 GND 5 5 215 95 GND 6 6 360 95 GND 7 7 549 95 GND 8 8 691 95 OUT 9 10 785 501 OUTQ 10 9 785 641 VCC 11 11 567 1055 VCC 12 12 424 1055 AGC 13 13 259 1055 Note GND 3 IPhoto 4 VCC VCC AGC VCC VCC 13 12 11 10 TZA3043U 9 5 6 7 OUTQ OUT DREF 1 1300 GND µm 2 GND 3 IPhoto 4 8 9 5 6 7 8 OUT OUTQ 1030 µm 0 GND 0 y GND 0 GND x GND x 10 TZA3043BU GND 2 11 GND 1300 GND µm 12 GND 1 13 GND DREF AGC 1. All coordinates are referenced, in µm, to the bottom left-hand corner of the die. MGU099 Fig.24 Bonding pad locations of the TZA3043U. 2000 Mar 28 0 y 1030 µm MGU100 Fig.25 Bonding pad locations of the TZA3043BU. 19 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B Physical characteristics of the bare die PARAMETER VALUE Glass passivation 2.1 µm PSG (PhosphoSilicate Glass) on top of 0.65 µm oxynitride Bonding pad dimension minimum dimension of exposed metallization is 90 × 90 µm (pad size = 100 × 100 µm) Metallization 1.22 µm W/AlCu/TiW Thickness 380 µm nominal Size 1.03 × 1.30 mm (1.34 mm2) Backing silicon; electrically connected to GND potential through substrate contacts Attach temperature <440 °C; recommended die attach is glue Attach time <15 s 2000 Mar 28 20 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 D E A X c y HE v M A Z 5 8 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.014 0.0075 0.20 0.19 0.16 0.15 0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024 inches 0.010 0.057 0.069 0.004 0.049 0.01 0.01 0.028 0.004 0.012 θ Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT96-1 076E03 MS-012 2000 Mar 28 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-05-22 99-12-27 21 o 8 0o Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B SOLDERING If wave soldering is used the following conditions must be observed for optimal results: Introduction to soldering surface mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. Reflow soldering The footprint must incorporate solder thieves at the downstream end. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Wave soldering Manual soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. To overcome these problems the double-wave soldering method was specifically developed. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 2000 Mar 28 22 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO REFLOW(1) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Mar 28 23 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B DATA SHEET STATUS DATA SHEET STATUS PRODUCT STATUS DEFINITIONS (1) Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Note 1. Please consult the most recently issued data sheet before initiating or completing a design. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. BARE DIE DISCLAIMER All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There are no post packing tests performed on individual die or wafer. Philips Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. 2000 Mar 28 24 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B NOTES 2000 Mar 28 25 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B NOTES 2000 Mar 28 26 Philips Semiconductors Product specification Gigabit Ethernet/Fibre Channel transimpedance amplifier TZA3043; TZA3043B NOTES 2000 Mar 28 27 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 403510/200/02/pp28 Date of release: 2000 Mar 28 Document order number: 9397 750 06817