AMMP-6232 18 to 32 GHz GaAs High Linearity LNA in SMT Package Data Sheet Description Features Avago’s AMMP-6232 is an easy-to-use broadband, high gain, high linearity Low Noise Amplifier in a surface mount package. The wide band and unconditionally stable performance makes this MMIC ideal as a primary or subsequential low noise block or a transmitter driver. The MMIC has 4 gain stages and requires a 4V, 138mA power supply for optimal performance. Since this MMIC covers several bands, it can reduce part inventory and increase volume purchase options The MMIC is fabricated using PHEMT technology. The surface mount package eliminates the need of “chip & wire” assembly for lower cost. This MMIC is fully SMT compatible with backside grounding and I/Os. • • • • Pin Connections (Top View) Applications 1 2 3 100pF 8 4 100pF 7 6 5 Topview Packagebase:GND Pin 1 2 3 4 5 6 7 8 Function Vdd RFout Vg RFin Surface Mount Package, 5.0 x 5.0 x 1.25 mm Single Power Supply Pin Unconditionally Stable 50Ohm Input and Output Match Specifications (Vdd = 4.0V, Idd = 138mA) • • • • RF Frequencies: 18 - 32 GHz High Output IP3: 29dBm High Small-Signal Gain: 23dB Typical Noise Figure: 3dB • • • • Microwave Radio systems Satellite VSAT, DBS Up/Down Link LMDS & Pt-Pt mmW Long Haul Broadband Wireless Access (including 802.16 and 802.20 WiMax) • WLL and MMDS loops • Commercial grade military Note: 1. This MMIC uses depletion mode pHEMT devices. 2. Negative voltage is used for the gate bias Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model (Class A) ESD Human Body Model (Class 1A) Refer to Avago Application Note A004R: Electrostatic Discharge Damage and Control Absolute Maximum Ratings [1] Parameters / Conditions Symbol Unit Max Drain to Ground Voltage Vdd V 5.5 Gate-Drain Voltage Vgd V -8 Drain Current Idd mA 200 Gate Bias Voltage Vg V +0.8 Gate Bias Current Ig mA 1 RF CW Input Power Max Pin dBm 10 Max channel temperature Tch C +150 Storage temperature Tstg C -65 +150 Maximum Assembly Temp Tmax C 260 for 20s 1. Operation in excess of any of these conditions may result in permanent damage to this device. The absolute maximum ratings for Vdd, Vgd, Idd, Vg, Ig and Pin were determined at an ambient temperature of 25°C unless noted otherwise. DC Specifications/ Physical Properties [2] Parameter and Test Condition Symbol Unit Drain Supply Current (Vd=4.0 V) Idd mA Drain Supply Voltage Vd V Gate Bias Current Ig mA Gate Bias Voltage Vg V Thermal Resistance(3) θjc °C/W Min 3 Typ Max 135 150 4 5 0.1 -1.1 -0.95 -0.8 35.1 2. Ambient operational temperature TA=25°C unless noted 3. Channel-to-backside Thermal Resistance (Tchannel = 34°C) as measured using infrared microscopy. Thermal Resistance at backside temp. (Tb) = 25°C calculated from measured data. AMMP-6232 RF Specifications [4] TA= 25°C, Vdd = 4.0 V, Idd =135 mA, Zo=50 W Parameters and Test Conditions Freq. (GHz) Symbol Units Minimum Typical Small-Signal Gain[5] 20, 26, 29 Gain dB 19 23 Noise Figure into 50W[5] 20, 26, 29 NF dB 3 Output Power at 1dB Gain Compression P-1dB dBm 18 Output Power at 3dB Gain Compression Psat dBm 20 Output Third Order Intercept Point OIP3 dBm 29 Isolation Iso dB -45 Input Return Loss RLin dB -10 Output Return Loss RLout dB -10 4. Refer to characteristic plots for detailed individual frequency performance. 5. All tested parameters guaranteed with measurement accuracy ± 1.5dB for gain and ±0.4dB for NF. Maximum 4.5 Sigma AMMP-6232 Typical Performance [1], [2] 40 5 30 4 NoiseFigure (dB) S21 (dB) (TA = 25°C, Vdd=4V, Idd=138mA, Zin = Zout = 50 W unless noted) 20 10 0 15 20 25 30 3 2 1 0 35 18 20 22 Frequency (GHz) 28 30 32 Figure 2. Noise Figure 0 20 OP1dB (dBm) -5 S11 (dB) 26 Frequency (GHz) Figure 1. Small-signal Gain -10 -15 -20 -25 15 20 25 30 15 10 5 0 35 18 Frequency (GHz) 20 22 24 26 28 30 32 30 32 Frequency (GHz) Figure 3. Input Return Loss Figure 4. Output P-1dB 0 30 -5 25 OIP3 (dBm) S22 (dB) 24 -10 -15 -20 20 15 10 5 -25 15 20 25 30 35 18 20 24 26 28 Frequency (GHz) Frequency (GHz) Figure 5. Output Return Loss 22 Figure 6. Output IP3 Note: 1. S-parameters are measured on R&D Eval Board as shown in Figure 20. Effects of connectors and board traces are included in results. 2. Noise Figure is measured on R&D Eval Board as shown in Figure 20, and with a 3dB pad at the input. Board and Connector losses are already deembeded from the data. AMMP-6232 Typical Performance (cont.) S12 (dB) (TA = 25°C, Vdd=4V, Idd=138mA, Zin = Zout = 50 W unless noted) -20 200 -30 170 Idd (mA) -40 -50 140 110 -60 80 -70 15 20 25 30 50 35 3 Frequency (GHz) Figure 7. Isolation NoiseFigure (dB) S21 (dB) 4.5 5 5 30 20 4V 10 5V 3V 0 15 20 25 30 Frequency (GHz) 4 3 2 3V 4V 1 5V 0 18 35 -5 -5 -10 -10 S22 (dB) 0 4V 3V -20 15 24 26 28 30 32 20 25 30 Frequency (GHz) Figure 11. Input Return Loss Over Vdd -15 4V -20 5V -25 5V -25 22 Figure 10. Noise Figure over Vdd 0 -15 20 Frequency (GHz) Figure 9. Gain over Vdd S11 (dB) 4 Vdd (V) Figure 8. Total Current 40 3.5 3V -30 35 15 20 25 30 Frequency (GHz) Figure 12. Output Return Loss Over Vdd 35 AMMP-6232 Typical Performance (cont.) (TA = 25°C, Vdd=4V, Idd=138mA, Zin = Zout = 50 W unless noted) 35 30 20 OIP3 (dBm) OP1dB (dBm) 25 15 3V 10 4V 25 20 22 24 26 28 30 5V 5 5 20 4V 10 5V 18 3V 15 18 32 20 22 Figure 13. Output P-1dB over Vdd 30 32 5 NoiseFigure (dB) 30 S21 (dB) 28 Figure 14. Output IP3 Over Vdd 40 20 25C 10 85C -40C 0 15 20 25 30 Frequency (GHz) 4 3 2 -5 S22 (dB) -10 25C -40C 20 22 24 26 28 30 32 -10 -15 25C -20 85C -25 85C 15 20 Figure 16. Noise Figure over Temp -5 -25 85C Frequency (GHz) 0 -20 25C 18 35 0 -15 -40C 1 0 Figure 15. Gain over Temp S11 (dB) 26 Frequency (GHz) Frequency (GHz) -40C -30 25 30 Frequency (GHz) Figure 17. Input Return Loss Over Temp 24 35 15 20 25 30 Frequency (GHz) Figure 18. Output Return Loss Over Temp 35 AMMP-6232 Application and Usage Biasing and Operation The AMMP-6232 is normally biased with a positive drain supply connected to the VDD pin and a negative gate bias through bypass capacitors as shown in Figure 19. The recommended drain supply voltage is 4 V and the gate bias is approximately -0.95V to get the corresponding drain current of 138mA. It is important to have 0.1uF bypass capacitors and the capacitor should be placed as close to the component as possible. Aspects of the amplifier performance may be improved over a narrower bandwidth by application of additional conjugate, linearity, or low noise (Topt) matching. 4V Vdd 1 IN 0.1uF 2 3 100pF 8 4 OUT After adjusting the gate bias to obtain 138mA at Vdd = 4V, the AMMP-6232 can be safely biased at 3V or 5V (while fixing the gate bias) as desired. At 4V, the performance is an optimal compromise between power consumption, gain and power/linearity. It is both applicable to be used as a low noise block or driver. At 3V, the amplifier is ideal as a front end low noise block where linearity is not highly required. At 5V, the amplifier can provide 1 to 2dBm more output power for LO or transmitter driver applications where high output power and linearity are often required. 100pF 7 6 5 0.1uF Vg ~ -0.95V Top View Package base: GND Refer the Absolute Maximum Ratings table for allowed DC and thermal conditions. Figure 19. Usage of the AMMP-6232 Figure 20. Evaluation/Test Board (available to qualified customer request) Vd1 Matching Network In Vg1 Figure 21. Simplified AMMP-6232 Schematic Vd2 Matching Network Matching Network Vg2 Out Recommended SMT Attachment for 5x5 Package Figure 22a. Suggested PCB Land Pattern and Stencil Layout Figure 22b. Stencil Outline Drawing (mm) The AMMP Packaged Devices are compatible with high volume surface mount PCB assembly processes. The PCB material and mounting pattern, as defined in the data sheet, optimizes RF performance and is strongly recommended. An electronic drawing of the land pattern is available upon request from Avago Sales & Application Engineering. Figure 22c. Combined PCB and Stencil Layouts Manual Assembly • Follow ESD precautions while handling packages. • Handling should be along the edges with tweezers. • Recommended attachment is conductive solder paste. Please see recommended solder reflow profile. Neither Conductive epoxy or hand soldering is recommended. • Apply solder paste using a stencil printer or dot placement. The volume of solder paste will be dependent on PCB and component layout and should be controlled to ensure consistent mechanical and electrical performance. • Follow solder paste and vendor’s recommendations when developing a solder reflow profile. A standard profile will have a steady ramp up from room temperature to the pre-heat temp. to avoid damage due to thermal shock. • Packages have been qualified to withstand a peak temperature of 260°C for 20 seconds. Verify that the profile will not expose device beyond these limits. 300 Peak=250±5˚C Temp (˚C) 250 Meltingpoint=218˚C 200 150 100 50 0 Ramp1 0 50 Preheat Ramp2 100 Reflow 150 200 Cooling 250 300 Seconds Figure 23. Suggested Lead-Free Reflow Profile for SnAgCu Solder Paste AMMP-6232 Part Number Ordering Information Part Number Devices Per Container Container AMMP-6232-BLKG 10 Antistatic bag AMMP-6232-TR1G 100 7” Reel AMMP-6232-TR2G 500 7” Reel A properly designed solder screen or stencil is required to ensure optimum amount of solder paste is deposited onto the PCB pads. The recommended stencil layout is shown in Figure 22. The stencil has a solder paste deposition opening approximately 70% to 90% of the PCB pad. Reducing stencil opening can potentially generate more voids underneath. On the other hand, stencil openings larger than 100% will lead to excessive solder paste smear or bridging across the I/O pads. Considering the fact that solder paste thickness will directly affect the quality of the solder joint, a good choice is to use a laser cut stencil composed of 0.127mm (5 mils) thick stainless steel which is capable of producing the required fine stencil outline. The most commonly used solder reflow method is accomplished in a belt furnace using convection heat transfer. The suggested reflow profile for automated reflow processes is shown in Figure 23. This profile is designed to ensure reliable finished joints. However, the profile indicated in Figure 1 will vary among different solder pastes from different manufacturers and is shown here for reference only. Package, Tape & Reel, and Ordering Information .011 Top View Side View NOTES: DIMENSIONS ARE IN INCHES [MILIMETERS] ALL GROUNDS MUST BE SOLDERED TO PCB RF Material is Rogers RO4350, 0.010” thick Back View Carrier Tape and Pocket Dimensions For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0442EN AV02-0491EN - June 12, 2007