ZETEX ZXMC3A18DN8

ZXMC3A18DN8
COMPLEMENTARY 30V ENHANCEMENT MODE MOSFET
SUMMARY
N-Channel = V(BR)DSS= 30V : RDS(on)= 0.025 ; ID= 7.6A
P-Channel = V(BR)DSS= -30V : RDS(on)= 0.035 ; ID= -6.3A
DESCRIPTION
This new generation of trench MOSFETs from Zetex utilizes a unique structure that
combines the benefits of low on-resistance with fast switching speed. This makes
them ideal for high efficiency, low voltage, power management applications.
SO8
FEATURES
• Low on-resistance
• Fast switching speed
• Low threshold
• Low gate drive
• Low profile SOIC package
APPLICATIONS
• Motor Drive
Q1 = N-channel
• LCD backlighting
Q2 = P-channel
ORDERING INFORMATION
DEVICE
REEL
SIZE
TAPE
WIDTH
QUANTITY
PER REEL
ZXMC3A18DN8TA
7”
12mm
500 units
ZXMC3A18DN8TC
13”
12mm
2500 units
DEVICE MARKING
• ZXMC
3A18
Top View
ISSUE 1 - MAY 2005
1
SEMICONDUCTORS
ZXMC3A18DN8
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
V DSS
30
-30
V
Gate-Source Voltage
V GS
±20
±20
V
ID
7.6
6.1
5.8
-6.3
A
-5.0
A
-4.8
A
Continuous Drain Current
(V GS = 10V; T A =25°C) (b)(d)
(V GS = 10V; T A =70°C) (b)(d)
(V GS = 10V; T A =25°C) (a)(d)
(c)
Pulsed Drain Current
Continuous Source Current (Body Diode) (b)
I DM
37
-30
A
IS
3.6
3.2
A
Pulsed Source Current (Body Diode) (c)
I SM
37
Power Dissipation at T A =25°C (a) (d)
Linear Derating Factor
PD
(a) (e)
PD
Power Dissipation at T A =25°C
Linear Derating Factor
Power Dissipation at T A =25°C (b) (d)
PD
Linear Derating Factor
T j , T stg
Operating and Storage Temperature Range
30
A
1.25
W
10
mW/°C
1.8
W
14
mW/°C
2.1
W
17
mW/°C
-55 to +150
°C
THERMAL RESISTANCE
PARAMETER
SYMBOL
VALUE
UNIT
Junction to Ambient (a) (d)
R ⍜JA
100
°C/W
Junction to Ambient (a) (e)
R ⍜JA
70
°C/W
(b) (d)
R ⍜JA
60
°C/W
Junction to Ambient
NOTES
(a) For a device surface mounted on 25mm x 25mm FR4 PCB with high coverage of single sided 1oz copper, in still air conditions.
(b) For a device surface mounted on FR4 PCB measured at t ⱕ 10 sec.
(c) Repetitive rating - pulse width limited by maximum junction temperature. Pulse width 300␮s, d⬍= 0.02. Refer to Transient Thermal Impedance
graph.
(d) For device with one active die.
(e) For device with two active die running at equal power.
ISSUE 1 - MAY 2005
SEMICONDUCTORS
2
ZXMC3A18DN8
CHARACTERISTICS
ISSUE 1 - MAY 2005
3
SEMICONDUCTORS
ZXMC3A18DN8
N-Channel
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated)
PARAMETER
SYMBOL
MIN.
TYP.
MAX. UNIT CONDITIONS
STATIC
Zero Gate Voltage Drain Current
I DSS
0.5
␮A
I D = 250␮A, V GS =0V
V DS =30V, V GS =0V
Gate-Body Leakage
I GSS
100
nA
V GS =±20V, V DS =0V
Gate-Source Threshold Voltage
V GS(th)
Static Drain-Source On-State
Resistance (1)
R DS(on)
Drain-Source Breakdown Voltage
Forward Transconductance
(1) (3)
30
V (BR)DSS
V
1.0
V
I D = 250␮A, V DS =V GS
0.025
⍀
0.030
⍀
V GS = 10V, I D = 5.8A
V GS = 4.5V, I D = 5.3A
V DS = 15V, I D = 5.8A
g fs
17.5
S
DYNAMIC (3)
Input Capacitance
C iss
1800
pF
Output Capacitance
C oss
289
pF
Reverse Transfer Capacitance
C rss
178
pF
V DS = 25V, V GS =0V
f=1MHz
SWITCHING (2) (3)
Turn-On-Delay Time
t d(on)
5.5
ns
Rise Time
tr
8.7
ns
Turn-Off Delay Time
t d(off)
33
ns
Fall Time
tf
8.5
ns
Gate Charge
Qg
19.4
nC
V DD = 15V, I D =6A
R G ≅ 6.0⍀,
V GS = 10V
V DS = 15V, V GS = 5V
I D = 3.5A
Total Gate Charge
Qg
36
nC
Gate-Source Charge
Q gs
5.5
nC
Gate-Drain Charge
Q gd
7.0
nC
V DS = 15V, V GS = 10V
I D = 3.5A
SOURCE-DRAIN DIODE
Diode Forward Voltage (1)
V SD
0.95
V
T j =25°C, I S = 6A,
V GS =0V
Reverse Recovery Time (3)
Reverse Recovery Charge
(3)
t rr
20.5
ns
T j =25°C, I F = 6A,
Q rr
41.5
nC
di/dt=100A/␮s
NOTES
(1) Measured under pulsed conditions. Pulse width ⱕ 300ms; Duty cycle ⱕ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) For design aid only, not subject to production testing.
ISSUE 1 - MAY 2005
SEMICONDUCTORS
4
ZXMC3A18DN8
TYPICAL CHARACTERISTICS
ISSUE 1 - MAY 2005
5
SEMICONDUCTORS
ZXMC3A18DN8
TYPICAL CHARACTERISTICS
ISSUE 1 - MAY 2005
SEMICONDUCTORS
6
ZXMC3A18DN8
P-Channel
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated)
PARAMETER
SYMBOL
MIN.
TYP.
MAX. UNIT CONDITIONS
STATIC
Zero Gate Voltage Drain Current
I DSS
-1.0
␮A
I D = -250␮A, V GS =0V
V DS =-30V, V GS =0V
Gate-Body Leakage
I GSS
100
nA
V GS =±20V, V DS =0V
Gate-Source Threshold Voltage
V GS(th)
Static Drain-Source On-State
Resistance (1)
R DS(on)
Drain-Source Breakdown Voltage
Forward Transconductance
DYNAMIC (3)
(1) (3)
-30
V (BR)DSS
V
-1.0
V
I D = 250␮A, V DS =V GS
0.035
⍀
0.050
⍀
V GS = -10V, I D = -4.8A
V GS = -4.5V, I D = -4.0A
V DS = -15V, I D = -4.8A
g fs
8.6
S
Input Capacitance
C iss
1603
pF
Output Capacitance
C oss
434
pF
Reverse Transfer Capacitance
C rss
388
pF
V DS = -15V, V GS =0V
f=1MHz
SWITCHING (2) (3)
Turn-On-Delay Time
t d(on)
4.8
ns
Rise Time
tr
9.5
ns
Turn-Off Delay Time
t d(off)
60
ns
Fall Time
tf
38
ns
Gate Charge
Qg
25
nC
V DD = -15V, I D =-1A
R G ≅ 6.0⍀,
V GS = 10V
V DS = -15V, V GS = -5V
I D = -4.8A
Total Gate Charge
Qg
45
nC
Gate-Source Charge
Q gs
5.1
nC
Gate-Drain Charge
Q gd
11.5
nC
V SD
0.82
V DS = -15V, V GS = -10V
I D = -4.8A
SOURCE-DRAIN DIODE
Diode Forward Voltage (1)
-0.95
V
T j =25°C, I S = -3.7,
V GS =0V
Reverse Recovery Time (3)
Reverse Recovery Charge
(3)
t rr
32.5
ns
T j =25°C, I F = -2.2,
Q rr
18.4
nC
di/dt=100A/␮s
NOTES
(1) Measured under pulsed conditions. Pulse width ⱕ 300ms; Duty cycle ⱕ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) For design aid only, not subject to production testing.
ISSUE 1 - MAY 2005
7
SEMICONDUCTORS
ZXMC3A18DN8
PACKAGE OUTLINE
⍜
L
H
E
D
Pin 1
A
c
A1
Seating Plane
e
b
Controlling dimensions are in millimetres. Approximate conversions are given in inches
PACKAGE DIMENSIONS
Millimetres
Inches
DIM
Millimetres
Inches
DIM
Min
Max
Min
Max
Min
Max
A
1.35
1.75
0.053
0.069
e
A1
0.10
0.25
0.004
0.010
b
0.33
0.51
0.013
0.020
D
4.80
5.00
0.189
0.197
c
0.19
0.25
0.008
0.010
H
5.80
6.20
0.228
0.244
␪
0°
8°
0°
8°
E
3.80
4.00
0.150
0.157
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
-
-
-
-
-
1.27BSC
Min
Max
0.050BSC
© Zetex Semiconductors plc 2005
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For the latest product information, log on to www.zetex.com
ISSUE 1 - MAY 2005
SEMICONDUCTORS
8