APT18F60B
APT18F60S
600V, 19A, 0.37Ω Max, trr ≤200ns
N-Channel FREDFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
This 'FREDFET' version has a drain-source (body) diode that has been optimized for
high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft
recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly
reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The
intrinsic gate resistance and capacitance of the poly-silicon gate structure help control
di/dt during switching, resulting in low EMI and reliable paralleling, even when switching
at very high frequency.
TO
-24
7
D 3 PAK
APT18F60B
APT18F60S
D
Single die FREDFET
G
S
TYPICAL APPLICATIONS
FEATURES
• Fast switching with low EMI
• ZVS phase shifted and other full bridge
• Low trr for high reliability
• Half bridge
• Ultra low Crss for improved noise immunity
• PFC and other boost converter
• Low gate charge
• Buck converter
• Avalanche energy rated
• Single and two switch forward
• RoHS compliant
• Flyback
Absolute Maximum Ratings
Symbol
ID
Parameter
Unit
Ratings
Continuous Drain Current @ TC = 25°C
19
Continuous Drain Current @ TC = 100°C
12
A
IDM
Pulsed Drain Current
VGS
Gate-Source Voltage
±30
V
EAS
Single Pulse Avalanche Energy 2
495
mJ
IAR
Avalanche Current, Repetitive or Non-Repetitive
9
A
1
65
Thermal and Mechanical Characteristics
Min
Characteristic
Typ
Max
Unit
W
PD
Total Power Dissipation @ TC = 25°C
335
RθJC
Junction to Case Thermal Resistance
0.37
RθCS
Case to Sink Thermal Resistance, Flat, Greased Surface
TJ,TSTG
Operating and Storage Junction Temperature Range
TL
Soldering Temperature for 10 Seconds (1.6mm from case)
WT
Package Weight
Torque
Mounting Torque ( TO-247 Package), 6-32 or M3 screw
Microsemi Website - http://www.microsemi.com
0.15
-55
150
300
°C/W
°C
0.22
oz
6.2
g
10
in·lbf
1.1
N·m
050-8158 Rev D 8-2011
Symbol
Static Characteristics
TJ = 25°C unless otherwise specified
Symbol
Parameter
VBR(DSS)
Drain-Source Breakdown Voltage
∆VBR(DSS)/∆TJ
Drain-Source On Resistance
VGS(th)
Gate-Source Threshold Voltage
Zero Gate Voltage Drain Current
IGSS
Gate-Source Leakage Current
Dynamic Characteristics
Symbol
Forward Transconductance
Ciss
Input Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
VDS = 600V
TJ = 25°C
VGS = 0V
TJ = 125°C
Typ
Max
0.57
.31
4
-10
0.37
5
250
1000
±100
VGS = ±30V
Unit
V
V/°C
Ω
V
mV/°C
μA
nA
TJ = 25°C unless otherwise specified
Parameter
gfs
2.5
VGS = VDS, ID = 1mA
Threshold Voltage Temperature Coefficient
APT18F60B_S
600
VGS = 10V, ID = 9A
3
IDSS
Min
Reference to 25°C, ID = 250μA
Breakdown Voltage Temperature Coefficient
RDS(on)
∆VGS(th)/∆TJ
Test Conditions
VGS = 0V, ID = 250μA
Min
Test Conditions
VDS = 50V, ID = 9A
4
Effective Output Capacitance, Charge Related
Co(er)
5
Effective Output Capacitance, Energy Related
Max
17
3550
36
325
VGS = 0V, VDS = 25V
f = 1MHz
Co(cr)
Typ
Unit
S
pF
175
VGS = 0V, VDS = 0V to 400V
90
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
td(on)
Turn-On Delay Time
Resistive Switching
Current Rise Time
VDD = 400V, ID = 9A
tr
td(off)
tf
Turn-Off Delay Time
90
19
37
20
23
60
18
VGS = 0 to 10V, ID = 9A,
VDS = 300V
RG = 4.7Ω 6 , VGG = 15V
Current Fall Time
nC
ns
Source-Drain Diode Characteristics
Symbol
IS
ISM
VSD
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 1
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Irrm
Reverse Recovery Current
dv/dt
Peak Recovery dv/dt
Test Conditions
Min
Typ
D
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
A
65
S
TJ = 25°C
TJ = 125°C
TJ = 25°C
diSD/dt = 100A/μs
TJ = 125°C
VDD = 100V
TJ = 25°C
Unit
19
G
ISD = 9A, TJ = 25°C, VGS = 0V
ISD = 9A 3
Max
TJ = 125°C
ISD ≤ 9A, di/dt ≤1000A/μs, VDD = 400V,
TJ = 125°C
175
315
0.65
1.56
6.7
9.2
1.0
200
380
V
ns
μC
A
20
V/ns
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
2 Starting at TJ = 25°C, L = 12.2mH, RG = 25Ω, IAS = 9A.
050-8158 Rev D 8-2011
3 Pulse test: Pulse Width < 380μs, duty cycle < 2%.
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -3.43E-8/VDS^2 + 1.44E-8/VDS + 5.38E-11.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
APT18F60B_S
60
V
GS
25
= 10V
T = 125°C
J
TJ = -55°C
V
20
ID, DRIAN CURRENT (A)
40
TJ = 25°C
30
20
TJ = 150°C
10
15
6V
10
5.5V
5
5V
4.5V
TJ = 125°C
0
0
0
5
10
15
20
25
30
VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V)
0
Figure 2, Output Characteristics
65
NORMALIZED TO
2.5
2.0
1.5
1.0
0.5
50
45
40
TJ = -55°C
35
30
TJ = 25°C
25
20
TJ = 125°C
15
10
5
0
0
-55 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 3, RDS(ON) vs Junction Temperature
0
1
2
3
4
5
6
7
8
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 4, Transfer Characteristics
5,000
Ciss
TJ = -55°C
25
C, CAPACITANCE (pF)
TJ = 25°C
20
TJ = 125°C
15
10
1000
100
Coss
5
0
0
16
5
10
15
ID, DRAIN CURRENT (A)
Figure 5, Gain vs Drain Current
60
VDS = 120V
10
VDS = 300V
6
VDS = 480V
4
2
0
0
65
12
8
Crss
100
200
300
400
500
600
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 6, Capacitance vs Drain-to-Source Voltage
ID = 9A
14
0
10
20
20
40
60
80 100 120 140
Qg, TOTAL GATE CHARGE (nC)
Figure 7, Gate Charge vs Gate-to-Source Voltage
ISD, REVERSE DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE
250μSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
55
30
VGS, GATE-TO-SOURCE VOLTAGE (V)
VDS> ID(ON) x RDS(ON) MAX.
60
VGS = 10V @ 9A
ID, DRAIN CURRENT (A)
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
Figure 1, Output Characteristics
3.0
5
10
15
20
25
30
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
55
50
45
40
TJ = 25°C
35
30
TJ = 150°C
25
20
15
10
5
0
0
0.3
0.6
0.9
1.2
1.5
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
050-8158 Rev D 8-2011
ID, DRAIN CURRENT (A)
= 7 &,8V
GS
50
APT18F60B_S
100
100
IDM
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
IDM
10
13μs
100μs
Rds(on)
1
1ms
10ms
1
Rds(on)
13μs
100μs
1ms
10ms
TJ = 150°C
TC = 25°C
1
100ms
DC line
Scaling for Different Case & Junction
Temperatures:
ID = ID(T = 25°C)*(TJ - TC)/125
100ms
TJ = 125°C
TC = 75°C
0.1
10
DC line
0.1
10
100
800
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 9, Forward Safe Operating Area
C
1
10
100
800
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 10, Maximum Forward Safe Operating Area
0.35
D = 0.9
0.30
0.7
0.25
0.20
0.5
Note:
0.15
P DM
ZθJC, THERMAL IMPEDANCE (°C/W)
0.40
0.3
0.10
t2
SINGLE PULSE
t1 = Pulse Duration
t
Duty Factor D = 1 /t2
Peak T J = P DM x Z θJC + T C
0.1
0.05
0.05
0
10-5
10-4
10-3
10-2
10-1
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
e3 100% Sn Plated
15.49 (.610)
16.26 (.640)
6.15 (.242) BSC
5.38 (.212)
6.20 (.244)
Drai n
(Heat Sink)
e1 SAC: Tin, Silver, Copper
4.69 (.185)
5.31 (.209)
1.49 (.059)
2.49 (.098)
1.0
D3PAK Package Outline
TO-247 (B) Package Outline
Drai n
t1
4.98 (.196)
5.08 (.200)
1.47 (.058)
1.57 (.062)
15.95 (.628)
16.05(.632)
Revised
4/18/95
20.80 (.819)
21.46 (.845)
1.04 (.041)
1.15(.045)
13.79 (.543)
13.99(.551)
13.41 (.528)
13.51(.532)
Revised
8/29/97
11.51 (.453)
11.61 (.457)
3.50 (.138)
3.81 (.150)
0.46 (.018)
0.56 (.022) {3 Plcs}
050-8158 Rev D 8-2011
4.50 (.177) Max.
0.40 (.016)
1.016(.040)
2.21 (.087)
2.59 (.102)
19.81 (.780)
20.32 (.800)
2.87 (.113)
3.12 (.123)
1.65 (.065)
2.13 (.084)
1.01 (.040)
1.40 (.055)
5.45 (.215) BSC
2-Plcs.
Dimensions in Millimeters (Inches)
Gate
Drai n
Source
0.020 (.001)
0.178 (.007)
2.67 (.105)
2.84 (.112)
1.27 (.050)
1.40 (.055)
1.22 (.048)
1.32 (.052)
1.98 (.078)
2.08 (.082)
5.45 (.215) BSC
{2 Plcs. }
Source
Drai n
Gate
Dimensions in Millimeters (Inches)
3.81 (.150)
4.06 (.160)
(Base of Lead)
Heat Sink (Drain)
and Leads
are Plated