APT19M120J_C.pdf

APT19M120J
1200V, 19A, 0.53Ω Max
N-Channel MOSFET
S
S
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
A proprietary planar stripe design yields excellent reliability and manufacturability. Low
switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control slew rates during switching, resulting in low EMI and reliable paralleling,
even when switching at very high frequency. Reliability in flyback, boost, forward, and
other circuits is enhanced by the high avalanche energy capability.
D
G
SO
2
T-
27
"UL Recognized"
file # E145592
IS OTO P ®
D
APT19M120J
Single die MOSFET
G
S
TYPICAL APPLICATIONS
FEATURES
• Fast switching with low EMI/RFI
• PFC and other boost converter
• Low RDS(on)
• Buck converter
• Ultra low Crss for improved noise immunity
• Two switch forward (asymmetrical bridge)
• Low gate charge
• Single switch forward
• Avalanche energy rated
• Flyback
• RoHS compliant
• Inverters
Absolute Maximum Ratings
Symbol
ID
Parameter
Unit
Ratings
Continuous Drain Current @ TC = 25°C
19
Continuous Drain Current @ TC = 100°C
12
A
IDM
Pulsed Drain Current
VGS
Gate-Source Voltage
±30
V
EAS
Single Pulse Avalanche Energy 2
2165
mJ
IAR
Avalanche Current, Repetitive or Non-Repetitive
14
A
1
104
Thermal and Mechanical Characteristics
Typ
Max
Unit
W
PD
Total Power Dissipation @ TC = 25°C
545
RθJC
Junction to Case Thermal Resistance
0.23
RθCS
Case to Sink Thermal Resistance, Flat, Greased Surface
TJ,TSTG
Operating and Storage Junction Temperature Range
VIsolation
RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.)
WT
Torque
Package Weight
Terminals and Mounting Screws.
Microsemi Website - http://www.microsemi.com
0.15
-55
150
°C/W
°C
V
2500
1.03
oz
29.2
g
10
in·lbf
1.1
N·m
Rev C 7-2011
Min
Characteristic
050-8098
Symbol
Static Characteristics
TJ = 25°C unless otherwise specified
Symbol
Parameter
Test Conditions
Min
VBR(DSS)
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250μA
1200
∆VBR(DSS)/∆TJ
Drain-Source On Resistance
VGS(th)
Gate-Source Threshold Voltage
∆VGS(th)/∆TJ
VGS = 10V, ID = 14A
3
Zero Gate Voltage Drain Current
IGSS
Gate-Source Leakage Current
Dynamic Characteristics
VDS = 1200V
VGS = 0V
Forward Transconductance
Ciss
Input Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
Typ
Max
1.41
0.45
4
-10
0.53
5
TJ = 25°C
100
500
±100
TJ = 125°C
VGS = ±30V
Unit
V
V/°C
Ω
V
mV/°C
μA
nA
TJ = 25°C unless otherwise specified
Parameter
gfs
3
VGS = VDS, ID = 2.5mA
Threshold Voltage Temperature Coefficient
IDSS
Symbol
Reference to 25°C, ID = 250μA
Breakdown Voltage Temperature Coefficient
RDS(on)
APT19M120J
Min
Test Conditions
VDS = 50V, ID = 14A
VGS = 0V, VDS = 25V
f = 1MHz
Co(cr)
4
Effective Output Capacitance, Charge Related
Co(er)
5
Effective Output Capacitance, Energy Related
Typ
31
9670
115
715
Max
Unit
S
pF
275
VGS = 0V, VDS = 0V to 800V
140
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
td(on)
Turn-On Delay Time
Resistive Switching
Current Rise Time
VDD = 800V, ID = 14A
tr
td(off)
tf
300
50
140
50
31
170
48
VGS = 0 to 10V, ID = 14A,
VDS = 600V
RG = 2.2Ω 6 , VGG = 15V
Turn-Off Delay Time
Current Fall Time
nC
ns
Source-Drain Diode Characteristics
Symbol
IS
ISM
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 1
Test Conditions
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
Diode Forward Voltage
ISD = 14A, TJ = 25°C, VGS = 0V
trr
Reverse Recovery Time
ISD = 14A 3
Qrr
Reverse Recovery Charge
Peak Recovery dv/dt
Typ
Max
Unit
19
A
G
VSD
dv/dt
Min
D
104
S
diSD/dt = 100A/μs, TJ = 25°C
ISD ≤ 14A, di/dt ≤1000A/μs, VDD = 100V,
TJ = 125°C
1
1290
33
V
ns
μC
10
V/ns
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
2 Starting at TJ = 25°C, L = 22.09mH, RG = 2.2Ω, IAS = 14A.
3 Pulse test: Pulse Width < 380μs, duty cycle < 2%.
050-8098
Rev C 7-2011
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -4.40E-7/VDS^2 + 5.34E-8/VDS + 7.59E-11.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
APT19M120J
90
V
GS
30
= 10V
T = 125°C
J
80
70
ID, DRIAN CURRENT (A)
TJ = -55°C
60
50
40
TJ = 25°C
30
20
15
5V
10
TJ = 150°C
0
0
5
10
15
20
25
30
VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V)
4.5V
0
Figure 2, Output Characteristics
100
NORMALIZED TO
2.5
250μSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
80
2.0
1.5
1.0
0.5
60
TJ = -55°C
TJ = 25°C
40
TJ = 125°C
20
0
0
-55 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 3, RDS(ON) vs Junction Temperature
0
1
2
3
4
5
6
7
8
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 4, Transfer Characteristics
20,000
40
10,000
35
Ciss
TJ = -55°C
30
C, CAPACITANCE (pF)
gfs, TRANSCONDUCTANCE
VDS> ID(ON) x RDS(ON) MAX.
VGS = 10V @ 14A
ID, DRAIN CURRENT (A)
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
Figure 1, Output Characteristics
3.0
5
10
15
20
25
30
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
TJ = 25°C
25
TJ = 125°C
20
15
10
1000
Coss
100
Crss
5
0
VGS, GATE-TO-SOURCE VOLTAGE (V)
16
2
4
6
8
10 12
14
ID, DRAIN CURRENT (A)
Figure 5, Gain vs Drain Current
200
400
600
800 1000 1200
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 6, Capacitance vs Drain-to-Source Voltage
12
VDS = 240V
10
VDS = 600V
8
6
VDS = 960V
4
2
0
0
100
ID = 14A
14
0
10
16
50 100 150 200 250 300 350 400
Qg, TOTAL GATE CHARGE (nC)
Figure 7, Gate Charge vs Gate-to-Source Voltage
ISD, REVERSE DRAIN CURRENT (A)
0
90
80
70
60
50
TJ = 25°C
40
TJ = 150°C
30
20
10
0
0
0.2
0.4
0.6
0.8
1.0
1.2
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
Rev C 7-2011
0
= 6, 7, 8 & 9V
GS
5
TJ = 125°C
10
V
20
050-8098
ID, DRAIN CURRENT (A)
25
200
100
100
IDM
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
APT19M120J
200
10
13μs
100μs
1ms
1
0.1
Rds(on)
Rds(on)
10
100ms
DC line
13μs
100μs
TJ = 150°C
TC = 25°C
1
DC line
0.1
10
100
1200
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 9, Forward Safe Operating Area
1ms
10ms
Scaling for Different Case & Junction
Temperatures:
ID = ID(T = 25°C)*(TJ - TC)/125
100ms
TJ = 125°C
TC = 75°C
1
10ms
IDM
C
1
10
100
1200
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 10, Maximum Forward Safe Operating Area
D = 0.9
0.20
0.7
0.15
0.5
Note:
0.10
P DM
ZθJC, THERMAL IMPEDANCE (°C/W)
0.25
t1
0.3
t2
t1 = Pulse Duration
0.05
t
0.1
0
SINGLE PULSE
0.05
10-5
Duty Factor D = 1 /t2
Peak T J = P DM x Z θJC + T C
10-4
10-3
10-2
10-1
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
SOT-227 (ISOTOP®) Package Outline
11.8 (.463)
12.2 (.480)
31.5 (1.240)
31.7 (1.248)
7.8 (.307)
8.2 (.322)
r = 4.0 (.157)
(2 places)
W=4.1 (.161)
W=4.3 (.169)
H=4.8 (.187)
H=4.9 (.193)
(4 places)
4.0 (.157)
4.2 (.165)
(2 places)
050-8098
Rev C 7-2011
3.3 (.129)
3.6 (.143)
14.9 (.587)
15.1 (.594)
* Source
30.1 (1.185)
30.3 (1.193)
8.9 (.350)
9.6 (.378)
Hex Nut M 4
(4 places )
0.75 (.030)
0.85 (.033)
12.6 (.496)
12.8 (.504)
25.2 (0.992)
25.4 (1.000)
1.95 (.077)
2.14 (.084)
Drai n
* Emitter terminals are shorte d
internally. Current handlin g
capability is equal for either
Source terminal .
38.0 (1.496)
38.2 (1.504)
* Source
Gate
1.0
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