IRF IRAM109

PD-97276 Rev A
IRAM109-015SD
Series
Integrated Power Hybrid IC for
Appliance Motor Drive Applications
H-Bridge 1A, 500V
Description
International Rectifier’s IRAM109-015SD is a multi-chip Hybrid IC developed for low power appliance motor
control applications such as Fans, Pumps, refrigerator compressors, etc. The compact Single in line (SIP-S)
package minimizes PCB space.
Several built-in protection features such as temperature feedback, shoot through prevention, under voltage
lockout, and shutdown input makes this a very robust solution. The internal shunt resistor saves board
space and provides clean current feedback. The combination of highly efficient high voltage MOSFETs, the
industry benchmark Half-Bridge HVIC driver (3.3V/5V input compatible) and thermally enhanced package
makes this a highly competitive solution.
The bootstrapped power supplies for the high side drivers can be generated using internal bootstrap diodes
eliminating the need for isolated power supplies. This feature reduces the component count, board space,
and cost of the system.
Features
•
•
•
•
•
•
•
•
•
•
Motor Power range 60~250W / 85~253 Vac.
Integrated Gate Drivers and Bootstrap Diodes.
Shut-Down input turns off both channels.
Under-voltage lockout for all switches.
Matched propagation delay.
Schmitt-triggered input logic.
Cross-conduction prevention logic.
Low di/dt switching for better noise immunity.
Internal Current Shunt.
Internal thermistor for temperature feedback.
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM.
VDSS
MOSFET Blocking Voltage
500
V
Vbus
Positive DC Bus Input Voltage
400
V
Io @ TC=25°C
RMS Phase Current
2.0
Io @ TC=100°C
RMS Phase Current (Note 1)
1.0
Ipk @ TC=25°C
Maximum Peak Phase Current (tp<100µs)
5.0
Pd
Maximum Power dissipation per FET @ TC =25°C
TJ (MOSFET & IC)
Maximum Operating Junction Temperature
18
A
W
+150
TC
Operating Case Temperature Range
-20 to +100
TSTG
Storage Temperature Range
-40 to +125
T
Mounting torque Range (M3 screw)
0.6
°C
Nm
Note 1: Sinusoidal Modulation at V+=360V, TJ=150°C, FPWM=20kHz, FMOD=50Hz, MI=0.8, PF=0.6, See Figure 5.
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1
IRAM109-015SD
Internal Electrical Schematic – IRAM109-015SD
DB1
RB
Q1
1
2
3
4
5
10
VCC
VB
IN
HO
SD
VS
DT
LO
Vss
RG1
9
8
7
COM
Q2
RG2
6
IC1
DB2
1
2
3
4
5
VB
IN
HO
SD
VS
DT
LO
Vss
Q3
10
VCC
RG3
9
8
Q4
7
COM
RG4
6
IC2
RD
RS
TH
1
2
2
3
4
5
6
7
8
11
12
15
16
19
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IRAM109-015SD
Absolute Maximum Ratings (Continued)
Symbol
Parameter
Min
Max
Units Conditions
BVR
Bootstrap Diode Reverse
Breakdown Voltage
600
---
V
TJ = 25°C, IR=1mA
PBR Peak
Bootstrap Resistor Peak Power
(Single Pulse)
---
25.0
W
tP=100µs, TC =100°C
VS1,2,3
High side floating supply offset
voltage
VB1,2,3 - 20
VB1,2,3 +0.3
V
VB1,2,3
High side floating supply voltage
-0.3
500
V
VDD
Low Side and logic fixed supply
voltage
-0.3
20
V
VIN
Input voltage IN1, IN2
-0.3
Lower of
(VSS+15V) or
VDD+0.3V
V
Electrical Characteristics (TJ= 25°C Unless Otherwise Specified)
Symbol
Parameter
Min
Typ
Max
V(BR)DSS
Drain-to-Source Breakdown
Voltage
500
---
---
RDS(ON)
Drain-to-Source On Resistance
---
2.2
2.7
IDSS
Drain-to-Source Leakage Current
VFM
Diode Forward Voltage Drop
VBDFM
Bootstrap Diode Forward Voltage
Drop
RBR
ƩRBR/RBR
Units Conditions
V
ƻ
VIN=5V, ID=250µA
ID=1A, VDD=15V
ID=1A, VDD=15V, TJ=150°C
---
5.5
---
---
10
100
---
0.87
1.1
---
0.70
---
---
---
1.25
V
IF=1A
Bootstrap Resistor Value
---
22
---
ƻ
TJ=25°C
Bootstrap Resistor Tolerance
---
---
±5
%
TJ=25°C
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µA
V
VIN=5V, V+=500V
IF=1A
IF=1A, TJ=150°C
3
IRAM109-015SD
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltages are absolute referenced to COM. The VS offset is tested with all supplies biased at
15V differential.
Symbol
+
Definition
Min
Typ
Max
---
---
360
VS+10
VS+15
VS+20
Units
V
Positive Bus Input Voltage
VB1,2,3
High side floating supply voltage
VDD
Low side and logic fixed supply voltage
10
15
20
V
VIN
Logic input voltage (IN & SD) - Note 2
VSS
---
VDD
V
Fp
PWM Carrier Frequency
---
20
---
KHz
V
Note 2: Logic operational for Vs from COM-5V to COM+500V. Logic state held for Vs from COM-5V to COM-VBS.
(please refer to DT97-3 for more details).
Static Electrical Characteristics (TJ= 25°C Unless Otherwise Specified)
VBIAS (VDD, VBS1,2,3)=15V, unless otherwise specified. The VIN and IIN parameters are referenced to COM and are
applicable to all channels (Static Electrical Characteristics are Based on Driver IC Data Sheet).
Symbol
Definition
Min
Typ
Max
Units
VDDUV+, VBSUV+
VDD and VBS supply undervoltage, Positive going threshold
8
8.9
9.8
V
VDDUV-, VBSUV-
VDD and VBS supply undervoltage, Negative going threshold
7.4
8.2
9
V
IQBS
Quiescent VBS supply current
20
75
130
µA
IQDD
Quiescent VDD supply current
0.4
1
1.6
mA
ILK
Offset Supply Leakage Current
---
---
50
µA
Dynamic Electrical Characteristics (TJ= 25°C Unless Otherwise Specified)
Symbol
Parameter
Min
Typ
Max
TON
Input to Output propagation turnon delay time (see fig. 13a)
---
2.4
---
Input to Output propagation turnoff delay time (see fig. 13b)
TOFF
---
Units Conditions
µs
ID=1.5A, V+=360V
570
---
ns
Internal Current Sensing Resistor - Shunt Characteristics
Symbol
Parameter
Min
Typ
Max
RShunt
Resistance
218
220
222
mƻ
TCoeff
Temperature Coefficient
0
---
200
ppm/°C
TRange
Temperature Range
0
---
125
°C
4
Units Conditions
TC = 25°C
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IRAM109-015SD
Thermal and Mechanical Characteristics
Symbol
Parameter
Rth(J-C)
Thermal resistance, per FET
Min
Typ
Max
---
5.1
6.9
Units Conditions
°C/W Flat, Insulation Material
Internal NTC - Thermistor Characteristics
Parameter
Definition
Min
Typ
Max
Units Conditions
R25
Resistance
97
100
103
kƻ
TC = 25°C
R125
Resistance
2.25
2.52
2.80
kƻ
TC = 125°C
B
B-constant (25-50°C)
4165
4250
4335
k
Temperature Range
-40
---
125
°C
Typ. Dissipation constant
---
1.0
---
R2 = R1e [B(1/T2 - 1/T1)]
mW/°C TC = 25°C
Input-Output Logic Level Table
SD
IN1,2
VS1,2
1
1
0
1
0
x
V+
0
Off
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IRAM109-015SD
Timing Parameter Definitions
IN
IN(LO)
SD
IN(HO)
50%
50%
ton
toff
tr
90%
HO
LO
HO
LO
Figure 1. Input/Output Timing Diagram
tf
90%
10%
10%
Figure 2. Switching Time Waveform Diagram
IN (LO)
50%
50%
IN (HO)
90%
HO
LO
50%
50%
IN
DTLO-HO
LO
10%
90%
HO
10%
DTHO-LO
MT
MT
90%
10%
MDT= DTLO-HO
- DTHO-LO
Figure 3. Deadtime Waveform Diagram
6
LO
HO
Figure 4. Delay Matching Waveform Diagram
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IRAM109-015SD
PO2
VB2
PO1
VB1
VBUS+
12
15
16
19
DCgnd
8
11
VSS
Isense
7
VCC
5
6
TH
SD
4
IN2
2
3
IN1
1
Typical Application Connection – IRAM109-015SD
Application Circuit Recommendation
1. Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible to reduce
ringing and EMI problems. Additional high frequency ceramic capacitor mounted close to the module pins
will further improve performance.
2. In order to provide good decoupling between VCC-VSS and PO1,2-VB1,2 terminals, and the capacitors
shown connected between these terminals should be located very close to the module pins. Additional high
frequency capacitors, typically 0.1µF, are strongly recommended.
3. Value of the boot-strap capacitors depends upon the switching frequency. Their selection should be made
based on IR design tip DN 98-2a, application note AN-1044, or Figure 12. Bootstrap capacitor value must
be selected to limit the power dissipation of the internal resistor in series with VCC (See maximum ratings
Table on page 3).
4. The case of the module is connected to the negative DC Bus and is NOT Isolated. It is
recommended to provide isolation material between case and heat sink to avoid electrical
shock.
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IRAM109-015SD
Module Pin-Out Description
Pin
Name
1
IN1
Logic Input Gate Driver - Phase 1
Description
2
IN2
Logic Input Gate Driver - Phase 2
3
VTH
Temperature Feedback
4
SD
Shun-down Function
5
VDD
+15V Main Supply
6
VSS
Negative Main Supply
7
ISENSE
8
V-
Negative Bus Input Voltage
9
NA
none
Current Feedback
10
NA
none
11
VS2
Output 2 - High Side Floating Supply Offset Voltage
12
VB2
High Side Floating Supply voltage 2
13
NA
none
14
NA
none
15
VS1
Output 1 - High Side Floating Supply Offset Voltage
16
VB1
High Side Floating Supply voltage 1
17
NA
none
18
NA
none
19
V+
Positive Bus Input Voltage
1
19
8
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IRAM109-015SD
Maximum Output Phase RMS Current - A
1.6
1.4
1.2
1
0.8
TC = 80ºC
TC = 90ºC
TC = 100ºC
0.6
0.4
TJ = 150ºC
Sinusoidal Modulation
0.2
0
0
2
4
6
8
10
12
14
16
18
20
PWM Sw itching Frequency - kHz
Figure 5. Maximum Sinusoidal Phase Current vs. PWM Switching Frequency
Sinusoidal Modulation, V+=360V, TJ=150°C, FMOD=50Hz, MI=0.8, PF=0.6
Maximum Output Phase RMS Current - A
1.4
TJ = 150ºC
Sinusoidal Modulation
1.2
1
0.8
FPWM = 12kHz
FPWM = 16kHz
FPWM = 20kHz
0.6
0.4
0.2
0
1
10
100
Modulation Frequency - Hz
Figure 6. Maximum Sinusoidal Phase Current vs. Modulation Frequency
Sinusoidal Modulation, V+=360V, TJ=150°C, MI=0.8, PF=0.6
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IRAM109-015SD
30
TJ = 150ºC
Sinusoidal Modulation
Total Power Loss- W
25
20
15
10
IOUT = 1.2A
IOUT = 1.0A
IOUT = 0.8A
5
0
0
2
4
6
8
10
12
14
16
18
20
PWM Sw itching Frequency - kHz
Figure 7. Total Power Losses vs. PWM Switching Frequency
Sinusoidal Modulation, V+=360V, TJ=150°C, MI=0.8, PF=0.6
45
TJ = 150ºC
Sinusoidal Modulation
40
Total Power Loss - W
35
30
25
20
15
FPWM = 20kHz
FPWM = 16kHz
FPWM = 12kHz
10
5
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
Output Phase Current - ARMS
Figure 8. Total Power Losses vs. Output Phase Current
Sinusoidal Modulation, V+=360V, TJ=150°C, MI=0.8, PF=0.6
10
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IRAM109-015SD
Max Allowable Case Temperature - ºC
150
125
TC is limited to 100ºC
100
75
FPWM = 12kHz
FPWM = 16kHz
FPWM = 20kHz
50
25
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
Output Phase Current - ARMS
Figure 9. Maximum Allowable Case Temperature vs. Output RMS Current per Phase
Sinusoidal Modulation, V+=360V, TJ=150°C, Modulation Depth=0.8, PF=0.6
160
MOSFET Junction Temperature - °C
TJ avg = 1.27 x TT herm + 3.09
150
140
130
120
110
100
90
80
115.8
70
70
75
80
85
90
95
100
105
110
115
120
Internal Therm istor Tem perature Equivalent Read Out - °C
Figure 10. Estimated Maximum MOSFET Junction Temperature vs. Thermistor Temperature
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IRAM109-015SD
5.0
Thermistor Pin Read-Out Voltage - V
4.5
4.0
TTHERM RTHERM TTHERM RTHERM TTHERM RTHERM
°C
ƻ
°C
ƻ
°C
ƻ
3.5
3.0
2.5
2.0
1.5
1.0
0.5
-40
4397119
25
100000
90
-35
3088599
30
79222
95
7481
6337
-30
2197225
35
63167
100
5384
-25
1581881
40
50677
105
4594
-20
1151037
45
40904
110
3934
-15
846579
50
33195
115
3380
-10
628988
55
27091
120
2916
-5
471632
60
22224
125
2522
0
357012
65
18322
130
2190
5
272500
70
15184
135
1907
10
209710
75
12635
140
1665
15
162651
80
10566
145
1459
20
127080
85
8873
150
1282
0.0
-40 -30 -20 -10
0
Min
Avg.
Max
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
Therm istor Tem perature - °C
Figure 11. Thermistor Readout vs. Temperature (12Kohm pull-up resistor, 5V) and
Normal Thermistor Resistance values vs. Temperature Table.
11.0
10µF
Recommended Bootstrap Capacitor - µF
10.0
9.0
8.0
6.8µF
7.0
6.0
4.7µF
5.0
4.0
3.3µF
3.0
2.2µF
1.5µF
2.0
1.0
0.0
0
5
10
15
20
PWM Frequency - kHz
Figure 12. Recommended Bootstrap Capacitor Value vs. Switching Frequency
12
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IRAM109-015SD
Figure 13. Switching Parameter Definitions
VDS
ID
ID
VDS
90% ID
50%
IN1/IN2
90% ID
50%
VDS
IN1 / IN2
50%
IN1/IN2
IN1/IN2
50%
VCE
10% ID
10% ID
tf
tr
TON
Figure 13a. Input to Output propagation turn-on
delay time.
TOFF
Figure 13b. Input to Output propagation turn-off
delay time.
Figure 13c. Diode Reverse Recovery.
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13
IRAM109-015SD
Figure CT1. Switching Loss Circuit
14
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IRAM109-015SD
Package Outline IRAM109-015SD
missing pin ; 9,10,13,14,17,18
note3
IRAM109-015SD
note2
note5
note4
note1: Unit Tolerance is +0.4mm,
䇭䇭䇭䇭 Unless Otherwise Specified.
note2: Mirror Surface Mark indicates Pin1 Identification.
note3: Characters Font in this drawing differs from
Font shown on Module.
note4: Lot Code Marking.
䇭䇭䇭 Characters Font in this drawing differs from
䇭䇭䇭䇭 Font shown on Module.
note5: Non-Isolated Back Side.
For mounting instruction see AN-1049
Data and Specifications are subject to change without notice
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
7/2007
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