STP60NS04ZB N-CHANNEL CLAMPED 10mΩ - 60A TO-220 FULLY PROTECTED MESH OVERLAY™ MOSFET TYPE STP60NS04ZB ■ ■ ■ ■ VDSS RDS(on) ID CLAMPED < 0.015 Ω 60 A TYPICAL RDS(on) = 0.010 Ω 100% AVALANCHE TESTED LOW CAPACITANCE AND GATE CHARGE 175°C MAXIMUM JUNCTION TEMPERATURE 3 1 DESCRIPTION This fully clamped MOSFET is produced by using the latest advanced Company’s Mesh Overlay process which is based on a novel strip layout. The inherent benefits of the new technology coupled with the extra clamping capabilities make this product particularly suitable for the harshest operation conditions such as those encountered in the automotive environment .Any other application requiring extra ruggedness is also recommended. 2 TO-220 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ABS,SOLENOID DRIVERS ■ MOTOR CONTROL ■ DC-DC CONVERTERS ■ ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) CLAMPED V VDG Drain-gate Voltage CLAMPED V VGS Gate- source Voltage CLAMPED V ID Drain Current (continuous) at TC = 25°C 60 A ID Drain Current (continuous) at TC = 100°C 42 A IDG Drain Gate Current (continuous) ± 50 mA IGS Gate Source Current (continuous) ± 50 mA IDM () PTOT Drain Current (pulsed) 240 A Total Dissipation at TC = 25°C 150 W Derating Factor 1 W/°C VESD(G-S) Gate-Source ESD(HBM-C=100 pF, R=1.5 KΩ) 6 kV VESD(G-D) Gate-Drain ESD(HBM-C=100 pF, R=1.5 KΩ) 4 kV VESD(D-S) Drain-Source ESD(HBM-C=100 pF, R=1.5 KΩ) 4 kV –65 to 175 °C Tstg Tj Storage Temperature Max. Operating Junction Temperature (•)Pulse width limited by safe operating area November 2002 1/8 STP60NS04ZB THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 1.0 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl AVALANCHE CHARACTERISTICS Symbol Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, δ < 1%) EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 30 V ) Max Value Unit 60 A 400 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25°C UNLESS OTHERWISE SPECIFIED) OFF Symbol Parameter Test Conditions Min. Typ. Max. Clamped Voltage ID = 1 mA, VGS = 0 -40 < Tj < 175 °C Zero Gate Voltage Drain Current (VGS = 0) VDS = 16 V,Tj = 150 °C 50 VDS = 16 V,Tj = 175 °C 100 µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ±10 V,Tj = 175 °C VGS = ±16 V,Tj = 175 °C 50 150 µA µA VGSS Gate-Source Breakdown Voltage IGS = ±100 µA V(BR)DSS IDSS 33 Unit V 18 µA V ON (1) Symbol Parameter Test Conditions Min. Typ. Max. Unit 1.7 3 4.2 V VGS(th) Gate Threshold Voltage VDS = VGS, ID = 1 mA -40 < Tj < 150 °C RDS(on) Static Drain-source On Resistance VGS = 10 V, ID = 30 A 11 15 mΩ VGS = 16 V, ID = 30 A 10 14 mΩ Min. Typ. Max. Unit 20 40 DYNAMIC Symbol gfs (1) 2/8 Parameter Test Conditions Forward Transconductance VDS =15 V ,ID = 30 A Ciss Input Capacitance VDS = 25 V, f = 1 MHz, VGS = 0 Coss Crss S 1700 2100 pF Output Capacitance 800 1000 pF Reverse Transfer Capacitance 190 240 pF STP60NS04ZB ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol Parameter Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Test Conditions Min. VDD = 18 V, ID = 60 A, VGS = 10 V Typ. Max. Unit 48 62 nC 13 nC 16 nC SWITCHING OFF Symbol tr(Voff) tf tc Parameter Off Voltage Rise Time Fall Time Cross-over Time Test Conditions Min. VCLAMP = 30 V, ID = 60 A, RG = 4.7 Ω, VGS = 10 V (see test circuit, Figure 3) Typ. Max. Unit 60 45 100 75 60 130 ns ns ns Typ. Max. Unit 60 A 240 A SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) Parameter Test Conditions Min. Source-drain Current Source-drain Current (pulsed) Forward On Voltage ISD = 60 A, VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge ISD = 60 A, di/dt = 100 A/µs VDD = 15 V, Tj = 150°C (see test circuit, Figure 5) IRRM Reverse Recovery Current 1.5 V 50 ns 62 nC 2.6 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STP60NS04ZB Output Characteristics Transconductance Gate Charge vs Gate-source Voltage 4/8 Transfer Characteristics Static Drain-source On Resistance Capacitance Variations STP60NS04ZB Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Zero Gate Voltage Drain Current vs Temperature Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature 5/8 STP60NS04ZB Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STP60NS04ZB TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L4 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 L4 P011C 7/8 STP60NS04ZB Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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