SSM4880AGM
N-CHANNEL ENHANCEMENT-MODE POWER MOSFET
Low on-resistance
D
Fast switching, planar construction
D
D
D
Simple drive requirement
S
S
30V
R DS(ON)
9mΩ
13A
ID
G
SO-8
BV DSS
S
Description
D
Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
G
G
S S
The SO-8 package is widely preferred for commercial and
industrial surface mount applications and the SSM4880AGM is well suited for
for low-voltage applications such as DC/DC converters.
Pb-free lead finish (second-level interconnect)
Absolute Maximum Ratings
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID @ TA=25°C
ID @ TA=70°C
Rating
Units
30
V
±20
V
3
13
A
3
10
A
Continuous Drain Current
Continuous Drain Current
1
IDM
Pulsed Drain Current
50
A
PD @ TA=25°C
Total Power Dissipation
2.5
W
0.02
W/°C
266
mJ
7.3
A
Linear Derating Factor
4
EAS
Single Pulse Avalanche Energy
IAR
Avalanche Current
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
Thermal Data
Symbol
Rthj-a
3/08/2005 Rev.2.2
Parameter
3
Thermal Resistance Junction-ambient
Max.
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Value
Unit
50
°C/W
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SSM4880AGM
Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
VGS=0V, ID=250uA
Min.
Typ.
Max. Units
30
-
-
V
V/°C
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/∆Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
-
0.037
-
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=13A
-
-
9
mΩ
VGS=4.5V, ID=10A
-
-
15
mΩ
VGS(th)
Gate Threshold Voltage
VDS=VGS, ID=250uA
1
-
3
V
gfs
Forward Transconductance
VDS=15V, ID=10A
-
20
-
S
IDSS
Drain-Source Leakage Current (Tj=25°C)
VDS=30V, VGS=0V
-
-
1
uA
Drain-Source Leakage Current (Tj=55°C)
VDS=24V, VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS= ± 20V
-
-
IGSS
nA
Qg
Total Gate Charge
ID=13A
-
±100
22.5
-
Qgs
Gate-Source Charge
VDS=15V
-
3.3
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=5V
-
15.4
-
nC
VDS=15V
-
9
-
ns
-
16
-
ns
2
2
nC
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
td(off)
Turn-off Delay Time
RG=6.2Ω ,VGS=10V
-
25
tf
Fall Time
RD=15Ω
-
50
-
ns
Ciss
Input Capacitance
VGS=0V
-
813
-
pF
Coss
Output Capacitance
VDS=25V
-
516
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
224
-
pF
Min.
Typ.
-
-
2.3
A
-
-
50
A
-
-
1.3
V
-
ns
Source-Drain Diode
Symbol
IS
ISM
VSD
Parameter
Test Conditions
VD=VG=0V , VS=1.3V
Continuous Source Current ( Body Diode )
1
Pulsed Source Current ( Body Diode )
2
Forward On Voltage
Tj=25°C, IS=2.3A, VGS=0V
Max. Units
Notes:
1.Pulse width limited by safe operating area.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in2 copper pad of FR4 board ; 125°C/W when mounted on min. copper pad.
4.Starting Tj=25oC , VDD=25V , L=10mH , R G=25Ω
3/08/2005 Rev.2.2
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SSM4880AGM
50
50
10V
8.0V
6.0V
5.0V
ID , Drain Current (A)
40
40
V G = 4 .0 V
30
20
10
30
V G = 4 .0 V
20
10
0
0
0
1
2
3
4
5
6
0
V DS , Drain-to-Source Voltage (V)
1
2
3
4
5
6
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
21
1.8
I D =10A
T A =25°C
I D =13A
V G =10V
1.6
Normalized R DS(ON)
17
RDS(ON) (mΩ )
10V
8.0V
6.0V
5.0V
T A =150 o C
ID , Drain Current (A)
o
T A =25 C
13
1.4
1.2
1
9
0.8
0.6
5
2
4
6
8
10
-50
0
100
150
Fig 4. Normalized On-Resistance
vs. Junction Temperature
100
3
10
2
VGS(th) (V)
IS(A)
Fig 3. On-Resistance vs. Gate Voltage
T j =150 o C
50
T j , Junction Temperature ( o C)
V GS , Gate-to-Source Voltage (V)
T j =25 o C
1
1
0.1
0
0.1
0.3
0.5
0.7
0.9
1.1
1.3
-50
0
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
3/08/2005 Rev.2.2
50
100
150
o
T j , Junction Temperature( C)
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
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SSM4880AGM
f=1.0MHz
16
10000
I D =13A
V DS =15V
12
10
C (pF)
VGS , Gate to Source Voltage (V)
14
8
1000
C iss
C oss
6
4
C rss
2
100
0
0
10
20
30
40
1
50
6
Q G , Total Gate Charge (nC)
11
16
21
V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1
100
Normalized Thermal Response (Rthja)
Duty factor = 0.5
10
1ms
ID (A)
10ms
1
100ms
0.1
1s
10s
DC
o
T A =25 C
Single Pulse
0.01
0.2
0.1
0.1
0.05
0.02
0.01
PDM
0.01
t
Single Pulse
T
Duty Factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja=125oC/W
0.001
0.1
1
10
100
0.0001
0.001
0.01
V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
3/08/2005 Rev.2.2
Charge
Q
Fig 12. Gate Charge Waveform
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SSM4880AGM
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
3/08/2005 Rev.2.2
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