ETC BUS98/D

ON Semiconductor
BUS98
BUS98A
SWITCHMODE Series
NPN Silicon Power Transistors
The BUS98 and BUS98A transistors are designed for high–voltage,
high–speed, power switching in inductive circuits where fall time is
critical. They are particularly suited for line–operated
SWITCHMODE applications such as:
•
•
•
•
•
•
•
•
30 AMPERES
NPN SILICON
POWER TRANSISTORS
400 AND 450 VOLTS
(BVCEO)
250 WATTS
850–1000 V (BVCES)
Switching Regulators
Inverters
Solenoid and Relay Drivers
Motor Controls
Deflection Circuits
Fast Turn–Off Times
60 ns Inductive Fall Time –25C (Typ)
120 ns Inductive Crossover Time –25C (Typ)
Operating Temperature Range –65 to +200C
100C Performance Specified for:
Reverse–Biased SOA with Inductive Loads
Switching Times with Inductive Loads
Saturation Voltages
Leakage Currents (125C)
CASE 1–07
TO–204AA
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MAXIMUM RATINGS
Rating
Symbol
BUS98
BUS98A
Unit
Collector–Emitter Voltage
VCEO(sus)
400
450
Vdc
Collector–Emitter Voltage
VCEV
850
1000
Vdc
Emitter Base Voltage
VEB
7
Vdc
Collector Current — Continuous
— Peak (1)
— Overload
IC
ICM
IoI
30
60
120
Adc
Base Current — Continuous
— Peak (1)
IB
IBM
10
30
Adc
Total Power Dissipation — TC = 25C
— TC = 100C
Derate above 25C
PD
250
142
1.42
Watts
TJ, Tstg
–65 to +200
C
Symbol
Max
Unit
RθJC
0.7
C/W
TL
275
C
Operating and Storage Junction
Temperature Range
W/C
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance,
Junction to Case
Maximum Lead Temperature
for Soldering Purposes:
1/8″ from Case for 5 Seconds
(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle 10%. Designer’s and SWITCHMODE are trademarks of ON Semiconductor, Inc.
 Semiconductor Components Industries, LLC, 2001
March, 2001 – Rev. 9
1
Publication Order Number:
BUS98/D
BUS98 BUS98A
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ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
400
450
—
—
—
—
—
—
—
—
0.4
4.0
—
—
—
—
1.0
6.0
Unit
OFF CHARACTERISTICS (1)
Collector–Emitter Sustaining Voltage (Table 1)
(IC = 200 mA, IB = 0) L = 25 mH
VCEO(sus)
BUS98
BUS98A
Collector Cutoff Current
(VCEV = Rated Value, VBE(off) = 1.5 Vdc)
(VCEV = Rated Value, VBE(off) = 1.5 Vdc, TC = 125C)
Collector Cutoff Current
(VCE = Rated VCEV, RBE = 10 Ω)
Vdc
ICEV
TC = 25 C
TC = 125 C
mAdc
ICER
mAdc
Emitter Cutoff Current
(VEB = 7 Vdc, IC = 0)
IEBO
—
—
0.2
mAdc
Emitter–Base Breakdown Voltage
(IE = 100 mA – IC = 0)
VEBO
7.0
—
—
Vdc
SECOND BREAKDOWN
Second Breakdown Collector Current with Base Forward Biased
Clamped Inductive SOA with Base Reverse Biased
IS/b
See Figure 12
RBSOA
See Figure 13
ON CHARACTERISTICS (1)
DC Current Gain
(IC = 20 Adc, VCE = 5 Vdc)
(IC = 16 Adc, VCE = 5 V)
hFE
8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.5
3.5
2.0
1.5
5.0
2.0
—
—
—
—
—
—
—
—
1.6
1.6
1.6
1.6
Cob
—
—
700
pF
td
—
0.1
0.2
µs
tr
—
0.4
0.7
ts
—
1.55
2.3
tf
—
0.2
0.4
tsv
—
1.55
—
tfi
—
0.06
—
tsv
—
1.8
2.8
tc
—
0.3
0.6
tfi
—
0.17
0.35
BUS98
BUS98A
Collector–Emitter Saturation Voltage
(IC = 20 Adc, IB = 4 Adc)
(IC = 30 Adc, IB = 8 Adc)
(IC = 20 Adc, IB = 4 Adc, TC = 100C)
(IC = 16 Adc, IB = 3.2 Adc)
(IC = 24 Adc, IB = 5 Adc)
(IC = 16 Adc, IB = 3.2 Adc, TC = 100C)
VCE(sat)
BUS98
BUS98A
Base–Emitter Saturation Voltage
(IC = 20 Adc, IB = 4 Adc)
(IC = 20 Adc, IB = 4 Adc, TC = 100C)
(IC = 16 Adc, IB = 3.2 Adc)
(IC = 16 Adc, IB = 3.2 Adc, TC = 100C)
Vdc
VBE(sat)
BUS98
BUS98A
Vdc
DYNAMIC CHARACTERISTICS
Output Capacitance
(VCB = 10 Vdc, IE = 0, ftest = 100 kHz)
SWITCHING CHARACTERISTICS
Restive Load (Table 1)
Delay Time
Rise Time
Storage Time
Fall Time
(VCC = 250 Vdc,
Vdc IC = 20 A
A,
IB1 = 4.0 A, tp = 30 µs,
Duty Cycle 2%, VBE(off) = 5 V)
(for BUS98A: IC = 16 A,
A Ib1 = 3.2
3 2 A)
Inductive Load, Clamped (Table 1)
Storage Time
Fall Time
Storage Time
Crossover Time
Fall Time
IC(
C(pk)
k) = 20 A
Ib1 = 4 A
VBE(off) = 5 V,
VCE(c1)
( ) = 250 V)
IC(pk) = 16 A
)
lB1 = 3.2 A)
((BUS98))
(TC = 25C)
(BUS98A
((TC = 100C))
(1) Pulse Test: PW = 300 µs, Duty Cycle 2%.
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2
µs
BUS98 BUS98A
90%
50
hFE, DC CURRENT GAIN
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
DC CHARACTERISTICS
30
10%
20
10
5
3
2
VCE = 5 V
3
5
7
10
20
IC, COLLECTOR CURRENT (AMPS)
30
50
10
5
IC = 15 A
3
1
0.5
0.3
0.1
TC = 25°C
0.1
βf = 5
90%
10%
1
0.7
0.3
3
1
10
0.3
0.5
1
IB, BASE CURRENT (AMPS)
2
3
4
Figure 2. Collector Saturation Region
VBE, BASE EMITTER VOLTAGE (VOLTS)
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 1. DC Current Gain
0.1
IC = 20 A
IC = 10 A
βf = 5
2
TJ = 25°C
1
0.7
TJ = 100°C
0.5
0.3
0.1
20
0.3
1
3
IC, COLLECTOR CURRENT (AMPS)
IC, COLLECTOR CURRENT (AMPS)
Figure 3. Collector–Emitter Saturation Voltage
Figure 4. Base–Emitter Voltage
104
10
10k
103
102
101
Cib
C, CAPACITANCE (pF)
IC, COLLECTOR CURRENT (A)
µ
VCE = 250 V
TJ = 150°C
125°C
100°C
75°C
100
REVERSE
1k
100
Cob
FORWARD
25°C
10-1
-0.4
-0.2
0
0.2
0.4
10
0.6
TJ = 25°C
1
10
100
VBE, BASE-EMITTER VOLTAGE (VOLTS)
VR, REVERSE VOLTAGE (VOLTS)
Figure 5. Collector Cutoff Region
Figure 6. Capacitance
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3
1000
BUS98 BUS98A
Table 1. Test Conditions for Dynamic Performance
VCEO(sus)
RBSOA AND INDUCTIVE SWITCHING
RESISTIVE SWITCHING
-VC1
INPUT
CONDITIONS
+10 V
1
20
CIRCUIT
VALUES
1
0
2
IB1
MJE210
-10 V
2
1 µF
Lcoil = 180 µH
Rcoil = 0.05 Ω
VCC = 20 V
TURN–OFF TIME
Use inductive switching
driver as the input to
the resistive test circuit.
IC
1N4937
OR
EQUIVALENT
t1
Lcoil
Vclamp
VCE
2
VCE or
Vclamp
90% IC(pk)
trv
tfi
tti
tc
VCE
10% VCE(pk)
90% IB1
10%
IC pk
RESISTIVE TEST CIRCUIT
Lcoil (IC(pk))
VCC
1
Lcoil (IC(pk))
2
TUT
RL
VCC
Vclamp
Test Equipment
Scope — Tektronix
475 or Equivalent
20
VCE(pk)
2% IC
I B2(pk), BASE CURRENT (AMPS)
tsv
t
t2
TIME
90% VCE(pk)
t1 t2 VCC
IC pk
t
tf
Pulse Width = 10 µs
t1 Adjusted to
Obtain IC
tf Clamped
IC(pk)
Rcoil
SEE ABOVE FOR
DETAILED CONDITIONS
VCC = 250 V
Vclamp = 250 V
OUTPUT WAVEFORMS
TUT
IN
PUT
IC
50 µF
ADJUST VC2
TO OBTAIN
DESIRED IB2
Lcoil = 25 mH, VCC = 10 V
Rcoil = 0.7 Ω
1
IB1 adjusted to
obtain the forced
hFE desired
BUV20
INDUCTIVE TEST CIRCUIT
TEST CIRCUITS
50 µF
+10 V
PW Varied to Attain
IC = 100 mA
IB
0.1 µF
BUV20
TURN–ON TIME
ADJUST VC1
TO OBTAIN
DESIRED IB1
MJE200
12
8
4
0
TIME
βf = 5
IC = 20 A
16
0
Figure 7. Inductive Switching Measurements
1
2
3
4
5
VBE(off), BASE-EMITTER VOLTAGE (VOLTS)
Figure 8. Peak–Reverse Current
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4
6
BUS98 BUS98A
SWITCHING TIMES NOTE
In resistive switching circuits, rise, fall, and storage times
have been defined and apply to both current and voltage
waveforms since they are in phase. However, for inductive
loads which are common to SWITCHMODE power
supplies and hammer drivers, current and voltage
waveforms are not in phase. Therefore, separate
measurements must be made on each waveform to
determine the total switching time. For this reason, the
following new terms have been defined.
tsv = Voltage Storage Time, 90% IB1 to 10% Vclamp
trv = Voltage Rise Time, 10–90% Vclamp
tfi = Current Fall Time, 90–10% IC
tti = Current Tail, 10–2% IC
tc = Crossover Time, 10% Vclamp to 10% IC
An enlarged portion of the inductive switching
waveforms is shown in Figure 7 to aid in the visual identity
of these terms.
For the designer, there is minimal switching loss during
storage time and the predominant switching power losses
occur during the crossover interval and can be obtained
using the standard equation from AN–222:
PSWT = 1/2 VCCIC(tc) f
In general, trv + tfi tc. However, at lower test currents this
relationship may not be valid.
As is common with most switching transistors, resistive
switching is specified at 25C and has become a benchmark
for designers. However, for designers of high frequency
converter circuits, the user oriented specifications which
make this a “SWITCHMODE” transistor are the inductive
switching speeds (tc and tsv) which are guaranteed at
100C.INDUCTIVE SWITCHING
4
3
0.8
0.6
1
0.7
TC = 100°C
0.4
TC = 100°C
t, TIME (s)
µ
t, TIME (s)
µ
2
TC = 25°C
0.5
0.2
TC = 100°C
TC = 25°C
0.1
TC = 25°C
tc
tfi
βf = 5
βf = 5
2
4
6 8 10
20
IC, COLLECTOR CURRENT (AMPS)
30
2
Figure 9. Storage Time, tsv
3
2
3
2
0.5
0.3
tc
0.2
tfi
0.1
0.05
0.03
TC = 25°C
IC = 20 A
βf = 5
tsv
1
t, TIME (s)
µ
t, TIME (s)
µ
1
30
Figure 10. Crossover and Fall Times
TC = 25°C
IC = 20 A
VBE(off) = 5 V
tsv
4
6 8 10
20
IC, COLLECTOR CURRENT (AMPS)
0.5
0.3
0.2
tc
0.1
tfi
0.05
2
4
6
8
0.03
10
1
2
3
4
5
βf, FORCED GAIN
Ib2/Ib1
Figure 11. Turn–Off Times versus Forced Gain
Figure 12. Turn–Off TM Times versus Ib2/Ib1
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5
BUS98 BUS98A
The Safe Operating Area figures shown in Figures 12 and 13 are
specified for these devices under the test conditions shown.
SAFE OPERATING AREA INFORMATION
IC, COLLECTOR CURRENT (AMPS)
FORWARD BIAS
30
20
10
DC
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC – VCE
limits of the transistor that must be observed for reliable
operation, i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 13 is based on TC = 25C; TJ(pk) is
variable depending on power level. Second breakdown
pulse limits are valid for duty cycles to 10% but must be
derated when TC 25C. Second breakdown limitations do
not derate the same as thermal limitations. Allowable
current at the voltages shown on Figure 13 may be found at
any case temperature by using the appropriate curve on
Figure 15.
TJ(pk) may be calculated from the data in Figure 11. At
high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown.
1 ms
5
LIMIT
ONLY FOR
TURN ON
2
1
0.5
0.2
TC = 25°C
0.1
tr = 0.7 µs
BUS98
BUS98A
0.05
0.02
2
5
10
20
50
100 200
500 1000
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 13. Forward Bias Safe Operating Area
100
IC, COLLECTOR CURRENT (AMPS)
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases,
with the base to emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping, RC
snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Bias Safe Operating Area
and represents the voltage–current conditions during
reverse biased turn–off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 14 gives RBSOA characteristics.
80
60
BUS98
BUS98A
40
VBE(off) = 5 V
TC = 100°C
IC/IB1 ≥ 5
20
0
200
400
600
1000
800
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 14. Reverse Bias Safe Operating Area
POWER DERATING FACTOR (%)
100
SECOND BREAKDOWN
DERATING
80
60
THERMAL
DERATING
40
20
0
0
40
80
120
160
200
TC, CASE TEMPERATURE (°C)
Figure 15. Power Derating
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6
BUS98 BUS98A
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
1.0
0.5
0.2
0.1
D = 0.5
0.2
0.1
RθJC(t) = r(t) RθJC
RθJC = 0.7°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) RθJC(t)
0.05
SINGLE PULSE
0.01
0.1
1.0
10
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
100
1000
10000
t, TIME (ms)
Figure 16. Thermal Response
OVERLOAD CHARACTERISTICS
IC, COLLECTOR CURRENT (AMPS)
200
OLSOA
TC = 25°C
OLSOA applies when maximum collector current is
limited and known. A good example Is a circuit where an
inductor is inserted between the transistor and the bus, which
limits the rate of rise of collector current to a known value.
If the transistor is then turned off within a specified amount
of time, the magnitude of collector current is also known.
Maximum allowable collector–emitter voltage versus
collector current is plotted for several pulse widths. (Pulse
width is defined as the time lag between the fault condition
and the removal of base drive.) Storage time of the transistor
has been factored into the curve. Therefore, with bus voltage
and maximum collector current known, Figure 17 defines
the maximum time which can be allowed for fault detection
and shutdown of base drive.
OLSOA is measured in a common–base circuit (Figure
19) which allows precise definition of collector–emitter
voltage and collector current. This is the same circuit that is
used to measure forward–bias safe operating area.
160
120
tp = 10 µs
80
BUS98A
BUS98
40
0
400 450
100
200
300
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
500
Figure 17. Rated Overload Safe Operating Area
(OLSOA)
10
IC, (AMP)
8
6
RBE = 50 Ω
500 µF
500 V
RBE = 5 Ω
4
RBE = 1.1 Ω
2
Notes:
• VCE = VCC + VBE
• Adjust pulsed current source
for desired IC, tp
RBE = 0
0
2
4
6
dV/dt (KV/µs)
8
10
Figure 18. Figure 17. IC = f (dV/dt)
VCC
VEE
Figure 19. Overload SOA Test Circuit
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7
BUS98 BUS98A
PACKAGE DIMENSIONS
TO–204AA (TO–3)
CASE 1–07
ISSUE Z
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO-204AA OUTLINE SHALL APPLY.
A
N
C
–T–
E
D
K
2 PL
0.13 (0.005)
U
T Q
M
M
Y
DIM
A
B
C
D
E
G
H
K
L
N
Q
U
V
M
–Y–
L
V
SEATING
PLANE
2
H
G
B
M
T Y
1
–Q–
0.13 (0.005)
INCHES
MIN
MAX
1.550 REF
--1.050
0.250
0.335
0.038
0.043
0.055
0.070
0.430 BSC
0.215 BSC
0.440
0.480
0.665 BSC
--0.830
0.151
0.165
1.187 BSC
0.131
0.188
MILLIMETERS
MIN
MAX
39.37 REF
--26.67
6.35
8.51
0.97
1.09
1.40
1.77
10.92 BSC
5.46 BSC
11.18
12.19
16.89 BSC
--21.08
3.84
4.19
30.15 BSC
3.33
4.77
M
SWITCHMODE is a trademark of Semiconductor Components Industries, LLC.
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BUS98/D