DATA SHEET MOS FIELD EFFECT POWER TRANSISTORS 2SJ495 SWITCHING P-CHANNEL POWER MOS FET INDUSTRIAL USE DESCRIPTION PACKAGE DIMENSIONS This product is P-Channel MOS Field Effect Transistor (in millimeter) designed for high current switching applications. 10.0 ± 0.3 3.2 ± 0.2 4.5 ± 0.2 2.7 ± 0.2 FEATURES 4 ± 0.2 • Built-in Gate Protection Diode ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Drain to Source Voltage VDSS –60 V Gate to Source Voltage* VGSS(AC) m20 V Gate to Source Voltage VGSS(DC) –20, 0 V 0.7 ± 0.1 2.54 ID(DC) m30 A ID(pulse) m120 A Total Power Dissipation (TC = 25°C) PT 35 W Total Power Dissipation (TA = 25°C) PT 2.0 W Channel Temperature Tch 150 °C Storage Temperature Tstg –55 to +150 °C Drain Current (DC) Drain Current (pulse)** 12.0 ± 0.2 RDS(on)2 = 56 mΩ MAX. (VGS = –4 V, ID = –15 A) • Low Ciss Ciss = 4120 pF TYP. 13.5 MIN. RDS(on)1 = 30 mΩ MAX. (VGS = –10 V, ID = –15 A) 3 ± 0.1 15.0 ± 0.3 • Super Low On-State Resistance 1.3 ± 0.2 1.5 ± 0.2 2.54 2.5 ± 0.1 0.65 ± 0.1 1. Gate 2. Drain 3. Source 1 2 3 *f = 20 kHz, Duty Cycle ≤ 10% (+Side) **PW ≤ 10 µs, Duty Cycle ≤ 1% THERMAL RESISTANCE MP-45F (ISOLATED TO-220) Channel to Case Rth(ch-c) 3.57 °C/W Channel to Ambient Rth(ch-A) 62.5 °C/W Drain Body Diode Gate Gate Protection Diode Source The diode connected between the gate and source of the transistor serves as a protector against ESD. When this deveice acutally used, an addtional protection circiut is externally required if a voltage exceeding the rated voltage may be applied to this device. Document No. D11267EJ2V0DS00 (2nd edition) Date Published November 1997 N Printed in Japan © 1997 2SJ495 ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS SYMBOL Drain to Source On–state Resistance RDS(on)1 TYP. MAX. UNIT VGS = –10 V, ID = –15 A 24 30 mΩ RDS(on)2 VGS = –4 V, ID = –15 A 38 56 mΩ Gate to Source Cutoff Voltage VGS(off) VDS = –10 V, ID = –1 mA –1.0 –1.5 –2.0 V Forward Transfer Admittance | yfs | VDS = –10 V, ID = –15 A 12 24 Drain Leakage Current IDSS VDS = –60 V, VGS = 0 –10 µA Gate to Source Leakage Current IGSS VGS = m 20 V, VDS = 0 m10 µA Input Capacitance Ciss VDS = –10 V 4120 pF Output Capacitance COSS VGS = 0 1750 pF Reverse Transfer Capacitance Crss f = 1 MHz 580 pF Turn-On Delay Time td(on) ID = –15 A 40 ns VGS(on) = –10 V 220 ns VDD = –30 V 600 ns tf RG = 10 Ω 380 ns Total Gate Charge QG ID = –30 A 140 nC Gate to Source Charge QGS VDD = –48 V 12 nC Gate to Drain Charge QGD VGS = –10 V 46 nC VF(S-D) IF = 30 A, VGS = 0 0.8 Reverse Recovery Time trr IF = 30 A, VGS = 0 160 ns Reverse Recovery Charge Qrr di/dt = 100 A/µs 400 nC Rise Time tr Turn-Off Delay Time td(off) Fall Time Body Diode Forward Voltage TEST CONDITIONS Test Circuit 1 Switching Time MIN. RL VGS VGS RG RG = 10 Ω Wave Form VGS(on) 10 % D ID Wave Form t t = 1 µs Duty Cycle ≤ 1% 2 90 % PG. VDD 90 % ID VGS 0 1.5 V Test Circuit 2 Gate Charge D.U.T. PG. S 90 % 0 ID 10 % td(on) ton tr 10 % td(off) tf toff D.U.T. IG = 2 mA RL 50 Ω VDD 2SJ495 DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. CASE TEMPERATURE PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 35 100 80 60 40 20 0 20 40 60 80 30 25 20 15 10 5 0 100 120 140 160 20 40 60 80 100 120 140 160 TC - Case Temperature - °C TC - Case Temperature - °C FORWARD BIAS SAFE OPERATING AREA DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE –1000 Pulsed –125 VGS = –10 V d ite ) Lim 0 V ( =1 S S R D VG t (a ID - Drain Current - A –100 50 0 1 m ) on s ID(DC) 10 s µ ID - Drain Current - A ID(pulse) m s 10 0 Po we –10 iss DC ipa tio n –75 –50 VGS = –4 V –25 Lim ite TC = 25°C Single Pulse –1 –0.1 m s rD –100 d –1 –10 –100 VDS - Drain to Source Voltage - V 0 –2 –4 –6 –8 VDS - Drain to Source Voltage - V FORWARD TRANSFER CHARACTERISTICS ID - Drain Current - A –1000 –100 Pulsed Tch = –25°C 25°C 125°C –10 –1 0 –2 –4 VDS = –10 V –6 –8 VGS - Gate to Source Voltage - V 3 2SJ495 TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - °C/W 1 000 Rth(ch-a) = 62.5°C/W 100 10 Rth(ch-c) = 3.57°C/W 1 0.1 0.01 Single Pulse 0.001 10 µ 100 µ 1m 10 m 100 m 1 10 100 1 000 1000 100 VDS = –10 V Pulsed Tch=–25°C 25°C 75°C 125°C 10 1 –1 –10 –100 –1000 RDS(on) - Drain to Source On-State Resistance - mΩ ID- Drain Current - A 80 Pulsed 60 VGS = –4 V 40 VGS = –10 V 20 0 –1 –10 ID - Drain Current - A 4 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 150 Pulsed 100 50 ID = –15 A 0 –100 –10 –20 –30 VGS - Gate to Source Voltage - V DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE VGS(off) - Gate to Source Cutoff Voltage - V | yfs | - Forward Transfer Admittance - S FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT RDS(on) - Drain to Source On-State Resistance - mΩ PW - Pulse Width - s VDS = –10 V ID = –1 mA –2.0 –1.5 –1.0 –0.5 0 –50 0 50 100 150 Tch - Channel Temperature - °C SOURCE TO DRAIN DIODE FORWARD VOLTAGE DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE Pulsed 80 VGS = –4 V 60 VGS=-10 V 40 20 ISD - Diode Forward Current - A –1000 –100 VGS = –4 V –10 VGS = 0 –1 ID = –15 A 0 –50 0 50 100 0 150 Tch - Channel Temperature - °C td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF SWITCHING CHARACTERISTICS 1 000 VGS = 0 f = 1 MHz 10000 Ciss Coss 1000 Crss 100 –0.1 –1 –10 –100 100 td(off) tf 10 tr td(on) 1 –0.1 –1 VDS - Drain to Source Voltage - V VDS - Drain to Source Voltage - V trr - Reverse Recovery Time - ns di/dt = 50 A/ µs VGS = 0 100 10 1 –0.1 –1 –10 IF - Diode Current - A VDD = –30 V VGS = –10 V RG =10 Ω –10 –100 ID - Drain Current - A REVERSE RECOVERY TIME vs. DRAIN CURRENT 1000 –3.0 VSD - Source to Drain Voltage - V CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 100000 –2.0 –1.0 –100 DYNAMIC INPUT/OUTPUT CHARACTERISTICS –80 ID = –30A –14 –60 –40 VGS –12 –10 VDD=–48 V –30 V –15 V –8 –6 –4 –20 –2 VDS 0 40 80 120 160 0 QG - Gate Charge - nC 5 VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-State Resistance - mΩ 2SJ495 2SJ495 Document Name 6 Document No. NEC semicondacter device reliabilty/quality control system C11745E Power MOS FET features and application to switching power supply D12971E Application circuits using Power MOS FET TEA-1035 Safe operating area of Power MOS FET TEA-1037 Guide to prevent damage for semiconductor devices by electrostatic discharge (EDS) C11892E 2SJ495 [MEMO] 7 2SJ495 No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. 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Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96.5