ONSEMI NTLJS4149PTAG

NTLJS4149P
Power MOSFET
-30 V, -5.9 A, mCoolt Single P-Channel,
2x2 mm, WDFN Package
Features
•WDFN Package with Exposed Drain Pad for Excellent Thermal
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Conduction
•2x2 mm Footprint Same as SC-88 Package
•Low Profile (< 0.8 mm) for Easy Fit in Thin Environments
•This is a Pb-Free Device
V(BR)DSS
RDS(on) MAX
62 mW @ -4.5 V
-30 V
75 mW @ -2.5 V
Applications
S
•Li Ion Battery Linear Mode Charging for Portable Power
Management in Noisy Environment
•DC-DC Conversion Buck/Boost Circuits
•High Side Switching
G
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Value
Unit
VDSS
-30
V
±12
V
-4.5
A
VGS
Steady
State
TA = 25°C
t≤5s
TA = 25°C
Steady
State
TA = 85°C
ID
Power Dissipation
(Note 2)
Pulsed Drain Current
Steady
State
TA = 85°C
W
TA = 25°C
tp = 10 ms
PD
-2.7
Pin 1
A
W
PIN CONNECTIONS
6
5
4
-2.0
0.7
IDM
-18
A
TJ, TSTG
-55 to
150
°C
Source Current (Body Diode) (Note 2)
IS
-1.5
A
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Operating Junction and Storage Temperature
1
2 J9MG
G
3
J9 = Specific Device Code
M = Date Code
G
= Pb-Free Package
(Note: Microdot may be in either location)
PD
ID
MARKING
DIAGRAM
D
WDFN6
CASE 506AP
3.2
TA = 25°C
S
-3.3
1.9
TA = 25°C
P-CHANNEL MOSFET
-5.9
t≤5s
Continuous Drain
Current (Note 2)
D
Symbol
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
2. Surface Mounted on FR4 Board using the minimum recommended pad size.
D
1
D
2
G
3
D
S
6
D
5
D
4
S
(Top View)
ORDERING INFORMATION
Device
Package
Shipping†
NTLJS4149PTAG
WDFN6
(Pb-Free)
3000/Tape & Reel
NTLJS4149PTBG
WDFN6
(Pb-Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2007
July, 2007 - Rev. 0
1
Publication Order Number:
NTLJS4149P/D
NTLJS4149P
THERMAL RESISTANCE RATINGS
Symbol
Max
Unit
Junction-to-Ambient – Steady State (Note 3)
Parameter
RqJA
65
°C/W
Junction-to-Ambient – t ≤ 5 s (Note 3)
RqJA
38
Junction-to-Ambient – Steady State Min Pad (Note 4)
RqJA
180
3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surface Mounted on FR4 Board using the minimum recommended pad size.
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
-30
Typ
Max
Unit
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = -250 mA
Drain-to-Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
ID = -250 mA, Ref to 25°C
Zero Gate Voltage Drain Current
IDSS
VDS = -24 V, VGS = 0 V
mV/°C
TJ = 25°C
-0.1
-1.0
TJ = 85°C
-1.0
-10
IGSS
VDS = 0 V, VGS = ±12 V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = -250 mA
Negative Threshold
Temperature Coefficient
VGS(TH)/TJ
Gate-to-Source Leakage Current
V
-1.8
±0.1
mA
mA
ON CHARACTERISTICS (Note 5)
Drain-to-Source On-Resistance
RDS(on)
Forward Transconductance
gFS
-0.4
-1.0
3.1
V
mV/°C
VGS = -4.5 V, ID = -2.0 A
43
62
VGS = -2.5 V, ID = -2.0 A
56
75
VGS = -4.5 V, ID = -4.5 A
43
62
VDS = -6.0 V, ID = -3.0 A
10
S
960
pF
mW
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
VGS = 0 V, f = 1.0 MHz,
VDS = -15 V
130
CRSS
80
Total Gate Charge
QG(TOT)
9.9
Threshold Gate Charge
QG(TH)
Gate-to-Source Charge
QGS
Gate-to-Drain Charge
QGD
2.75
td(ON)
6.9
VGS = -4.5 V, VDS = -15 V,
ID = -2.0 A
15
nC
0.8
1.45
SWITCHING CHARACTERISTICS (Note 6)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
tr
td(OFF)
VGS = -4.5 V, VDS = -15 V,
ID = -2.0 A, RG = 2.0 W
tf
ns
11
60
55
DRAIN-SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
-0.75
TJ = 85°C
-0.65
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V, IS = -1.5 A
35
VGS = 0 V, dIS/dt = 100 A/ms,
IS = -1.5 A
QRR
10
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2
V
60
ns
25
0.016
5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
-1.2
mC
NTLJS4149P
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
10
VGS = -1.9 V to -7 V
-1.8 V
TJ = 25°C
-1.7 V
VDS ≥ -10 V
-ID, DRAIN CURRENT (AMPS)
-ID, DRAIN CURRENT (AMPS)
10
8
6
-1.6 V
-1.5 V
4
-1.4 V
-1.3 V
2
-1.2 V
-1.1 V
2
3
4
5
4
TJ = 100°C
TJ = 25°C
2
TJ = -55°C
1
2.5
2
3
-VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.2
ID = -2.0 A
TJ = 25°C
0.15
0.1
0.05
0
1
2
3
4
5
6
0.07
TJ = 25°C
0.06
VGS = -2.5 V
0.05
0.04
0.03
VGS = -4.5 V
1
2
3
-VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
4
5
6
7
8
9
10
-ID, DRAIN CURRENT (AMPS)
Figure 3. On-Resistance versus
Gate-to-Source Voltage
Figure 4. On-Resistance versus Drain Current
and Gate Voltage
100000
1.6
VGS = 0 V
ID = -2.0 A
VGS = -4.5 V
1.4
-IDSS, LEAKAGE (nA)
RDS(on), DRAIN-TO-SOURCE RESISTANCE
(NORMALIZED)
1.5
-VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
1
6
0
0.5
0
0
8
1.2
1.0
10000
TJ = 150°C
1000
0.8
0.6
-50
TJ = 100°C
-25
0
25
50
75
100
125
150
100
0
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
-VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 5. On-Resistance Variation with
Temperature
Figure 6. Drain-to-Source Leakage Current
versus Voltage
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3
30
NTLJS4149P
C, CAPACITANCE (pF)
VDS = 0 V
VGS = 0 V
TJ = 25°C
Ciss
1800
1200
Crss
600
Coss
0
10
5
0
5
-VGS
-VDS
10
15
20
25
QT
4
16
VDS
VGS
3
12
QGS
2
QGD
8
1
4
ID = -4.5 A
TJ = 25°C
0
30
0
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
2
6
4
8
QG, TOTAL GATE CHARGE (nC)
0
10
Figure 8. Gate-To-Source and Drain-To-Source
Voltage versus Total Charge
100
-Is, SOURCE CURRENT (AMPS)
8
VDD = -24 V
ID = -2.0 A
VGS = -4.5 V
t, TIME (ns)
20
5
-V DS , DRAIN-TO-SOURCE VOLTAGE (VOLTS)
2400
-V GS, GATE-TO-SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
td(off)
tf
tr
10
td(on)
10
RG, GATE RESISTANCE (OHMS)
100
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
VGS = 0 V
TJ = 25°C
6
5
4
3
2
1
0
0.2
1
1
7
0.4
0.8
0.6
1.0
-VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
1.2
Figure 10. Diode Forward Voltage versus Current
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4
NTLJS4149P
PACKAGE DIMENSIONS
WDFN6 2x2
CASE 506AP-01
ISSUE B
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND
IS MEASURED BETWEEN 0.15 AND 0.20mm FROM
TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS
WELL AS THE TERMINALS.
5. CENTER TERMINAL LEAD IS OPTIONAL. TERMINAL
LEAD IS CONNECTED TO TERMINAL LEAD # 4.
6. PINS 1, 2, 5 AND 6 ARE TIED TO THE FLAG.
A
B
ÍÍÍ
ÍÍÍ
ÍÍÍ
E
PIN ONE
REFERENCE
DIM
A
A1
A3
b
b1
D
D2
E
E2
e
K
L
L2
J
J1
0.10 C
2X
0.10 C
2X
A3
0.10 C
A
0.08 C
7X
A1
C
D2
6X
SEATING
PLANE
4X
SOLDERMASK DEFINED
MOUNTING FOOTPRINT*
e
L2
L
1
3
2.30
b1
6X
0.10 C A
E2
1.10
B
4
b
1
6X
J
J1
0.60
1.25
0.10 C A
0.05 C
0.35
0.43
NOTE 5
6
6X
6X
0.05 C
K
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.25
0.35
0.51
0.61
2.00 BSC
1.00
1.20
2.00 BSC
1.10
1.30
0.65 BSC
0.15 REF
0.20
0.30
0.20
0.30
0.27 REF
0.65 REF
B
0.35
NOTE 3
BOTTOM VIEW
0.34
0.65
PITCH
0.66
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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NTLJS4149P/D