TRIQUINT AGR19030EF

AGR19030EF
30 W, 1930 MHz—1990 MHz, PCS LDMOS RF Power Transistor
Introduction
The AGR19030EF is a 30 W, 28 V N-channel laterally diffused metal oxide semiconductor (LDMOS) RF
power field effect transistor (FET) suitable for personal communication service (PCS) (1930 MHz—
1990 MHz), global system for mobile communication
(GSM/EDGE), time division multiple access (TDMA),
and single-carrier or multicarrier class AB power
amplifier applications.
GSM Features
Typical performance over entire GSM band:
— P1dB: 30 W typical.
— Continuous wave (CW) power gain: @ P1dB =
15 dB.
— CW efficiency @ P1dB = 55% typical.
— Return loss: –12 dB.
Device Performance Features
High-reliability, gold-metalization process.
Low hot carrier injection (HCI) induced bias drift
over 20 years.
Figure 1. AGR19030EF (flanged) Package
Internally matched.
High gain, efficiency, and linearity.
N-CDMA Features
Typical 2 carrier N-CDMA performance: VDD =
28 V, IDQ = 350 mA, f1 = 1958.75 MHz, f2 =
1961.25 MHz, IS-95 CDMA (pilot, sync, paging,
traffic codes 8—13). Peak/average (P/A) = 9.72 dB
at 0.01% probability on CCDF. 1.2288 MHz transmission bandwidth (BW). Adjacent channel power
ratio (ACPR) measured over 30 kHz BW at f1 –
885 kHz and f2 + 885 kHz. Third-order intermodulation distortion (IM3) measured over a
1.2288 MHz BW at f1 – 2.5 MHz and f2 + 2.5 MHz.
— Output power (POUT): 6 W.
— Power gain: 16 dB.
— Efficiency: 24.8%.
— IM3: –34.5 dBc.
— ACPR: –49 dBc.
EDGE Features
Typical EDGE performance, 1960 MHz, 26 V,
IDQ = 250 mA:
— Output power (POUT): 12 W typical.
— Power gain: 15.5 dB.
— Efficiency: 38% typical.
— Modulation spectrum:
@ ±400 kHz = –61 dBc.
@ ±600 kHz = –74 dBc.
— Error vector magnitude (EVM) = 2.2%
Integrated ESD protection.
Device can withstand 10:1 voltage standing wave
ratio (VSWR) at 28 Vdc, 1930 MHz, 30 W CW
output power.
Large signal impedance parameters available.
ESD Rating*
AGR19030EF
HBM
MM
CDM
Minimum (V)
500
50
1500
Class
1B
A
4
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
during all handling, assembly, and test operations. PEAK
Agere Devices
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
Caution: MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be
observed.
AGR19030EF
30 W, 1930 MHz—1990 MHz, PCS LDMOS RF Power Transistor
Electrical Characteristics
Table 1. Thermal Characteristics
Parameter
Thermal Resistance, Junction to Case
Symbol
RθJC
Value
2.0
Unit
°C/W
Symbol
VDSS
VGS
PD
—
TJ
TSTG
Value
65
–0.5, 15
87.5
0.5
200
–65, 150
Unit
Vdc
Vdc
W
W/°C
°C
°C
Table 2. Absolute Maximum Ratings*
Parameter
Drain-source Voltage
Gate-source Voltage
Total Dissipation at TC = 25 °C
Derate Above 25 °C
Operating Junction Temperature
Storage Temperature Range
* Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only.
Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the
data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability.
Recommended operating conditions apply unless otherwise specified: TC = 30 °C.
Table 3. dc Characteristics
Parameter
Off Characteristics
38 µA)
Drain-source Breakdown Voltage (VGS = 0 V, ID = 150
Gate-source Leakage Current (VGS = 5 V, VDS = 0 V)
Zero Gate Voltage Drain Leakage Current (VDS = 28 V, VGS = 0 V)
On Characteristics
Forward Transconductance (VDS = 10 V, ID = 0.4 A)
Gate Threshold Voltage (VDS = 10 V, ID = 100 µA)
Gate Quiescent Voltage (VDS = 28 V, ID = 300 mA)
Drain-source On-voltage (VGS = 10 V, ID = 0.4 A)
Symbol
Min
Typ
Max
Unit
V(BR)DSS
IGSS
IDSS
65
—
—
—
—
—
—
1
50
3
Vdc
µAdc
µAdc
GFS
—
—
—
—
2.4
—
3.8
0.3
—
4.8
—
—
S
Vdc
Vdc
Vdc
VGS(TH)
VGS(Q)
VDS(ON)
AGR19030EF
30 W, 1930 MHz—1990 MHz, PCS LDMOS RF Power Transistor
Electrical Characteristics (continued)
Recommended operating conditions apply unless otherwise specified: TC = 30 °C.
Table 4. RF Characteristics
Parameter
Dynamic Characteristics
Symbol
Min
Typ
Max Unit
CRSS
—
0.8
—
pF
Reverse Transfer Capacitance
(VDS = 28 V, VGS = 0, f = 1.0 MHz)
(This part is internally matched on both the input and output.)
Test Fixture)
Functional Tests (in Supplied
Agere Systems
Supplied Test Fixture)
GPS
15.5
16
—
dB
Common-source Amplifier Power Gain
(VDD = 28 Vdc, POUT = 6 W Avg., 2-carrier N-CDMA, IDQ = 350 mA,
f1 = 1930 MHz, f2 = 1932.5 MHz, and f1 = 1987.5 MHz, f2 = 1990 MHz)
Drain Efficiency
η
—
24.8 —
%
(VDD = 28 Vdc, POUT = 6 W Avg., 2-carrier N-CDMA, IDQ = 350 mA,
f1 = 1930 MHz, f2 = 1932.5 MHz, and f1 = 1987.5 MHz, f2 = 1990 MHz)
Third-order Intermodulation Distortion
IM3
— –34.5 — dBc
(VDD = 28 Vdc, POUT = 6 W Avg., 2-carrier N-CDMA, IDQ = 350 mA,
f1 = 1930 MHz, f2 = 1932.5 MHz, and f1 = 1987.5 MHz, f2 = 1990 MHz;
IM3 measured in a 1.2288 integration BW centered at f1 – 2.5 MHz and
f2 + 2.5 MHz, referenced to the carrier channel power)
ACPR
— –49.0 — dBc
Adjacent Channel Power Ratio
(VDD = 28 Vdc, POUT = 6 W Avg., 2-carrier N-CDMA, IDQ = 350 mA,
f1 = 1930 MHz, f2 = 1932.5 MHz, and f1 = 1987.5 MHz, f2 = 1990 MHz;
IM3 measured in a 1.2288 integration BW centered at f1 – 2.5 MHz and
f2 + 2.5 MHz, referenced to the carrier channel power)
P1dB
30
35
—
W
Output Power at 1 dB Gain Compression
(VDD = 28 V, POUT = 30 W CW, f = 1990 MHz, IDQ = 350 mA)
IRL
—
–12
—
dB
Input Return Loss
(VDD = 28 Vdc, POUT = 6 W Avg., 2-carrier N-CDMA, IDQ = 350 mA,
f1 = 1930 MHz, f2 = 1932.5 MHz, and f1 = 1987.5 MHz, f2 = 1990 MHz)
Ruggedness
Ψ
No degradation in output
(VDD = 28 V, POUT = 30 W CW, IDQ = 350 mA, f = 1930 MHz, VSWR =
power.
10:1 [all phase angles])
AGR19030EF
30 W, 1930 MHz—1990 MHz, PCS LDMOS RF Power Transistor
Test Circuit Illustrations for AGR19030EF
VDD
FB1
VGG
+
R1
+
C1
C2
C3
Z1
Z11
C4
Z2
C6
Z3
C22
Z12
Z7
Z5
Z6
2
1
3
RF INPUT C7
+
C23 C12 C13 C14 C15 C16 C17 C18 C19
C5
Z4
+
DUT
Z8
Z9
C20
Z10
RF OUTPUT
PINS: 1. DRAIN, 2. GATE, 3. SOURCE
A. Schematic
2
3
1
B. Component Layout
Parts List:
■ Microstrip line: Z1, 0.315 in. x 0.067 in.; Z2, 0.195 in. x 0.067 in.; Z3, 0.345 in. x 0.067 in.; Z4, 0.230 in. x 0.260 in.; Z5, 0.200 in. x 0.160 in.;
Z6, 0.395 in. x 0.675 in.; Z7, 0.355 in. x 0.640 in.; Z8, 0.645 in. x 0.130 in.; Z9, 0.145 in. x 0.067 in.; Z10, 0.535 in. x 0.067 in;
Z11, 0.345 in. x 0.030 in; Z12, 0.275 in. x 0.050 in.
®
■ ATC B case chip capacitors: C5, C22: 8.2 pF 100B8R2JCA500X; C6, C20: 10 pF 100B100JCA500X; C12: 100 pF 102B100JCA500X;
C13: 1000 pF 103B100JCA500X.
®
■ Kemet B case chip capacitors: C2, C16: 0.10 µF CDR33VX104AKWS; tantalum capacitor: C17: 1 µF 50 V T491C.
®
■ Vitramon 1206: C4, C14: 22000 µF.
®
■ Sprague tantalum SMT (35 V): C1, C19, C23: 22 µF; C18: 10 µF.
®
■ Murata 0805: C3, C15: 0.01 µF, GRM40X7R103K100AL.
®
■ Johanson Giga-Trim variable capacitors: C7, 0.4 pF—2.5 pF.
®
■ Fair-Rite ferrite bead: FB1: 2743019447.
■ Fixed film chip resistor: R1: 12 Ω, 0.25 W, 0.08 x 0.13.
■ PCB etched circuit boards
®
■ Taconic ORCER RF-35: board material, 1 oz. copper, 30 mil thickness, εr = 3.5.
Figure 2. AGR19030EF Test Circuit
AGR19030EF
30 W, 1930 MHz—1990 MHz, PCS LDMOS RF Power Transistor
0.6
90
IN D
0.
0.0 Ð > W A V EL E
N GTH
S TOW
A RD
0.0
0.49
0.48
170
8
10
0.1
0.4
20
Ð
50
20
10
5.0
4.0
3.0
2.0
1.8
1.6
1.4
1.2
0.9
0.8
0.7
0.6
0.5
0.4
1.0
50
ZL
0
-90
-1
06
-70
40
5
0.
2.
0.1
-65
1.8
0.
07
30
-1
43
0.
8
0.0
2
0.4
0.4
1
0.4
0.39
0.38
F
0.37
0.12
0.6
1.6
0.11
-100
-90
0.13
-60
1.4
1.2
1.0
0.9
5
0.36
9
0.0
5
,O
o)
-4
0.14
-80
0.35
-110
0
-12
-80
1.
0
IV
CT
0
-4
0.15
0
-70
-5
6
4
-75
IN
0.7
0.1
0.3
0.8
35
5
3
-60
-5
0.3
7
VE
0.0
Z
X/
0.1
CA P
AC
I TI
(-j
-160
-85
)
/ Yo
(-jB
CE
R
0.2
-30
32
CE
CO
M
T
V
AN
PT
CE
US
ES
DU
18
0.
RE
AC
TA
N
EN
0.
0
-5
-25
0.
PO
N
0.
0.4
0
0.6
0
-20
31
0.
19
0.
44
0.8
3.
0.3
.45
4.0
WA
0
1.
-15
<Ð
0.2
8
0.2
0
-4
4
0.
0.2
2
f1
-30
6
0.4
4
0.0
0
-15
8
0.
5.0
0.48
0.6
0.2
9
0.2
1
0.3
ZS
f3
f1
f3
-10
0.2
0.4
10
0.1
-20
D L OA D <
OW A R
HST
N GT
-170
EL E
0.2
20
0.49
0.3
0.2
± 180
0.1
0.2
50
RESISTANCE COMPONENT (R/Zo), OR CONDUCTANCE COMPONENT (G/Yo)
7
0.4
0.25
0.26
0.24
0.27
0.23
0.25
0.24
0.26
0.23
0.27
L ECTI ON COEFFI CI EN
T
F
E
I
N
R
D
E
GREE
L E OF
S
ANG
I SSI ON COEFFI CI EN T I N
TRA N SM
D EGR
EES
L E OF
ANG
Z0 = 20 Ω
U CT
Typical Performance Characteristics
MHz (f)
1930 (f1)
1960 (f2)
1990 (f3)
Note:
ZL Ω
ZS Ω
(Complex Source Impedance) (Complex Optimum Load Impedance)
4.49 – j6.43
10.00 – j6.30
4.06 – j5.98
9.65 – j6.25
3.78 – j5.61
9.44 – j6.33
ZL was chosen based on trade-offs between gain, output power, drain efficiency, and intermodulation distortion.
GATE (2)
ZS
DRAIN (1)
ZL
SOURCE (3)
INPUT MATCH
DUT
OUTPUT MATCH
Figure 3. Series Equivalent Input and Output Impedances
AGR19030EF
30 W, 1930 MHz—1990 MHz, PCS LDMOS RF Power Transistor
Typical Performance Characteristics (continued)
50
17
P1dB = 45.74 dBm (37.50 W)
GPS
16
15
45
13
40
P3dB = 46.59 dBm (45.60 W)
35
12
11
P OUT
GPS (dB)Z
POUT (dBm)Z
14
10
30
9
8
25
10
15
20
25
30
35
7
PIN (dBm)?
Test Conditions:
VDD = 28 Vdc, IDQ = 350 mA, pulsed CW, 4 µs (on), 40 µs (off), center frequency = 1960 MHz.
Figure 4. CW POUT vs. PIN
50
Ƨ
45
-30
-35
885 kHz
35
-40
30
-45
25
2.25 MHz
20
-50
1.25 MHz
-55
15
-60
GPS
10
-65
5
0
ACPR (dBc)Z
Ƨ (%)Z
40
GPS (dB),
-25
-70
25
30
35
40
45
-75
POUT (dBm) Avg.Z
Test Conditions:
VDD = 28 Vdc, IDQ = 350 mA, f = 1960 MHz, N-CDMA, 2.5 MHz @ 1.2288 MHz BW, P/A = 9.72 dB @ 0.01% probability (CCDF), channel spacing (BW) 885 kHz (30 kHz), 1.25 MHz (12.5 kHz), 2.25 MHz (1 MHz).
Figure 5. N-CDMA ACPR, Power Gain, and Drain Efficiency vs. POUT
AGR19030EF
30 W, 1930 MHz—1990 MHz, PCS LDMOS RF Power Transistor
Typical Performance Characteristics (continued)
-10
60
55
IM3
Ƨ (%)Z
45
GPS (dB),
-20
GPS
40
-30
35
-40
30
25
-50
20
15
10
5
0
30
35
-60
Ƨ
ACP
POUT (W)Z
IM3 (dBc), ACPR (dBc)Z
50
40
45
-70
Test Conditions:
VDD = 28 Vdc, IDQ = 350 mA, f1 = 1958.75 MHz, f2 = 1961.25 MHz, 2 x N-CDMA, 2.5 MHz @ 1.2288 MHz BW, P/A = 9.72 dB @ 0.01% probability (CCDF), channel spacing (BW) ACPR: 885 kHz (30 kHz), IM3: 2.5 MHz (1.2288 MHz).
Figure 6. 2-Carrier N-CDMA ACPR, IM3 Power Gain, and Drain Efficiency vs. POUT
18
GPS (dB)Z
17
IDQ = 450 mA
IDQ = 400 mA
16
IDQ = 350 mA
IDQ = 300 mA
IDQ = 250 mA
15
14
13
25
30
35
40
POUT (dBm)Z
Test Conditions:
VDD = 28 Vdc, f1 = 1958.75 MHz, f2 = 1961.25 MHz, 2 carrier N-CDMA measurement.
Figure 7. 2-Carrier N-CDMA Power Gain vs. POUT
45
AGR19030EF
30 W, 1930 MHz—1990 MHz, PCS LDMOS RF Power Transistor
Typical Performance Characteristics (continued)
-30
-35
ACPR (dBc)Z
-40
-45
-50
IDQ = 250 mA
-55
IDQ = 300 mA
-60
IDQ = 400 mA
-65
-70
IDQ = 450 mA
IDQ = 350 mA
30
35
40
45
40
45
POUT (dBm)Z
Test Conditions:
VDD = 28 Vdc, f1 = 1958.75 MHz, f2 = 1961.25 MHz, 2 carrier N-CDMA measurement.
Figure 8. ACPR vs. POUT
-15
-20
IM3 (dBc)Z
-25
-30
-35
IDQ = 250 mA
-40
IDQ = 300 mA
-45
IDQ = 400 mA
-50
-55
IDQ = 450 mA
IDQ = 350 mA
30
35
POUT (dBm)Z
Test Conditions:
VDD = 28 Vdc, f1 = 1958.75 MHz, f2 = 1961.25 MHz, 2 carrier N-CDMA measurement.
Figure 9. IM3 vs. POUT
AGR19030EF
30 W, 1930 MHz—1990 MHz, PCS LDMOS RF Power Transistor
55
-25
50
-30
45
-35
Ƨ
40
-40
35
-45
400 kHz
30
-50
25
-55
GPS
20
-60
15
-65
10
600 kHz
EVM
5
0
0
5
10
-70
15
20
-75
25
SPECTRAL REGROWTH (dBc)Z
GPS (dB),
Ƨ (%), EVM (%) Z
Typical Performance Characteristics (continued)
-80
POUT (W) Avg.Z
Test Conditions:
VDD = 26 Vdc, IDQ = 250 mA, f = 1960 MHz, modulation = GSM/EDGE.
55
-25
50
-30
45
-35
Ƨ
40
35
-40
-45
400 kHz
30
-50
25
-55
20
GPS
15
-65
600 kHz
10
-70
5
0
-60
-75
EVM
0
5
10
15
20
25
SPECTRAL REGROWTH (dBc)Z
GPS (dB),
Ƨ (%), EVM (%) Z
Figure 10. GSM/EDGE Power Gain, Drain Efficiency, Spectral Regrowth, and EVM vs. POUT
-80
P OUT (W) Avg.Z
Test Conditions:
VDD = 28 Vdc, IDQ = 250 mA, f = 1960 MHz, modulation = GSM/EDGE.
Figure 11. GSM/EDGE Power Gain, Drain Efficiency, Spectral Regrowth, and EVM vs. POUT
AGR19030EF
30 W, 1930 MHz—1990 MHz, PCS LDMOS RF Power Transistor
Package Dimensions
All dimensions are in inches. Tolerances are ±0.005 in. unless specified.
AGR19030EF
PINS:
1. DRAIN
2. GATE
3. SOURCE
1
1
PEAK DEVICES
AGR19030XF
AGR18030F
YYWWLL XXXXX
YYWWLL
ZZZZZZZ
3
3
ZZZZZZZ
2
2
Label Notes:
■ M before the part number denotes model program. X before the part number denotes engineering prototype.
■
■
■
■
The last two letters of the part number denote wafer technology and package type.
YYWWLL is the date code including place of manufacture: year year work week (YYWW), LL = location (AL = Allentown, PA; T = Thailand).
XXXXX = five-digit wafer lot number.
ZZZZZZZ = seven-digit assembly lot number on production parts.
ZZZZZZZZZZZZ = 12-digit (five-digit lot, two-digit wafer, and five-digit serial number) on models and engineering prototypes.