AGR09030E 30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET Introduction Table 1. Thermal Characteristics The AGR09030E is a high-voltage, gold-metalized, laterally diffused metal oxide semiconductor (LDMOS) RF power transistor suitable for cellular band, code-division multiple access (CDMA), global system for mobile communication (GSM), enhanced data for global evolution (EDGE), and time-division multiple access (TDMA) single and multicarrier class AB wireless base station amplifier applications. This device is manufactured on an advanced LDMOS technology, offering state-of-the-art performance, reliability, and thermal resistance. Packaged in an industry-standard CuW package capable of delivering a minimum output power of 30 W, it is ideally suited for today's RF power amplifier applications. AGR09030EU (unflanged) AGR09030EF (flanged) Figure 1. Available Packages Features Typical performance ratings are for IS-95 CDMA, pilot, sync, paging, traffic codes 8—13: — Output power (POUT): 7 W. — Power gain: 21 dB. — Efficiency: 27%. — Adjacent channel power ratio (ACPR) for 30 kHz bandwidth (BW): (750 kHz offset: –45 dBc) (1.98 MHz offset: –60 dBc). — Input return loss: 10 dB. High-reliability, gold-metalization process. High gain, efficiency, and linearity. Integrated ESD protection. Si LDMOS. Industry-standard packages. 30 W minimum output power. Parameter Thermal Resistance, Junction to Case: AGR09030EU AGR09030EF Sym R R JC JC Value Unit 1.85 2.2 °C/W °C/W Table 2. Absolute Maximum Ratings* Parameter Drain-source Voltage Gate-source Voltage Drain Current—Continuous Total Dissipation at TC = 25 °C: AGR09030EU AGR09030EF Derate Above 25 °C: AGR09030EU AGR09030EF Operating Junction Temperature Storage Temperature Range Sym Value VDSS 65 VGS –0.5, +15 ID 4.25 Unit Vdc Vdc Adc PD PD 95 80 W W — — TJ 0.54 0.45 200 W/°C W/°C °C TSTG –65, +150 °C * Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Table 3. ESD Rating* AGR09030E HBM MM CDM Minimum (V) 500 50 1500 Class 1B A 4 * Although electrostatic discharge (ESD) protection circuitry has been designed into this device, proper precautions must be taken to avoid exposure to ESD and electrical overstress (EOS) during all handling, assembly, and test operations. PEAK Agere Devices employs a human-body model (HBM), a machine model (MM), and a charged-device model (CDM) qualification requirement in order to determine ESD-susceptibility limits and protection design evaluation. ESD voltage thresholds are dependent on the circuit parameters used in each of the models, as defined by JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and JESD22-C101A (CDM) standards. Caution: MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. AGR09030E 30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET Electrical Characteristics Recommended operating conditions apply unless otherwise specified: TC = 30 °C. Table 4. dc Characteristics Parameter Symbol Min Typ Off Characteristics 150 µA) Drain-source Breakdown Voltage (VGS = 0, ID = 100 Max Unit V(BR)DSS 65 — — Vdc Gate-source Leakage Current (VGS = 5 V, VDS = 0 V) IGSS — — µAdc Zero Gate Voltage Drain Leakage Current (VDS = 28 V, VGS = 0 V) IDSS — — 0.95 50 2.9 GFS — 2.2 — S VGS(TH) — — 5.0 Vdc Gate Quiescent Voltage (VDS = 28 V, IDQ = 330 mA) VGS(Q) — 3.8 — Vdc Drain-source On-voltage (VGS = 10 V, ID = 1.0 A) VDS(ON) — 0.35 — Vdc Symbol Min Typ Max Unit Input Capacitance (VDS = 28 Vdc, VGS = 0, f = 1 MHz) CISS — 56 — pF Output Capacitance (VDS = 28 Vdc, VGS = 0, f = 1 MHz) COSS — 15.7 — pF Reverse Transfer Capacitance (VDS = 28 Vdc, VGS = 0, f = 1 MHz) CRSS — 0.73 — pF µAdc On Characteristics Forward Transconductance (VDS = 10 V, ID = 1.0 A) Gate Threshold Voltage (VDS = 10 V, ID = 400 µA) Table 5. RF Characteristics Parameter Dynamic Characteristics Test Fixture) Functional Tests (in Supplied Agere Systems Supplied Test Fixture) (Test frequencies (f) = 865 MHz, 880 MHz, 895 MHz) Linear Power Gain (VDS = 28 V, POUT = 5 W, IDQ = 330 mA) Output Power (VDS = 28 V, 1 dB compression, IDQ = 330 mA) GL 19 21 — dB P1dB 30 40 — W — 57 — % — –31 — dBc — 10 — dB Drain Efficiency (VDS = 28 V, POUT = P1dB, IDQ = 330 mA) Third-order Intermodulation Distortion (100 kHz spacing, VDS = 28 V, POUT = 30 WPEP, IDQ = 330 mA) IMD Input Return Loss IRL Ruggedness (VDS = 28 V, POUT = 30 W, IDQ = 330 mA, f = 880 MHz, VSWR = 10:1, all angles) — No degradation in output power. AGR09030E 30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET Test Circuit Illustrations for AGR09030E FB1 R3 VGG VDD + + + C14 C26 C19 R2 C13 C12 C11 C10 C9 C8 C20 C21 Z16 Z1 Z3 C1 Z4 Z5 Z6 C22 C23 C24 Z7 Z17 C18 Z18 R1 RF OUTPUT Z15 RF INPUT Z2 C2 C27 C3 Z12 Z9 Z10 2 C6 C5 C16 Z13 1 DUT 3 C4 Z14 Z19 C17 Z8 C25 Z11 C7 PINS: 1. DRAIN 2. GATE 3. SOURCE A. Schematic Parts List: Microstrip line: Z1 0.900 in. x 0.066 in.; Z2 0.294 in. x 0.050 in.; Z3 0.123 in. x 0.066 in.; Z4 0.703 in. x 0.066 in.; Z5 0.267 in. x 0.150 in.; Z6 0.270 in. x 0.150 in.; Z7 0.050 in. x 0.440 in.; Z8 0.324 in. x 0.440 in.; Z9 0.100 in. x 0.440 in.; Z10 0.155 in. x 0.440 in.; Z11 1.024 in. x 0.050 in.; Z12 0.123 in. x 0.300 in.; Z13 0.050 in. x 0.300 in.; Z14 0.213 in. x 0.300 in.; Z15 0.393 in. x 0.100 in.; Z16 0.194 in. x 0.100 in.; Z17 0.523 in. x 0.066 in.; Z18 1.085 in. x 0.066 in.; Z19 2.048 x 0.050. ATC ® chip capacitor: C1, C8, C18, C19: 47 pF, 100B470JW; C27: 8.2 pF, 100A8R2BW; C4, C5, C6, C7: 12 pF, 100B120JW; C3: 1.0 pF, 100B1R0BW; C9, C16, C20: 10 pF, 100B100JW; C2, C17: 8.2 pF, 100B8R2BW. Murata ® chip capacitor: C12, C23: 0.01 µF GRM40X7R103K100AL. 0603 chip capacitor: C10, C21: 220 pF. Sprague ® tantalum chip capacitor: C14, C25, C26: 22 µF, 35 V. Kreger® ferrite bead: FB1: 2743D19447. Kemet ® chip capacitor: C13, C24: 0.10 µF C1206C104KRAC7800. Vitramon ® chip capacitor: C11, C22: 2200 pF, VJ1206Y222KXA. 1206 size 0.25 W, fixed film, chip resistors: R1: 51 , RM73B2B510J; R2: 47 k , RM73B2B473J; R3: 1 k , RM73B2B102J. Taconic® ORCER RF-35: board material, 1 oz. copper, 30 mil thickness, r = 3.5. B. Component Layout Figure 2. AGR09030E Test Circuit AGR09030E 30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET Typical Performance Characteristics 0. 11 65 0. 5 0. 06 O CA PA CI ES C US TA NC E 0.37 45 1.0 0.9 1.4 0. 2 0.4 (+ T EN 75 PO M EC O 15 0 0. 8 TA NC 80 1. 0 RE AC 1. 0 IN D UCT IV E ZL f3 f1 0. 1 0.4 2.0 1.8 1.4 1.2 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 ZS f3 0. 2 f1 1.6 0. 4 6 85 0. 0 4 N 0. 6 0. 6 0.2 R E SIST A N C E C OM PON E N T (R / Z o), OR C ON D U C T A N C E C OM PON E N T (G / Y o) 0. 2 0.4 ( -jB CE 8 0. 1. 0 AN 0.2 PT -85 0.48 ) / Yo 0. 6 0 865 (f1) 880 (f2) 895 (f3) 70 40 o) 0. 1 MHz (f) 0.15 0.35 80 0. 8 0.0 —> W A V E L E 0.49 N GTH S TOW ARD 0.0 0.49 GEN L O A D <— D R A ERA OW T 0.48 S 7 180 ± H .4 TO GT 170 70 N R— -1 E EL V 0.47 > WA 160 -90 90 -160 0. 3 Z0 = 8 0. 14 0. 36 90 50 /Y ( +jB 0.8 55 EP 0.13 0.38 jX / Z 70 0. 44 14 0 0. 0 5 0. 4 0. 4 5 , o) R V TI 0.7 0 12 110 0. 6 60 2 0. 4 7 0. 0 3 0. 4 0 13 0.4 9 0. 0 1 0. 4 8 0. 0 0. 39 100 0.12 1. 2 0.1 ZL ZS (Complex Source Impedance) (Complex Optimum Load Impedance) 0.618 + j0.290 3.26 + j2.10 0.711 + j0.364 3.39 + j2.47 0.788 + j0.380 3.55 + j2.83 GATE (2) ZS DRAIN (1) ZL SOURCE (3) INPUT MATCH DUT OUTPUT MATCH Figure 3. Series Equivalent Input and Output Impedances 35 AGR09030E 30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET Typical Performance Characteristics (continued) 0 -10 ACPR (dBc)X -20 -30 FREQUENCY = 880 MHz ACP+ ACP- -40 -50 ACP1+ ACP1- -60 -70 -80 0 5 10 POUT (W)X 15 20 TEST CONDITIONS: VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C. IS-95 CDMA PILOT, PAGING, SYNC, TRAFFIC CODES 8—13. OFFSET 1 = 750 kHz, 30 kHz BW. OFFSET 2 = 1.98 MHz, 30 kHz BW. Figure 4. ACPR vs. POUT 23 0.0 22 POUT = 5 W 21 -4.0 20 POWER GAIN (dB)X -2.0 POUT = 40 W 19 18 -6.0 17 -8.0 16 -10.0 15 14 -12.0 RETURN LOSS 13 -14.0 12 -16.0 11 10 860 865 870 875 880 885 FREQUENCY (MHz)X 890 TEST CONDITIONS: VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C, WAVEFORM = CW. Figure 5. Power Gain and Return Loss vs. Frequency 895 -18.0 900 INPUT RETURN LOSS (dB)X POWER GAIN AGR09030E 30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET Typical Performance Characteristics (continued) 24 22 POWER GAIN (PG) (dB)X 20 18 16 865 MHz 880 MHz 895 MHz 14 12 10 8 6 4 2 0 10 20 30 40 50 60 POUT (W)X TEST CONDITIONS: VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C, WAVEFORM = CW. 100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 65 POUT 60 895 MHz 880 MHz 865 MHz 55 50 POUT (W)X 45 EFFICIENCY 40 895 MHz 880 MHz 865 MHz 35 30 25 20 15 10 5 0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 PIN (W)X TEST CONDITIONS: VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C, WAVEFORM = CW. Figure 7. Power Out and Drain Efficiency vs. Input Power 1.5 1.6 1.7 DRAIN EFFICIENCY (%)X Figure 6. Power Gain vs. Power Out AGR09030E 30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET Package Dimensions All dimensions are in inches. Tolerances are ±0.005 in. unless specified. AGR09030EU PINS: 1. DRAIN 2. GATE 3. SOURCE 1 1 PEAK DEVICES AGR09030EU 3 3 XXXX 2 2 AGR09030EF PINS: 1. DRAIN 2. GATE 3. SOURCE 1 PEAK DEVICES AGR09030EF 3 1 XXXX 2 XXXX - 4 Digit Trace Code 2 3