EN23F0QI 15A Voltage Mode Synchronous Buck PWM DC-DC Converter with Integrated Inductor Description Features The EN23F0QI is a Power System on a Chip (PowerSoC) DC-DC converter. It integrates MOSFET switches, small-signal control circuits, compensation and an integrated inductor in an advanced 12x13x3mm QFN module. It offers high efficiency, excellent line and load regulation. The EN23F0QI operates over a wide input voltage range and is specifically designed to meet the precise voltage and fast transient requirements of high-performance products. The EN23F0QI features frequency synchronization to an external clock, power OK output voltage monitor, programmable soft-start along with thermal and over current protection. The device’s advanced circuit design, ultra high switching frequency and proprietary integrated inductor technology delivers high-quality, ultra compact, nonisolated DC-DC conversion. • • • • • The Enpirion solution significantly helps in system design and productivity by offering greatly simplified board design, layout and manufacturing requirements. In addition, overall system level reliability is improved given the small number of components required with the Enpirion solution. All Enpirion products are RoHS compliant and leadfree manufacturing environment compatible. • • • • • • • Integrated Inductor, MOSFETs, Controller Total Solution Size Estimate 308mm2 Wide Input Voltage Range: 4.5V – 14V 2% VOUT Accuracy (Over Line/Load/Temperature) Master/Slave Configuration for Parallel Operation o Up to 4 Devices with 48A capability Frequency Synchronization (External Clock) Output Enable Pin and Power OK Signal Programmable Soft-Start Time Under Voltage Lockout Protection (UVLO) Programmable Over Current Protection Thermal Shutdown and Short Circuit Protection RoHS compliant, MSL level 3, 260oC reflow Applications • • • • • Space Constrained Applications Distributed Power Architectures Output Voltage Ripple Sensitive Applications Beat Frequency Sensitive Applications Servers, Embedded Computing Systems, LAN/SAN Adapter Cards, RAID Storage Systems, Industrial Automation, Test and Measurement, and Telecommunications Efficiency vs. Output Current 100 90 EFFICIENCY (%) 80 70 60 50 40 30 VOUT = 3.3V 20 VOUT = 1.8V 10 VOUT = 1.2V CONDITIONS VIN = 12.0V AVIN = 3.3V Dual Supply 0 0 Figure 1. Simplified Applications Circuit (Footprint Optimized) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OUTPUT CURRENT (A) Figure 2. Highest Efficiency in Smallest Solution Size www.enpirion.com EN23F0QI Ordering Information Part Number EN23F0QI EN23F0QI-E Package Markings EN23F0QI EN23F0QI Temp Rating (°C) -40 to +85 Package Description 92-pin (12mm x 13mm x 3mm) QFN T&R QFN Evaluation Board Packing and Marking Information: http://www.enpirion.com/resource-center-packing-and-marking-information.htm Pin Assignments (Top View) Figure 3: Pin Out Diagram (Top View) NOTE A: NC pins are not to be electrically connected to each other or to any external signal, ground, or voltage. However, they must be soldered to the PCB. Failure to follow this guideline may result in part malfunction or damage. NOTE B: Shaded area highlights exposed metal below the package that is not to be mechanically or electrically connected to the PCB. Refer to Figure 14 for details. NOTE C: White ‘dot’ on top left is pin 1 indicator on top of the device package. ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 2 EN23F0QI Pin Description I/O Legend: PIN P=Power NAME G=Ground I/O 1-24, 36, 81 NC NC 25-35 VOUT O 37-39, 83-92 NC(SW) NC 40-46 PGND G 47-63 PVIN P 64 AVINO O 65 66 PG BTMP I/O I/O 67 VDDB O 68 BGND G 69 S_IN I 70 S_OUT O 71 POK O 72 ENABLE I 73 AVIN P 74 AGND G 75 M/S I 76 VFB I/O 77 EAIN O 78 SS I/O 79 RCLX I/O 80 FADJ I/O 82 CGND G 93 PGND G NC=No Connect I=Input O=Output I/O=Input/Output FUNCTION NO CONNECT – These pins may be internally connected. Do not connect them to each other or to any other electrical signal. Failure to follow this guideline may result in device damage. Regulated converter output. Connect these pins to the load and place output capacitor between these pins and PGND pins 40-42. NO CONNECT – These pins are internally connected to the common switching node of the internal MOSFETs. They are not to be electrically connected to any external signal, ground, or voltage. Failure to follow this guideline may result in damage to the device. Input/Output power ground. Connect these pins to the ground electrode of the input and output filter capacitors. See VOUT and PVIN pin descriptions for more details. Input power supply. Connect to input power supply. Decouple with input capacitor to PGND pins 43-46. Internal 3.3V linear regulator output. Connect this pin to AVIN (Pin 73) for applications where operation from a single input voltage (PVIN) is required. If AVINO is being used, place a 1µF, X5R/X7R, capacitor between AVINO and AGND as close as possible to AVINO. Place a 0.1µF, X7R, capacitor between this pin and BTMP. See pin 65 description. Internal regulated voltage used for the internal control circuitry. Place a 1µF, X7R, capacitor between this pin and BGND. See pin 67 description. Digital Input. This pin accepts either an input clock to phase lock the internal switching frequency or a S_OUT signal from another EN23F0QI. Leave this pin floating if not used. Digital Output. PWM signal is output on this pin. Leave this pin floating if not used. Power OK is an open drain transistor (pulled up to AVIN or similar voltage) used for power system state indication. POK is logic high when VOUT is -10% of VOUT nominal. Leave this pin floating if not used. Input Enable. Applying a logic high to this pin enables the output and initiates a soft-start. Applying a logic Low disables the output. Do not leave this pin floating. 3.3V Input power supply for the controller. Place a 0.1µF, X7R, capacitor between AVIN and AGND. Analog Ground. This is the ground return for the controller. Needs to be connected to a quiet ground. A logic level low configures the device as Master and a logic level high configures the device as a Slave. Connect to ground in standalone mode. External Feedback Input. The feedback loop is closed through this pin. A voltage divider at VOUT is used to set the output voltage. The mid-point of the divider is connected to VFB. A phase lead capacitor from this pin to VOUT is also required to stabilize the loop. Optional Error Amplifier Input. Allows for customization of the control loop for performance optimization. Leave this pin floating if unused. Soft-Start node. The soft-start capacitor is connected between this pin and AGND. The value of this capacitor determines the startup time. See Soft-Start Operation in the Functional Description section for details. Programmable over-current protection. Placement of a resistor on this pin will adjust the over-current protection threshold. See Table 2 for the recommended RCLX Value to set OCP at the nominal value specified in the Electrical Characteristics table. No current limit protection when this pin is left floating. Adding a resistor (RFS) to this pin will adjust the switching frequency of the EN23F0QI. See Table 1 for suggested resistor values on RFS for various PVIN/VOUT combinations to maximize efficiency. Do not leave this pin floating. Connect to GND plane at all times. Not a perimeter pin. Device thermal pad to be connected to the system GND plane for heatsinking purposes. ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 3 EN23F0QI Absolute Maximum Ratings CAUTION: Absolute Maximum ratings are stress ratings only. Functional operation beyond the recommended operating conditions is not implied. Stress beyond the absolute maximum ratings may impair device life. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. MIN MAX UNITS Voltages on : PVIN, VOUT PARAMETER SYMBOL -0.5 15 V Pin Voltages – AVINO, AVIN, ENABLE, POK, S_IN, S_OUT, M/S 2.5 6.0 V Pin Voltages – VFB, SS, EAIN, RCLX, FADJ -0.5 2.75 V PVIN Slew Rate 0.3 3 V/ms -65 150 °C 150 °C Reflow Temp, 10 Sec, MSL3 JEDEC J-STD-020A 260 °C ESD Rating (based on Human Body Model) 2000 V ESD Rating (based on CDM) 500 V Storage Temperature Range TSTG Maximum Operating Junction Temperature TJ-ABS Max Recommended Operating Conditions SYMBOL MIN MAX UNITS Input Voltage Range PARAMETER PVIN 4.5 14.0 V AVIN: Controller Supply Voltage AVIN 2.5 5.5 V Output Voltage Range (Note 1) VOUT 0.75 3.3 V Output Current IOUT 15 A Operating Ambient Temperature TA -40 +85 °C Operating Junction Temperature TJ -40 +125 °C Thermal Characteristics SYMBOL TYP UNITS Thermal Shutdown PARAMETER TSD 160 °C Thermal Shutdown Hysteresis TSDH 35 °C Thermal Resistance: Junction to Ambient (0 LFM) (Note 2) θJA 13 °C/W Thermal Resistance: Junction to Case (0 LFM) θJC 1 °C/W Note 1: RCLX resistor value may need to be raised for VOUT > VIN – 2.5V to increase current limit threshold. Contact [email protected] for details. Note 2: Based on 2oz. external copper layers and proper thermal design in line with EIJ/JEDEC JESD51-7 standard for high thermal conductivity boards. ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 4 EN23F0QI Electrical Characteristics NOTE: VIN=12V, Minimum and Maximum values are over operating ambient temperature range unless otherwise noted. Typical values are at TA = 25°C. PARAMETER MAX UNITS Operating Input Voltage SYMBOL PVIN TEST CONDITIONS MIN 4.5 TYP 14.0 V Controller Input Voltage AVIN 2.5 5.5 V PVIN Under Voltage Lock-out UVLOPVIN Voltage above which UVLO is not asserted 2 V AVIN Under Voltage Lock-out rising AVINUVLOR Voltage above which UVLO is not asserted 2.3 V AVIN Under Voltage Lock-out falling AVINOVLOF Voltage below which UVLO is asserted 2.1 V IAVIN 14 mA AVINO 3.3 V AVIN Pin Input Current Internal Linear Regulator Output Voltage Shut-Down Supply Current IPVINS PVIN=12V, AVIN=3.3, ENABLE=0V 300 μA IAVINS PVIN=12V, AVIN=3.3, ENABLE=0V 50 μA Feedback Pin Voltage VFB Feedback Pin Voltage VFB Feedback pin Input Leakage Current IFB VOUT Rise Time tRISE Soft Start Capacitor Range CSS_RANGE Continuous Output Current IOUT_CONT Over Current Trip Level IOCP Feedback Node Voltage at: VIN = 12V, ILOAD = 0, TA = 25°C Feedback Node Voltage at: 4.5V ≤ VIN ≤ 14V 0A ≤ ILOAD ≤ 15A, TA = -40 to 85°C VFB pin input leakage current (Note 3) 0.594 0.60 0.606 V 0.588 0.60 0.612 V 5 nA CSS = 47nF (Note 3, Note 4 and Note 5) 1.96 3.64 ms -5 2.8 47 0 Reference Table 3 nF 15 22.5 A A ENABLE Logic High VENABLE_HIGH 4.5V ≤ VIN ≤ 14V; 1.8 AVIN V ENABLE Logic Low VENABLE_LOW 4.5V ≤ VIN ≤ 14V; 0 0.6 V ENABLE Lockout Time TENLOCKOUT ENABLE pin Input Current Switching Frequency IENABLE FSW 180kΩ Pull Down (Note 3) RFADJ =3kΩ External SYNC Clock Frequency Lock Range FPLL_LOCK Range of SYNC clock frequency S_IN Threshold – Low VS_IN_LO S_IN Clock Logic Low Level S_IN Threshold – High VS_IN_HI S_IN Clock Logic High Level S_OUT Threshold – Low VS_OUT_LO S_OUT Clock Logic Low Level S_OUT Threshold – High VS_OUT_HI S_OUT Clock Logic High Level POKLT Percentage of Nominal Output Voltage for POK to be Low POK Lower Threshold ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential 8 ms 4 μA 1.0 MHz 0.8 1.8 1.8 90 1.6 MHz 0.8 V 2.5 V 0.8 V 2.5 V % www.enpirion.com, Page 5 EN23F0QI PARAMETER SYMBOL TEST CONDITIONS POK Output low Voltage VPOKL With 4mA Current Sink into POK POK Output Hi Voltage VPOKH PVIN range: 4.5V ≤ VIN ≤ 15V POK pin VOH leakage current IPOKL POK High (Note 3) M/S Pin Logic Low VT-LOW Tie Pin to GND M/S Pin Logic High VT-HIGH Pull up to AVIN Through an External Resistor REXT M/S Pin Input Current IM/S VIN = 5.0V, REXT = 24.9kΩ MIN TYP 1.8V MAX UNITS 0.4 V AVIN V 1 µA 0.8V V V 100 μA Note 3: Parameter not production tested but is guaranteed by design. Note 4: Rise time calculation begins when AVIN > VUVLO and ENABLE = HIGH. Note 5: VOUT Rise Time Accuracy does not include soft-start capacitor tolerance. ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 6 EN23F0QI Typical Performance Curves Efficiency vs. Output Current 100 90 90 80 80 70 70 EFFICIENCY (%) EFFICIENCY (%) Efficiency vs. Output Current 100 60 50 40 30 VOUT = 3.3V 20 VOUT = 1.8V 10 VOUT = 1.2V CONDITIONS VIN = 12.0V AVIN = 3.3V Dual Supply 60 50 40 30 VOUT = 3.3V 20 VOUT = 1.8V VOUT = 1.2V 10 0 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OUTPUT CURRENT (A) 0 1 14.0 13.0 12.0 11.0 9.0 8.0 7.0 6.0 CONDITIONS VIN = 12V TJMAX = 125 C θJA = 13 C/W 13x12x3mm QFN No Air Flow VOUT = 1.2V VOUT = 1.8V VOUT = 3.3V 4 5 6 7 8 9 10 11 12 13 14 15 OUTPUT CURRENT (A) 15.0 14.0 13.0 12.0 11.0 10.0 9.0 8.0 7.0 6.0 CONDITIONS VIN = 10V TJMAX = 125 C θJA = 13 C/W 13x12x3mm QFN No Air Flow VOUT = 1.2V VOUT = 1.8V Series1 25 30 35 40 45 50 55 60 65 70 75 80 85 AMBIENT TEMPERATURE ( C) 25 30 35 40 45 50 55 60 65 70 75 80 85 AMBIENT TEMPERATURE ( C) Output Current De-rating with Air Flow (200fpm) Output Current De-rating with Air Flow (400fpm) CONDITIONS VIN = 12V TJMAX = 125 C θJA = 10.5 C/W 13x12x3mm QFN Air Flow (200fpm) MAXIMUM OUTPUT CURRENT (A) MAXIMUM OUTPUT CURRENT (A) 9.0 8.0 7.0 6.0 5.0 3 5.0 5.0 15.0 14.0 13.0 12.0 11.0 10.0 2 Output Current De-rating MAXIMUM OUTPUT CURRENT (A) MAXIMUM OUTPUT CURRENT (A) Output Current De-rating 15.0 10.0 CONDITIONS VIN = 10.0V AVIN = 3.3V Dual Supply VOUT = 1.2V VOUT = 1.8V VOUT = 3.3V 25 30 35 40 45 50 55 60 65 70 75 80 85 AMBIENT TEMPERATURE ( C) ©Enpirion 2012 all rights reserved, E&OE 15.0 14.0 13.0 12.0 11.0 10.0 9.0 8.0 7.0 6.0 5.0 CONDITIONS VIN = 12V TJMAX = 125 C θJA = 9 C/W 13x12x3mm QFN Air Flow (400fpm) VOUT = 1.2V VOUT = 1.8V VOUT = 3.3V 25 30 35 40 45 50 55 60 65 70 75 80 85 AMBIENT TEMPERATURE ( C) Enpirion Confidential www.enpirion.com, Page 7 EN23F0QI Output Current De-rating with Heat Sink 15.0 14.0 13.0 12.0 11.0 10.0 CONDITIONS VIN = 12V TJMAX = 125 C θJA = 12 C/W 13x12x3mm QFN No Air Flow 9.0 8.0 7.0 6.0 5.0 Heat Sink ‐ Wakefield Thermal Solutions P/N 651‐B MAXIMUM OUTPUT CURRENT (A) MAXIMUM OUTPUT CURRENT (A) Typical Performance Curves VOUT = 1.2V VOUT = 1.8V VOUT = 3.3V CONDITIONS VIN = 12V TJMAX = 125 C θJA = 8 C/W 13x12x3mm QFN Air Flow (400fpm) 9.0 8.0 7.0 6.0 5.0 Heat Sink - Wakef ield Thermal Solutions P/N 651-B VOUT = 1.2V CONDITIONS VIN = 12V TJMAX = 125 C θJA = 9.5 C/W 13x12x3mm QFN Air Flow (200fpm) 9.0 8.0 7.0 6.0 5.0 Heat Sink - Wakef ield Thermal Solutions P/N 651-B VOUT = 1.8V VOUT = 3.3V 1.005 1.004 VIN = 8V 1.003 VIN = 10V 1.002 VIN = 12V 1.001 1.000 0.999 0.998 0.997 VOUT = 1.8V CONDITIONS CONDITIONS VOUT_NOM VIN ==5.0V 1.0V 0.996 VOUT = 3.3V 0.995 25 30 35 40 45 50 55 60 65 70 75 80 85 AMBIENT TEMPERATURE ( C) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OUTPUT CURRENT (A) Output Voltage vs. Output Current Output Voltage vs. Output Current 1.205 1.805 1.204 VIN = 8V 1.203 VIN = 10V 1.202 VIN = 12V OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) VOUT = 1.2V Output Voltage vs. Output Current Output Current De-rating with Heat Sink and Air Flow (400fpm) 15.0 14.0 13.0 12.0 11.0 10.0 15.0 14.0 13.0 12.0 11.0 10.0 25 30 35 40 45 50 55 60 65 70 75 80 85 AMBIENT TEMPERATURE ( C) OUTPUT VOLTAGE (V) MAXIMUM OUTPUT CURRENT (A) 25 30 35 40 45 50 55 60 65 70 75 80 85 AMBIENT TEMPERATURE ( C) Output Current De-rating with Heat Sink and Air Flow (200fpm) 1.201 1.200 1.199 1.198 1.197 1.196 1.804 VIN = 8V 1.803 VIN = 10V 1.802 VIN = 12V 1.801 1.800 1.799 1.798 CONDITIONS VOUT_NOM = 1.8V Note: Air flow or heat sink may be required for higher currents. See derating curves. 1.797 CONDITIONS CONDITIONS VOUT_NOM VIN ==5.0V 1.2V 1.796 1.195 1.795 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OUTPUT CURRENT (A) ©Enpirion 2012 all rights reserved, E&OE 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OUTPUT CURRENT (A) Enpirion Confidential www.enpirion.com, Page 8 EN23F0QI Typical Performance Curves Output Voltage vs. Output Current Output Voltage vs. Temperature 1.204 2.504 VIN = 8V 2.503 VIN = 10V 2.502 VIN = 12V OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 2.505 2.501 2.500 2.499 2.498 CONDITIONS VOUT_NOM = 2.5V Note: Air flow or heat sink may be required for higher currents. See derating curves. 2.497 2.496 CONDITIONS VIN = 8V VOUT_NOM = 1.2V 1.203 1.202 1.201 1.200 LOAD = 0A 1.199 LOAD = 4A 1.198 LOAD = 8A 1.197 LOAD = 12A 1.196 2.495 -40 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OUTPUT CURRENT (A) Output Voltage vs. Temperature 1.204 CONDITIONS VIN = 10V VOUT_NOM = 1.2V 1.203 1.202 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 85 Output Voltage vs. Temperature 1.204 1.201 1.200 LOAD = 0A 1.199 LOAD = 4A 1.198 LOAD = 8A 1.197 CONDITIONS VIN = 12V VOUT_NOM = 1.2V 1.203 1.202 1.201 1.200 LOAD = 0A 1.199 LOAD = 4A 1.198 LOAD = 8A 1.197 LOAD = 12A 1.196 LOAD = 12A 1.196 -40 -15 10 35 60 AMBIENT TEMPERATURE ( C) 85 -40 Output Voltage vs. Temperature 1.202 1.201 1.200 LOAD = 0A 1.199 LOAD = 4A 1.198 LOAD = 8A 1.197 LOAD = 12A 1.196 -40 -15 10 35 60 AMBIENT TEMPERATURE ( C) ©Enpirion 2012 all rights reserved, E&OE 85 INDIVIDUAL OUTPUT CURRENT (A) CONDITIONS VIN = 14V VOUT_NOM = 1.2V 1.203 -15 10 35 60 AMBIENT TEMPERATURE ( C) 85 Parallel Current Share Breakdown 1.204 OUTPUT VOLTAGE (V) -15 10 35 60 AMBIENT TEMPERATURE ( C) 20 17.5 MASTER 15 SLAVE 12.5 IDEAL 10 7.5 CONDITIONS EN23F0QI VIN = 12V VOUT = 1.2V 5 2.5 0 0 Enpirion Confidential 5 10 15 20 25 TOTAL OUTPUT CURRENT (A) 30 www.enpirion.com, Page 9 EN23F0QI Typical Performance Characteristics Enable Startup/Shutdown Waveform (0A) Enable Startup/Shutdown Waveform (5A) ENABLE ENABLE VOUT VOUT POK POK CONDITIONS VIN = 12V, VOUT = 3.3V, Load = 0A, Css = 47nF CIN = 3x22µF(1206), COUT = 3x47µF(0805)+3x22µF(0805) LOAD LOAD Enable Startup/Shutdown Waveform (10A) Enable Startup/Shutdown Waveform (15A) ENABLE ENABLE VOUT VOUT POK POK LOAD CONDITIONS VIN = 12V, VOUT = 3.3V, Load = 10A, Css = 47nF CIN = 3x22µF(1206), COUT = 3x47µF(0805)+3x22µF(0805) LOAD Power Up Waveform (0A) PVIN VOUT VOUT POK POK CONDITIONS VIN = 12V, VOUT = 3.3V, Load = 0A, Css = 47nF, CIN = 3x22µF(1206), COUT = 3x47µF(0805) + 3x22µF(0805) ©Enpirion 2012 all rights reserved, E&OE CONDITIONS VIN = 12V, VOUT = 3.3V, Load = 15A, Css = 47nF CIN = 3x22µF(1206), COUT = 3x47µF(0805)+3x22µF(0805) Power Up Waveform (5A) PVIN LOAD CONDITIONS VIN = 12V, VOUT = 3.3V, Load = 5A, Css = 47nF CIN = 3x22µF(1206), COUT = 3x47µF(0805)+3x22µF(0805) LOAD CONDITIONS VIN = 12V, VOUT = 3.3V, Load = 5A, Css = 47nF, CIN = 3x22µF(1206), COUT = 3x47µF(0805) + 3x22µF(0805) Enpirion Confidential www.enpirion.com, Page 10 EN23F0QI Typical Performance Characteristics Power Up Waveform (15A) Output Ripple at 20MHz Bandwidth VOUT = 1V (AC Coupled) LOAD = 0A VOUT = 1.8V (AC Coupled) PVIN VOUT VOUT = 3.3V (AC Coupled) POK 20mV / DIV LOAD CONDITIONS VIN = 12V, VOUT = 3.3V, Load = 15A, Css = 47nF, CIN = 3x22µF(1206), COUT = 3x47µF(0805) + 3x22µF(0805) Output Ripple at 20MHz Bandwidth VOUT = 1V (AC Coupled) LOAD = 10A VOUT = 1.8V (AC Coupled) CONDITIONS VIN = 12V, CIN = 3x22µF (1206), COUT = 3x47µF + 100µF (1206) Output Ripple at 500MHz Bandwidth VOUT = 1V (AC Coupled) VOUT = 1.8V (AC Coupled) VOUT = 3.3V (AC Coupled) VOUT = 3.3V (AC Coupled) 20mV / DIV 20mV / DIV CONDITIONS VIN = 12V, CIN = 3x22µF (1206), COUT = 3x47µF + 100µF (1206) Output Ripple at 500MHz Bandwidth VOUT = 1V (AC Coupled) LOAD = 0A LOAD = 2A VOUT = 1.8V (AC Coupled) CONDITIONS VIN = 12V, CIN = 3x22µF (1206), COUT = 3x47µF + 100µF (1206) Output Ripple at 500MHz Bandwidth VOUT = 1V (AC Coupled) LOAD = 6A VOUT = 1.8V (AC Coupled) VOUT = 3.3V (AC Coupled) VOUT = 3.3V (AC Coupled) 20mV / DIV 20mV / DIV CONDITIONS VIN = 12V, CIN = 3x22µF (1206), COUT = 3x47µF + 100µF (1206) CONDITIONS VIN = 12V, CIN = 3x22µF (1206), COUT = 3x47µF + 100µF (1206) ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 11 EN23F0QI Typical Performance Characteristics Output Ripple at 500MHz Bandwidth VOUT = 1V (AC Coupled) Load Transient from 0 to 5A (VOUT =1V) LOAD = 10A VOUT (AC Coupled) VOUT = 1.8V (AC Coupled) VOUT = 3.3V (AC Coupled) 20mV / DIV LOAD CONDITIONS VIN = 12V, CIN = 3x22µF (1206), COUT = 3x47µF + 100µF (1206) Load Transient from 0 to 10A (VOUT =1V) VOUT (AC Coupled) LOAD CONDITIONS VIN = 12V, VOUT = 1.0V CIN = 3 x 22µF (1206) COUT = 3 x 47µF (0805) + 3 x 22µF (0805) Using Best Performance Configuration Load Transient from 0 to 15A (VOUT =1V) VOUT (AC Coupled) CONDITIONS VIN = 12V, VOUT = 1.0V CIN = 3 x 22µF (1206) COUT = 3 x 47µF (0805) + 3 x 22µF (0805) Using Best Performance Configuration LOAD CONDITIONS VIN = 12V, VOUT = 1.0V CIN = 3 x 22µF (1206) COUT = 3 x 47µF (0805) + 3 x 22µF (0805) Using Best Performance Configuration Load Transient from 0 to 5A (VOUT =3.3V) Load Transient from 0 to 10A (VOUT =3.3V) VOUT (AC Coupled) VOUT (AC Coupled) LOAD CONDITIONS VIN = 12V, VOUT = 3.3V CIN = 3 x 22µF (1206) COUT = 3 x 47µF (0805) + 3 x 22µF (0805) Using Best Performance Configuration ©Enpirion 2012 all rights reserved, E&OE LOAD Enpirion Confidential CONDITIONS VIN = 12V, VOUT = 3.3V CIN = 3 x 22µF (1206) COUT = 3 x 47µF (0805) + 3 x 22µF (0805) Using Best Performance Configuration www.enpirion.com, Page 12 EN23F0QI Typical Performance Characteristics Load Transient from 0 to 15A (VOUT =3.3V) Load Transient from 0 to 5A (VOUT =3.3V) VOUT (AC Coupled) VOUT (AC Coupled) LOAD CONDITIONS VIN = 12V, VOUT = 3.3V CIN = 3 x 22µF (1206) COUT = 3 x 47µF (0805) + 3 x 22µF (0805) Using Best Performance Configuration LOAD CONDITIONS VIN = 12V, VOUT = 3.3V CIN = 3 x 22µF (1206) COUT = 3 x 47µF (1206) + 100µF (1206) Using Best Performance Configuration Load Transient from 0 to 10A (VOUT =3.3V) Load Transient from 0 to 15A (VOUT =3.3V) VOUT (AC Coupled) VOUT (AC Coupled) LOAD CONDITIONS VIN = 12V, VOUT = 3.3V CIN = 3 x 22µF (1206) COUT = 3 x 47µF (1206) + 100µF (1206) Using Best Performance Configuration ©Enpirion 2012 all rights reserved, E&OE LOAD Enpirion Confidential CONDITIONS VIN = 12V, VOUT = 3.3V CIN = 3 x 22µF (1206) COUT = 3 x 47µF (1206) + 100µF (1206) Using Best Performance Configuration www.enpirion.com, Page 13 EN23F0QI Functional Block Diagram M/S S_OUT S_IN UVLO Digital I/O BTMP PG PVIN Linear Regulator To PLL AVINO Thermal Limit Current Limit NC(SW) Gate Drive VOUT BGND (-) PWM Comp (+) PGND PLL/Sawtooth Generator FADJ VDDB Compensation Network EAIN Compensation Network (-) Error Amp (+) Power Good Logic ENABLE 180k SS Soft Start VFB POK 300k Voltage Reference Generator Band Gap Reference AVIN AGND Figure 4: Functional Block Diagram Functional Description wide loop bandwidth within a small foot print. Synchronous Buck Converter The EN23F0QI is a highly integrated synchronous, buck converter with integrated controller, power MOSFET switches and integrated inductor. The nominal input voltage (PVIN) range is 4.5V to 14V and can support up to 15A of continuous output current. The output voltage is programmed using an external resistor divider network. The control loop utilizes a Type IV Voltage-Mode compensation network and maximizes on a low-noise PWM topology. Much of the compensation circuitry is internal to the device. However, a phase lead capacitor is required along with the output voltage feedback resistor divider to complete the Type IV compensation network.. The high switching frequency of the EN23F0QI enables the use of small size input and output capacitors, as well as a ©Enpirion 2012 all rights reserved, E&OE Protection Features: The power supply has the following protection features: • Programmable Over-Current Protection • Thermal Shutdown with Hysteresis • Under-Voltage Lockout Protection Additional Features: • • • Switching Frequency Synchronization Programmable Soft-Start Power OK Output Monitoring Power Up Sequence The EN23F0QI is designed to be powered by either a single input supply (PVIN) or two separate Enpirion Confidential www.enpirion.com, Page 14 EN23F0QI supplies: one for PVIN and the other for AVIN. schematic for a dual input supply application. Single Input Supply Application (PVIN): For dual input supply applications, the sequencing of the two input supplies, PVIN and AVIN, is very important. During power up, neither ENABLE nor PVIN should be asserted before AVIN. There are two common acceptable turn-on/off sequences for the device. ENABLE can be tied to AVIN and come up with it, and PVIN can be ramped up and down as needed. Alternatively, PVIN can be brought high after AVIN is asserted, and the device can be turned on and off by toggling the ENABLE pin. PVIN may be applied before AVIN if ENABLE is toggled after both PVIN and AVIN is applied. Enable Operation Figure 5. Single Supply Applications Circuit The EN23F0QI has an internal linear regulator that converts PVIN to 3.3V. The output of the linear regulator is provided on the AVINO pin once the device is enabled. AVINO should be connected to AVIN on the EN23F0QI. In this application, the following external components are required: Place a 1µF, X5R/X7R, capacitor between AVINO and AGND as close as possible to AVINO. Place a 0.1µF, X5R/X7R, capacitor between AVIN and AGND as close as possible to AVIN. In addition, place a resistor (RVB) between VDDB and AVIN, as shown in Figure 5. Enpirion recommends RVB=4.75kΩ. In this application, ENABLE cannot be asserted before PVIN. If no external enable signal is used, tying ENABLE to AVIN meets this requirement. Pre-Bias Precaution The EN23F0QI is not designed to be turned on into a pre-biased output voltage. Be sure the output capacitors are not charged or the output of the EN23F0QI is not pre-biased when the EN23F0QI is first enabled. Frequency Synchronization Dual Input Supply Application (PVIN and AVIN): Figure 6: Dual Input Supply Application Circuit In this application, place a 0.1µF, X7R, capacitor between AVIN and AGND as close as possible to AVIN. Refer to Figure 6 for a recommended ©Enpirion 2012 all rights reserved, E&OE The ENABLE pin provides a means to enable normal operation or to shut down the device. A logic high will enable the converter into normal operation. When the ENABLE pin is asserted (high) the device will undergo a normal soft-start, allowing the output voltage to rise monotonically into regulation. A logic low will disable the converter and the device will power down in a controlled manner. The ENABLE signal has to be low for at least the ENABLE Lockout Time (8ms) in order for the device to be re-enabled. The switching frequency of the EN23F0QI can be phase-locked to an external clock source to move unwanted beat frequencies out of band. The internal switching clock of the EN23F0QI can be phase locked to a clock signal applied to the S_IN pin. An activity detector recognizes the presence of an external clock signal and automatically phaselocks the internal oscillator to this external clock. Phase-lock will occur as long as the input clock frequency is in the range of 0.8MHz to 1.6MHz. When no clock is present, the device reverts to the free running frequency of the internal oscillator. Adding a resistor (RFS) to the FADJ pin will adjust the switching frequency. If a 3KΩ resistor is placed on FADJ the nominal switching frequency of the EN23F0QI is 1MHz. Figure 7 shows the typical RFS resistor value versus switching frequency. Enpirion Confidential www.enpirion.com, Page 15 EN23F0QI value. SWITCHING FREQUENCY (MHz) Rfs vs. SW Frequency 1.800 POK Operation 1.600 The POK signal is an open drain signal (requires a pull up resistor to AVIN or similar voltage) from the converter indicating the output voltage is within the specified range. Typically, a 100kΩ or lower resistance is used as the pull-up resistor. The POK signal will be logic high (AVIN) when the output voltage is above 90% of the programmed voltage level. If the output voltage is below this point, the POK signal will be a logic low. The POK signal can be used to sequence down-stream converters by tying to their enable pins. 1.400 1.200 1.000 CONDITIONS VIN = 6V to 12V VOUT = 0.8V to 3.3V 0.800 0.600 0 2 4 6 8 10 12 14 16 18 20 22 RFS RESISTOR VALUE (kΩ) Over-Current Protection (OCP) Figure 7. RFS versus Switching Frequency The efficiency performance of the EN23F0QI for various VOUTs can be optimized by adjusting the switching frequency. Table 1 shows recommended RFS values for various VOUTs in order to optimize performance of the EN23F0QI. PVIN 12V VOUT 1.0V 1.2V 1.8V 2.5V 3.3V RFS 3k 3.3k 4.87k 10k 15k Table 1: Recommended RFS Values Spread Spectrum Mode The external clock frequency may be swept between 0.8MHz and 1.6MHz at repetition rates of up to 10 kHz in order to reduce EMI frequency components. Soft-Start Operation Soft start is a means to ramp the output voltage gradually upon start-up. The output voltage rise time is controlled by the choice of soft-start capacitor, which is placed between the SS pin (pin 78) and the AGND pin (pin 74). Rise Time (ms): TR ≈ Css [nF] x 0.06 During start-up of the converter, the reference voltage to the error amplifier is linearly increased to its final level by an internal current source of approximately 10µA. Typical soft-start rise time is ~2.8ms with SS capacitor value of 47nF. The rise time is measured from when VIN > VUVLOR and ENABLE pin voltage crosses its logic high threshold to when VOUT reaches its programmed ©Enpirion 2012 all rights reserved, E&OE The current limit function is achieved by sensing the current flowing through a sense PFET. When the sensed current exceeds the current limit, both power FETs are turned off for the rest of the switching cycle. If the over-current condition is removed, the over-current protection circuit will reenable PWM operation. If the over-current condition persists, the circuit will continue to protect the load. The OCP trip point is nominally set as specified in the Electrical Characteristics table. In the event the OCP circuit trips consistently in normal operation, the device enters a hiccup mode. While in hiccup mode, the device is disabled for a short while and restarted with a normal soft-start. The hiccup time is approximately 32ms. This cycle can continue indefinitely as long as the over current condition persists. The OCP trip point can be programmed to trip at a lower level via the RCLX pin. The value of the resistor connected between RCLX and ground will determine the OCP trip point. Generally, the higher the RCLX value, the higher the current limit threshold. Note that if RCLX pin is left open the output current will be unlimited and the device will not have current limit protection. Reference Table 2 for a list of recommended resistor values on RCLX that will set the OCP trip point at the typical value of 22.5A, also specified in the Electrical Characteristics table. VOUT Range 0.6V < VOUT ≤ 0.9V 0.9V < VOUT ≤ 1.2V 1.2V < VOUT ≤ 2.0V 2.0V < VOUT ≤ 5.0V RCLX Value 36.5k 38.4k 40.2k 45.3k Table 2: Recommended RCLX Values vs. VOUT Enpirion Confidential www.enpirion.com, Page 16 EN23F0QI Thermal shutdown circuit will disable device operation when the junction temperature exceeds approximately 150ºC. After a thermal shutdown event, when the junction temperature drops by approx 20ºC, the converter will re-start with a normal soft-start. Input Under-Voltage Lock-Out (UVLO) Internal circuits ensure that the converter will not start switching until the input voltage is above the specified minimum voltage. Hysteresis, input deglitch and output leading edge blanking ensures high noise immunity and prevents false UVLO triggers. Master / Slave (Parallel) Operation: Up to four EN23F0QI devices may be connected in a Master/Slave configuration to handle larger load currents. The maximum output current for each parallel device will need to be de-rated by 20 percent so that no devices will over current due to current mis-match. The Master device’s switching clock may be phase-locked to an external clock source via the S_IN pin or left open and use its default switching frequency. The device is placed in Master mode by pulling the M/S pin low or in Slave mode by pulling M/S pin high. Note that the M/S pin is also pulled low for standalone mode. In Master mode, the internal PWM signal is output on the S_OUT pin. This PWM signal from the Master is ©Enpirion 2012 all rights reserved, E&OE fed to the Slave device at its S_IN input. The Slave device acts like an extension of the power FETs in the Master. The inductor in the Slave prevents crow-bar currents from Master to Slave due to timing delays. Parallel operation in dual supply mode is shown in Figure 9. Single supply mode operation may also be implemented similarly. Note that only critical components are shown. The red text and red lines indicate the important parallel operation connections and care should be taken in layout to ensure low impedance between those paths. The parallel current matching is illustrated in Figure 8. Parallel Current Share Breakdown INDIVIDUAL OUTPUT CURRENT (A) Thermal Overload Protection 20 17.5 MASTER 15 SLAVE 12.5 IDEAL 10 7.5 CONDITIONS EN23F0QI VIN = 12V VOUT = 1.2V 5 2.5 0 0 5 10 15 20 25 TOTAL OUTPUT CURRENT (A) 30 Figure 8. Parallel Current Matching Enpirion Confidential www.enpirion.com, Page 17 EN23F0QI Figure 9. Parallel Operation Illustration ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 18 EN23F0QI Application Information Output Voltage Programming and Loop Compensation Recommended Input Capacitors The EN23F0QI uses a Type IV Voltage Mode compensation network. Type IV Voltage Mode control is a proprietary Enpirion control scheme that maximizes control loop bandwidth to deliver excellent load transient responses and maintain output regulation with pin point accuracy. For ease of use, most of this network has been customized and is integrated within the device package. The EN23F0QI output voltage is programmed using a simple resistor divider network (RA and RB). The feedback voltage at VFB is nominally 0.6V. RA is predetermined based on Table 5 and RB can be calculated based on Figure 10. The values recommended for COUT, CA, RCA and REA make up the external compensation of the EN23F0QI. It will vary with each PVIN and VOUT combination to optimize on performance. The EN23F0QI solution can be optimized for either smallest size or highest performance. Please see Table 5 for a list of recommended RA, CA, RCA, REA and COUT values for each solution. 22µF, 16V, X5R, 10%, 1206 Murata GRM31CR61C226ME15 22µF, 16V, X5R, 20%, 1206 Taiyo Yuden EMK316ABJ226ML-T 22µF, 25V, X5R, 10%, 1210 Murata GRM32ER61E226KE15L 22µF, 25V, X5R, 20%, 1210 Taiyo Yuden TMK325BJ226MM-T Description MFG P/N Table 3: Recommended Input Capacitors Output Capacitor Selection As seen from Table 5, the EN23F0QI has been optimized for use with three 47µF/1206 plus one 100µF/1206 for best performance. For smallest solution size, various combinations of output capacitance may be used. See Table 5 for details. Low ESR ceramic capacitors are required with X5R or X7R rated dielectric formulation. Y5V or equivalent dielectric formulations must not be used as these lose too much capacitance with frequency, temperature and bias voltage. Table 4 contains a list of recommended output capacitors. Output ripple voltage is determined by the aggregate output capacitor impedance. Capacitor impedance, denoted as Z, is comprised of capacitive reactance, effective series resistance, ESR, and effective series inductance, ESL reactance. Placing output capacitors in parallel reduces the impedance and will hence result in lower ripple voltage. 1 Figure 10: VOUT Resistor Divider & Compensation Components. See Table 5 for details. Z Total = 1 1 1 + + ... + Z1 Z 2 Zn Input Capacitor Selection Recommended Output Capacitors The EN23F0QI requires three 22µF/1206 input capacitor. Low-cost, low-ESR ceramic capacitors should be used as input capacitors for this converter. The dielectric must be X5R or X7R rated. Y5V or equivalent dielectric formulations must not be used as these lose too much capacitance with frequency, temperature and bias voltage. In some applications, lower value capacitors are needed in parallel with the larger, capacitors in order to provide high frequency decoupling. Table 3 contains a list of recommended input capacitors. Description 47µF, 6.3V, X5R, 20%, 1206 47µF, 10V, X5R, 20%, 1206 22µF, 10V, X5R, 20%, 0805 22µF, 10V, X5R, 20%, 0805 ©Enpirion 2012 all rights reserved, E&OE 100µF, 6.3V, X5R, 20%, 1206 MFG P/N Murata GRM31CR60J476ME19L Taiyo Yuden LMK316BJ476ML-T Panasonic ECJ-2FB1A226M Taiyo Yuden LMK212BJ226MG-T Murata GRM31CR60J107ME39L Taiyo Yuden JMK316BJ107ML-T Table 4: Recommended Output Capacitors Enpirion Confidential www.enpirion.com, Page 19 EN23F0QI PVIN (V) 14V 12V 10V 8V 6.6V 5V Best Performance Smallest Solution Size CIN = 3 x 22µF/1206 CIN = 3 x 22µF/1206 COUT = 3x47µF (1206) + 100µF(1206) VOUT ≤ 1.8V, COUT = 22µF/0805 + 2x47µF/0805 3.3V > VOUT> 1.8V, COUT = 3x47µF/1206 RA = 200 kΩ RCA REA (kΩ) (kΩ) 19 0 22 0 22 0 24 0 14 56 14 56 16 0 19 0 19 0 22 0 12 56 12 56 14 0 14 0 16 0 19 0 10 56 10 56 10 0 13 0 15 0 15 0 6 56 6 56 10 0 10 0 13 0 13 0 4 56 4 56 10 0 VOUT (V) 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 1.0V CA (pF) 15 12 12 10 18 12 18 15 15 12 22 15 18 18 18 15 27 22 22 22 18 18 39 27 27 27 22 22 47 39 33 1.2V 33 10 1.5V 27 1.8V 2.5V Ripple (mV) 25.6 24 26.4 28.4 31.6 37.3 21.6 22.7 25.2 25.8 30 30.8 18.8 20.4 22 23.6 26.5 28.9 17.2 18.7 20.1 20.9 23.6 22.8 13.8 15.2 16.4 19.6 20.4 21.1 12.4 Deviation (mV) 23 35 42 45 78 114 31 38 39 41 84 116 37 41 42 46 90 122 17.2 18.7 20.1 20.9 23.6 22.8 13.8 15.2 16.4 19.6 20.4 21.1 12.4 0 13.4 13.4 13 0 14.3 14.3 27 13 0 15.4 15.4 68 1 56 15.5 15.5 PVIN (V) 14V 12V 10V 8V 6.6V 5V RA = 100 kΩ RCA REA (kΩ) (kΩ) 36 Open 36 Open 36 Open 36 Open 27 Open 27 Open 27 Open 27 Open 27 Open 27 Open 27 Open 27 Open 20 Open 20 Open 20 Open 20 Open 20 Open 20 Open 10 Open 10 Open 10 Open 10 Open 10 Open 10 Open 10 Open 10 Open 10 Open 10 Open 10 Open 10 Open 10 Open VOUT (V) 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 1.0V CA (pF) 12 12 12 12 15 10 22 22 18 18 22 15 56 47 39 33 33 22 200 200 150 82 68 39 200 200 200 150 100 56 200 Ripple (mV) 15 18 22 25 32 46 15 18 21 24 30 43 15 17 20 22 29 41 14 16 19 20 27 36 13 15 17 19 24 32 12 Deviation (mV) 78 93 104 130 162 200 84 97 118 130 172 213 85 100 120 140 177 230 83 90 107 138 178 239 99 105 118 138 183 250 123 1.2V 200 10 Open 13 132 1.5V 200 10 Open 16 145 1.8V 200 10 Open 17 156 2.5V 100 10 Open 20 216 3.3V 47 1 56 12.9 12.9 3.3V 100 10 Open 21 253 Table 5: RA, CA, RCA and REA Values for Various PVIN/VOUT Combinations: Best Performance vs. Smallest Solution Size. Use the equations in Figure 10 to calculate RB. Note 6: Output ripple is measured at no load and nominal deviation is for a 15A load transient step. Note 7: For compensation values of output voltage in between the specified output voltages, choose compensation values of the lower output voltage setting. ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 20 EN23F0QI Thermal Considerations Thermal considerations are important power supply design facts that cannot be avoided in the real world. Whenever there are power losses in a system, the heat that is generated by the power dissipation needs to be accounted for. The Enpirion PowerSoC helps alleviate some of those concerns. The Enpirion EN23F0QI DC-DC converter is packaged in an 8x11x3mm 68-pin QFN package. The QFN package is constructed with copper lead frames that have exposed thermal pads. The exposed thermal pad on the package should be soldered directly on to a copper ground pad on the printed circuit board (PCB) to act as a heat sink. The recommended maximum junction temperature for continuous operation is 125°C. Continuous operation above 125°C may reduce long-term reliability. The device has a thermal overload protection circuit designed to turn off the device at an approximate junction temperature value of 150°C. The EN23F0QI is guaranteed to support the full 4A output current up to 85°C ambient temperature. The following example and calculations illustrate the thermal performance of the EN23F0QI. For VIN = 12V, VOUT = 1.2V at 15A, η ≈ 80% η = POUT / PIN = 80% = 0.8 PIN = POUT / η PIN ≈ 18W / 0.8 ≈ 22.5W The power dissipation (PD) is the power loss in the system and can be calculated by subtracting the output power from the input power. PD = PIN – POUT ≈ 22.5W – 18W ≈ 4.5W With the power dissipation known, the temperature rise in the device may be estimated based on the theta JA value (θJA). The θJA parameter estimates how much the temperature will rise in the device for every watt of power dissipation. The EN23F0QI has a θJA value of 13 ºC/W without airflow. Determine the change in temperature (ΔT) based on PD and θJA. ΔT = PD x θJA ΔT ≈ 4.5W x 13°C/W = 58.5°C ≈ 59°C VIN = 12V The junction temperature (TJ) of the device is approximately the ambient temperature (TA) plus the change in temperature. We assume the initial ambient temperature to be 25°C. VOUT = 1.2V TJ = TA + ΔT IOUT = 15A TJ ≈ 25°C + 59°C ≈ 84°C First calculate the output power. The maximum operating junction temperature (TJMAX) of the device is 125°C, so the device can operate at a higher ambient temperature. The maximum ambient temperature (TAMAX) allowed can be calculated. Example: POUT = 1.2V x 15A = 18W Next, determine the input power based on the efficiency (η) shown in Figure 11. Efficiency vs. Output Current 100 ≈ 125°C – 59°C ≈ 66°C The maximum ambient temperature the device can reach is 66°C given the input and output conditions. Note that the efficiency will be slightly lower at higher temperatures and this calculation is an estimate. 90 80 EFFICIENCY (%) TAMAX = TJMAX – PD x θJA 70 60 50 40 30 VOUT = 3.3V 20 VOUT = 1.8V 10 VOUT = 1.2V CONDITIONS VIN = 12.0V AVIN = 3.3V Dual Supply 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OUTPUT CURRENT (A) Figure 11: Efficiency vs. Output Current ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 21 EN23F0QI Engineering Schematic Figure 12: Critical Components Engineering Schematic ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 22 EN23F0QI Layout Recommendation Figure 13: Top Layer of Engineering Board (Top View). Recommendation 1: Input and output filter capacitors should be placed on the same side of the PCB, and as close to the EN23F0QI package as possible. They should be connected to the device with very short and wide traces. Do not use thermal reliefs or spokes when connecting the capacitor pads to the respective nodes. The +V and GND traces between the capacitors and the EN23F0QI should be as close to each other as possible so that the gap between the two nodes is minimized, even under the capacitors. Recommendation 2: The PGND connections for the input and output capacitors on layer 1 need to have a slit between them in order to provide some separation between input and output current loops. Recommendation 3: The system ground plane should be the first layer immediately below the surface layer. This ground plane should be continuous and un-interrupted below the converter and the input/output capacitors. Recommendation 4: The thermal pad underneath the component must be connected to the system ground plane through as many vias as possible. The drill diameter of the vias should be 0.33mm, and the vias must have at least 1 oz. copper plating ©Enpirion 2012 all rights reserved, E&OE on the inside wall, making the finished hole size around 0.20-0.26mm. Do not use thermal reliefs or spokes to connect the vias to the ground plane. This connection provides the path for heat dissipation from the converter. Recommendation 5: Multiple small vias (the same size as the thermal vias discussed in recommendation 4) should be used to connect ground terminal of the input capacitor and output capacitors to the system ground plane. It is preferred to put these vias along the edge of the GND copper closest to the +V copper. These vias connect the input/output filter capacitors to the GND plane, and help reduce parasitic inductances in the input and output current loops. If vias cannot be placed under the capacitors, then place them on both sides of the slit in the top layer PGND copper. Recommendation 6: AVIN is the power supply for the small-signal control circuits. It should be connected to the input voltage at a quiet point. In Figure 13 this connection is made at the input capacitor. Recommendation 7: The layer 1 metal under the device must not be more than shown in Figure 13. Refer to the section regarding Exposed Metal on Bottom of Package. As with any switch-mode DC/DC converter, try not to run sensitive signal or control lines underneath the converter package on other layers. Recommendation 8: The VOUT sense point should be just after the last output filter capacitor. Keep the sense trace short in order to avoid noise coupling into the node. Contact Enpirion Technical Support for any remote sensing applications. Recommendation 9: Keep RA, CA, RB, and RCA close to the VFB pin (Refer to Figure 13). The VFB pin is a high-impedance, sensitive node. Keep the trace to this pin as short as possible. Whenever possible, connect RB directly to the AGND pins 52 and 53 instead of going through the GND plane. Recommendation 10: Follow all the layout recommendations as close as possible to optimize performance. Enpirion provides schematic and layout reviews for all customer designs. Contact Enpirion Applications Engineering for detailed support ([email protected]). Enpirion Confidential www.enpirion.com, Page 23 EN23F0QI Design Considerations for Lead-Frame Based Modules Exposed Metal on Bottom of Package Lead-frames offer many advantages in thermal performance, in reduced electrical lead resistance, and in overall foot print. However, they do require some special considerations. In the assembly process lead frame construction requires that, for mechanical support, some of the lead-frame cantilevers be exposed at the point where wire-bond or internal passives are attached. This results in several small pads being exposed on the bottom of the package, as shown in Figure 14. Only the thermal pad and the perimeter pads are to be mechanically or electrically connected to the PC board. The PCB top layer under the EN23F0QI should be clear of any metal (copper pours, traces, or vias) except for the thermal pad. The “shaded-out” area in Figure 14 represents the area that should be clear of any metal on the top layer of the PCB. Any layer 1 metal under the shaded-out area runs the risk of undesirable shorted connections even if it is covered by soldermask. The solder stencil aperture should be smaller than the PCB ground pad. This will prevent excess solder from causing bridging between adjacent pins or other exposed metal under the package. Please consult the Enpirion Manufacturing Application Note for more details and recommendations. Figure 14: Lead-Frame exposed metal (Bottom View) Shaded area highlights exposed metal that is not to be mechanically or electrically connected to the PCB. ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 24 EN23F0QI Recommended PCB Footprint Figure 15: EN23F0QI PCB Footprint (Top View) ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 25 EN23F0QI Package and Mechanical Figure 16: EN23F0QI Package Dimensions (Bottom View) Packing and Marking Information: http://www.enpirion.com/resource-center-packing-and-marking-information.htm Contact Information Enpirion, Inc. Perryville III Corporate Park 53 Frontage Road - Suite 210 Hampton, NJ 08827 USA Phone: 1.908.894.6000 Fax: 1.908.894.6090 Enpirion reserves the right to make changes in circuit design and/or specifications at any time without notice. Information furnished by Enpirion is believed to be accurate and reliable. Enpirion assumes no responsibility for its use or for infringement of patents or other third party rights, which may result from its use. Enpirion products are not authorized for use in nuclear control systems, as critical components in life support systems or equipment used in hazardous environment without the express written authority from Enpirion ©Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 26