VSMF3710 www.vishay.com Vishay Semiconductors High Speed Infrared Emitting Diode, 890 nm, GaAlAs Double Hetero FEATURES • Package type: surface mount • Package form: PLCC-2 • Dimensions (L x W x H in mm): 3.5 x 2.8 x 1.75 • Peak wavelength: λp = 890 nm • High reliability • High radiant power • High radiant intensity 948553 • Angle of half intensity: ϕ = ± 60° • Low forward voltage • Suitable for high pulse current operation • High modulation band width: fc = 12 MHz DESCRIPTION • Good spectral matching with Si photodetectors VSMF3710 is an infrared, 890 nm emitting diode in GaAlAs double hetero (DH) technology with high radiant power and high speed, molded in a PLCC-2 package for surface mounting (SMD). • Floor life: 168 h, MSL 3, acc. J-STD-020 • Lead (Pb)-free reflow soldering • AEC-Q101 qualified • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 APPLICATIONS • High speed IR data transmission • High power emitter for low space applications • High performance transmissive or reflective sensors PRODUCT SUMMARY COMPONENT Ie (mW/sr) ϕ (deg) λp (nm) tr (ns) 10 ± 60 890 30 VSMF3710 Note • Test conditions see table “Basic Characteristics” ORDERING INFORMATION ORDERING CODE PACKAGING REMARKS PACKAGE FORM VSMF3710-GS08 Tape and reel MOQ: 7500 pcs, 1500 pcs/reel PLCC-2 VSMF3710-GS18 Tape and reel MOQ: 8000 pcs, 8000 pcs/reel PLCC-2 Note • MOQ: minimum order quantity Rev. 1.9, 05-Dec-13 Document Number: 81241 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VSMF3710 www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITION SYMBOL VALUE UNIT VR 5 V Reverse voltage IF 100 mA Peak forward current tp/T = 0.5, tp = 100 μs IFM 200 mA Surge forward current tp = 100 μs IFSM 1 A PV 160 mW Forward current Power dissipation Junction temperature Operating temperature range Tj 100 °C Tamb -40 to +85 °C Tstg -40 to +100 °C Acc. figure 8, J-STD-020 Tsd 260 °C J-STD-051, soldered on PCB RthJA 250 K/W Storage temperature range Soldering temperature Thermal resistance junction/ambient 120 160 IF - Forward Current (mA) PV - Power Dissipation (mW) 180 140 120 100 RthJA = 250 K/W 80 60 40 100 80 60 RthJA = 250 K/W 40 20 20 0 0 0 10 21343 20 30 40 50 60 70 80 90 0 100 Tamb - Ambient Temperature (°C) 10 Fig. 1 - Power Dissipation Limit vs. Ambient Temperature 20 30 40 50 60 70 80 90 100 Tamb - Ambient Temperature (°C) 21344 Fig. 2 - Forward Current Limit vs. Ambient Temperature BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITION SYMBOL TYP. MAX. IF = 100 mA, tp = 20 ms VF 1.4 1.6 IF = 1 A, tp = 100 μs VF 2.3 Temperature coefficient of VF IF = 1 mA TKVF -1.8 Reverse current VR = 5 V IR VR = 0 V, f = 1 MHz, E = 0 Cj IF = 100 mA, tp = 20 ms Ie IF = 1 A, tp = 100 μs Ie Forward voltage Junction capacitance Radiant intensity MIN. 10 100 V V mV/K 10 μA 22 mW/sr 125 6 UNIT pF mW/sr IF = 100 mA, tp = 20 ms φe 40 mW IF = 100 mA TKφe -0.35 %/K ϕ ± 60 deg Peak wavelength IF = 100 mA λp 890 nm Spectral bandwidth IF = 100 mA Δλ 40 nm Radiant power Temperature coefficient of φe Angle of half intensity Temperature coefficient of λp IF = 100 mA TKλp 0.25 nm/K Rise time IF = 100 mA tr 30 ns Fall time IF = 100 mA tf 30 ns IDC = 70 mA, IAC = 30 mA pp fc 12 MHz d 0.44 mm Cut-off frequency Virtual source diameter Rev. 1.9, 05-Dec-13 Document Number: 81241 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VSMF3710 www.vishay.com Vishay Semiconductors BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) 1.25 10 000 0.01 1000 0.02 0.05 100 0.2 0.5 DC 0.1 10 1 0.01 0.1 1 10 0.75 0.5 0.25 0 800 100 tp - Pulse Length (ms) 95 9985 1.0 Fig. 3 - Pulse Forward Current vs. Pulse Duration Fig. 6 - Relative Radiant Power vs. Wavelength 0° 1000 10° 20° 30° Ie, rel - Relative Radiant Intensity IF - Forward Current (mA) 1000 900 λ - Wavelength (nm) 20082 100 tp = 100 µs tp/T = 0.001 10 40° 1.0 0.9 50° 0.8 60° 70° 0.7 ϕ - Angular Displacement IF - Forward Current (mA) tp/T = 0.005 Φe rel - Relative Radiant Power Tamb < 60 °C 80° 1 0 1 2 3 0.6 4 0.4 0.2 0 948013-1 VF - Forward Voltage (V) 18873_1 Fig. 4 - Forward Current vs. Forward Voltage Fig. 7 - Relative Radiant Intensity vs. Angular Displacement Ie - Radiant Intensity (mW/sr) 100 10 tp = 1 µs 1 0.1 1 18874 10 100 1000 IF - Forward Pulse Current (mA) Fig. 5 - Radiant Intensity vs. Forward Current Rev. 1.9, 05-Dec-13 Document Number: 81241 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VSMF3710 www.vishay.com Vishay Semiconductors PACKAGE DIMENSIONS in millimeters 0.9 1.75±0.1 3.5±0.2 0.8 Technical drawings according to DIN specifications C A 2.2 2.8±0.15 Pin identification Dimensions in mm Drawing-No.: 6.541-5067.01-4 Issue: 6; 23.09.13 Ø2.4 3 +0.15 Mounting Pad Layout Area covered with solderresist 4 2.6 (2.8) 1.2 1.6 (1.9) 4 Dimensions: Reflow and vapor phase (wave soldering) DRYPACK SOLDER PROFILE 300 Temperature (°C) max. 260 °C 245 °C 255 °C 240 °C 217 °C 250 FLOOR LIFE 200 Floor life (time between soldering and removing from MBB) must not exceed the time indicated on MBB label: Floor life: 168 h Conditions: Tamb < 30 °C, RH < 60 % Moisture sensitivity level 3, acc. to J-STD-020. max. 30 s 150 max. 100 s max. 120 s 100 max. ramp up 3 °C/s max. ramp down 6 °C/s 50 0 0 19841 50 100 150 200 250 300 Time (s) Fig. 8 - Lead (Pb)-free Reflow Solder Profile acc. J-STD-020 Rev. 1.9, 05-Dec-13 Devices are packed in moisture barrier bags (MBB) to prevent the products from moisture absorption during transportation and storage. Each bag contains a desiccant. DRYING In case of moisture absorption devices should be baked before soldering. Conditions see J-STD-020 or label. Devices taped on reel dry using recommended conditions 192 h at 40 °C (+ 5 °C), RH < 5 %. Document Number: 81241 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VSMF3710 www.vishay.com Vishay Semiconductors TAPE AND REEL PLCC-2 components are packed in antistatic blister tape (DIN IEC (CO) 564) for automatic component insertion. Cavities of blister tape are covered with adhesive tape. 10.0 9.0 120° 4.5 3.5 13.00 12.75 2.5 1.5 Adhesive tape Identification Label: Vishay type group tape code production code quantity Blister tape Component cavity 63.5 60.5 14.4 max. 180 178 94 8665 Fig. 12 - Dimensions of Reel-GS08 94 8670 Fig. 9 - Blister Tape 3.5 3.1 2.2 2.0 4.5 3.5 5.75 5.25 3.6 3.4 4.0 3.6 4.1 3.9 4.1 3.9 13.00 12.75 2.5 1.5 8.3 7.7 1.85 1.65 1.6 1.4 10.4 8.4 120° 0.25 2.05 1.95 94 8668 Fig. 10 - Tape Dimensions in mm for PLCC-2 Identification Label: Vishay type group tape code production code quantity 62.5 60.0 321 329 14.4 max. 18857 Fig. 13 - Dimensions of Reel-GS18 MISSING DEVICES A maximum of 0.5 % of the total number of components per reel may be missing, exclusively missing components at the beginning and at the end of the reel. A maximum of three consecutive components may be missing, provided this gap is followed by six consecutive components. De-reeling direction COVER TAPE REMOVAL FORCE The removal force lies between 0.1 N and 1.0 N at a removal speed of 5 mm/s. In order to prevent components from popping out of the blisters, the cover tape must be pulled off at an angle of 180° with regard to the feed direction. 94 8158 > 160 mm Tape leader 40 empty compartments min. 75 empty compartments Carrier leader Carrier trailer Fig. 11 - Beginning and End of Reel The tape leader is at least 160 mm and is followed by a carrier tape leader with at least 40 empty compartments. The tape leader may include the carrier tape as long as the cover tape is not connected to the carrier tape. The least component is followed by a carrier tape trailer with a least 75 empty compartments and sealed with cover tape. Rev. 1.9, 05-Dec-13 Document Number: 81241 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000