Databook.fxp 1/14/99 11:31 AM Page B-23 B-23 01/99 2N5911, 2N5912 Dual N-Channel Silicon Junction Field-Effect Transistor Absolute maximum ratings at TA = 25¡C ¥ Wideband Differential Amplifiers Continuous Forward Gate Current Total Device Power Dissipation Power Derating Storage Temperature Range At 25°C free air temperature: 2N5911 Static Electrical Characteristics Min Gate Source Breakdown Voltage V(BR)GSS Gate Reverse Current IGSS Gate Operating Current IG Max – 25 2N5912 Min Max – 25 50 mA 500 mW 4 mW°C –65°C to + 200°C Process NJ30L or NJ36D Unit Test Conditions V IG = – 1 µA, VDS = ØV – 100 – 100 pA VGS = – 15V, VDS = ØV – 250 – 250 nA VGS = – 15V, VDS = ØV – 100 – 100 pA VDG = 10V, ID = 5 mA – 100 – 100 nA VDG = 10V, ID = 5 mA Gate Source Cutoff Voltage VGS(OFF) –1 –5 –1 –5 V VDS = 10V, ID = 1 nA Gate Source Voltage VGS – 0.3 –4 – 0.3 –4 V VDS = 10V, ID = 5 mA Drain Saturation Current (Pulsed) IDSS 7 40 7 40 mA VDS = 10V, VGS = ØV TA = 150°C TA = 125°C Dynamic Electrical Characteristics 5000 10000 5000 10000 µS VDG = 10V, ID = 5 mA f = 1 kHz 5000 10000 5000 10000 µS VDG = 10V, ID = 5 mA f = 100 MHz µS VDG = 10V, ID = 5 mA f = 1 kHz µS VDG = 10V, ID = 5 mA f = 100 MHz pF VDG = 10V, ID = 5 mA f = 1 MHz 1.2 pF VDG = 10V, ID = 5 mA f = 1 MHz 20 20 nV/√Hz VDG = 10V, ID = 5 mA f = 10 kHz 1 1 dB VDG = 10V, ID = 5 mA RG = 100 KΩ f = 10 kHz 20 nA VDG = 10V, ID = 5 mA TA = 125°C Common Source Forward Transconductance gfs Common Source Output Conductance gos 100 100 150 150 Common Source Input Capacitance Ciss 5 5 Common Source Reverse Transfer Capacitance Crss 1.2 Equivalent Short Circuit Input Noise Voltage e¯ N Noise Figure NF Differential Gate Current Saturation Drain Current Ratio IG1 – IG2 IDSS1 / IDSS2 Differential Gate Source Voltage | VGS1 – VGS2 | Gate Source Voltage Differential Drift Transconductance Ratio 20 0.95 ∆VGS1– VGS2 ∆T gfs1 / gfs2 0.9 1 0.95 1 VDG = 20V, VGS = ØV 10 15 mV VDG = 10V, ID = 5 mA 20 40 mV VDG = 10V, ID = 5 mA TA = 25°C, TB = 125°C 20 40 mV VDG = 10V, ID = 5 mA TA = – 55°C, TB = 25°C VDG = 10V, ID = 5 mA f = 1 kHz 1 0.85 1 SOIC-8 Package TOÐ78 Package Surface Mount See Section G for Outline Dimensions See Section G for Outline Dimensions SMP5911, SMP5912 Pin Configuration Pin Configuration 1 Source 1, 2 Drain 1, 3 Gate 1, 4 N/C, 5 Source 2, 6 Drain 2, 7 Gate 2, 8 Omitted 1 Source 1, 2 Drain 1, 3 Gate 1, 4 Case, 5 Source 2, 6 Drain 2, 7 Gate 2, 8 Omitted www.interfet.com 1000 N. Shiloh Road, Garland, TX 75042 (972) 487-1287 FAX (972) 276-3375