2SK1697 Silicon N-Channel MOS FET REJ03G1373-0200 (Previous: ADE-208-1313) Rev.2.00 May 11, 2006 Application High speed power switching Features • • • • • Low on-resistance High speed switching Low drive current 4 V gate drive device can be driven from 5 V source. Suitable for DC – DC converter, motor drive, power switch, solenoid drive Outline RENESAS Package code: PLZZ0004CA-A (Package name: UPAK R ) 3 D 2 1 1. Gate 2. Drain 3. Source 4. Drain G 4 S Note: Marking is “EY”. *UPAK is a trademark of Renesas Technology Corp. Absolute Maximum Ratings (Ta = 25°C) Item Symbol Drain to source voltage VDSS Gate to source voltage VGSS Drain current ID Drain peak current ID(pulse)*1 Body to drain diode reverse drain current IDR Channel dissipation Pch*2 Channel temperature Tch Storage temperature Tstg Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. When using the alumina ceramic board (12.5 × 20 × 0.7 mm) Rev.2.00 May 11, 2006 page 1 of 6 Ratings 60 ±20 0.5 1.5 0.5 1 150 –55 to +150 Unit V V A A A W °C °C 2SK1697 Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) Static drain to source on state resistance RDS(on) Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body to drain diode forward voltage |yfs| Ciss Coss Crss td(on) tr td(off) tf VDF Body to drain diode reverse recovery time Note: 1. Pulse test Rev.2.00 May 11, 2006 page 2 of 6 trr Min 60 ±20 — — 1.0 — — 0.25 — — — — — — — — — Typ — — — — — 1.3 1.8 0.38 33 17 5 3 8 18 14 1 45 Max — — ±10 50 2.0 1.7 2.5 — — — — — — — — — — Unit V V µA µA V Ω Ω S pF pF pF ns ns ns ns V ns Test conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 50 V, VGS = 0 ID = 1 mA, VDS = 10 V ID = 0.3 A, VGS = 10 V *1 ID = 0.3 A, VGS = 4 V *1 ID = 0.3 A, VDS = 10 V *1 VDS = 10 V, VGS = 0, f = 1 MHz ID = 0.3 A, VGS = 10 V, RL = 100 Ω IF = 0.5 A, VGS = 0 IF = 0.5 A, VGS = 0, diF/dt = 50 A/µs 2SK1697 Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 1.0 10 1 = O 1 10 ra Sh ot ) (T C Operation in this area is limited by RDS (on) (1 = 25 Ta = 25°C 50 100 0.01 0.1 150 10 V 6V Pulse Test Drain Current ID (A) 3V 0.4 2.5 V 0.2 0.8 0.6 0.4 0.2 VGS = 2 V 4 6 8 10 0 25°C TC = 75°C 1 –25°C 3 2 4 Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current Pulse Test 0.8 0.5 A 0.6 0.4 0.2 A 0.2 ID = 0.1 A 2 4 6 8 Gate to Source Voltage VGS (V) Rev.2.00 May 11, 2006 page 3 of 6 10 Static Drain to Source on State Resistance RDS (on) (Ω) Drain to Source Voltage VDS (V) 1.0 0 100 VDS = 10 V Pulse Test 3.5 V 2 30 10 Typical Transfer Characteristics 0.6 0 3 1.0 4V 0.8 1 °C ) Drain to Source Voltage VDS (V) Typical Output Characteristics 1.0 0.3 µs s tio n m m s pe 0.1 Ambient Temperature Ta (°C) Drain Current ID (A) DC 0.3 0.03 0 Drain to Source Saturation Voltage VDS (on) (V) PW µs 0.5 3 0 Drain Current ID (A) 10 10 Channel Dissipation Pch (mW) 1.5 5 50 Pulse Test 20 10 5 2 VGS = 4 V 10 V 1 0.5 0.05 0.1 0.2 0.5 1 2 Drain Current ID (A) 5 Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance yfs (S) Static Drain to Source on State Resistance RDS (on) (Ω) 2SK1697 5 Pulse Test 4 ID = 0.5 A 0.2 A 3 0.1 A VGS = 4 V 2 0.5 A 0.2 A 0.1 A 10 V 1 0 –40 40 0 80 120 160 25°C –25°C 0.5 0.2 TC = 75°C 0.1 0.05 0.02 1 2 Capacitance C (pF) Ciss 50 Coss 10 Crss 1 20 VGS = 0 f = 1 MHz 0.1 0.1 0.2 0.5 1 2 0 5 10 30 20 40 Reverse Drain Current IDR (A) Drain to Source Voltage VDS (V) Dynamic Input Characteristics Switching Characteristics 100 20 VDS 16 12 VGS 40 8 VDD = 50 V 25 V 10 V 0.8 1.6 0 2.4 3.2 Gate Charge Qg (nc) Rev.2.00 May 11, 2006 page 4 of 6 4 ID = 0.3 A 4.0 50 100 Switching Time t (ns) VDD = 10 V 25 V 50 V 80 0 0 0.5 100 100 20 0.2 Typical Capacitance vs. Drain to Source Voltage 200 60 0.05 0.1 Body to Drain Diode Reverse Recovery Time Gate to Source Voltage VGS (V) Reverse Recovery Time trr (ns) 1 Drain Current ID (A) di/dt = 50 A/µs VGS = 0, Ta = 25°C Pulse Test 10 0.05 Drain to Source Voltage VDS (V) VDS = 10 V Pulse Test 2 Case Temperature TC (°C) 1,000 500 5 50 VGS = 10 V, PW = 2 µs . duty < 1%, VDD =. 30 V tf td (off) 20 10 5 tr td (on) 2 1 0.05 0.1 0.2 0.5 1 2 Drain Current ID (A) 5 2SK1697 Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) 1.0 Pulse Test 0.8 0.6 0.4 10 V 0.2 5V VGS = 0, –5 V 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage VSD (V) Rev.2.00 May 11, 2006 page 5 of 6 2SK1697 Package Dimensions 1.5 1.5 3.0 MASS[Typ.] 0.050g 1.5 ± 0.1 0.44 Max 2.5 ± 0.1 4.25 Max 0.53 Max 0.48 Max 0.8 Min φ1 0.4 4.5 ± 0.1 1.8 Max Previous Code UPAK / UPAKV Unit: mm (1.5) 0.44 Max (0.2) RENESAS Code PLZZ0004CA-A (2.5) JEITA Package Code SC-62 (0.4) Package Name UPAK Ordering Information Part Name 2SK1697EYTL-E 2SK1697EYTR-E Quantity 1000 pcs Shipping Container φ178 mm Reel, 12 mm Emboss Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.2.00 May 11, 2006 page 6 of 6 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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